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-rw-r--r--configs/example/arm/fs_bigLITTLE.py3
-rw-r--r--configs/example/arm/starter_fs.py3
-rw-r--r--src/arch/arm/ArmSystem.py2
3 files changed, 3 insertions, 5 deletions
diff --git a/configs/example/arm/fs_bigLITTLE.py b/configs/example/arm/fs_bigLITTLE.py
index 2965f4757..a6110b520 100644
--- a/configs/example/arm/fs_bigLITTLE.py
+++ b/configs/example/arm/fs_bigLITTLE.py
@@ -115,8 +115,7 @@ class Ex5LittleCluster(devices.CpuCluster):
def createSystem(caches, kernel, bootscript, disks=[]):
sys = devices.SimpleSystem(caches, default_mem_size,
kernel=SysPaths.binary(kernel),
- readfile=bootscript,
- machine_type="DTOnly")
+ readfile=bootscript)
sys.mem_ctrls = SimpleMemory(range=sys._mem_range)
sys.mem_ctrls.port = sys.membus.master
diff --git a/configs/example/arm/starter_fs.py b/configs/example/arm/starter_fs.py
index 9b6f68f55..2ca1cb800 100644
--- a/configs/example/arm/starter_fs.py
+++ b/configs/example/arm/starter_fs.py
@@ -110,8 +110,7 @@ def create(args):
mem_mode=mem_mode,
dtb_filename=dtb_file,
kernel=SysPaths.binary(args.kernel),
- readfile=args.script,
- machine_type="DTOnly")
+ readfile=args.script)
MemConfig.config_mem(args, system)
diff --git a/src/arch/arm/ArmSystem.py b/src/arch/arm/ArmSystem.py
index c21b9c6ec..4fa9fd858 100644
--- a/src/arch/arm/ArmSystem.py
+++ b/src/arch/arm/ArmSystem.py
@@ -84,7 +84,7 @@ class GenericArmSystem(ArmSystem):
type = 'GenericArmSystem'
cxx_header = "arch/arm/system.hh"
load_addr_mask = 0x0fffffff
- machine_type = Param.ArmMachineType('VExpress_EMM',
+ machine_type = Param.ArmMachineType('DTOnly',
"Machine id from http://www.arm.linux.org.uk/developer/machines/")
atags_addr = Param.Addr("Address where default atags structure should " \
"be written")