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-rw-r--r--src/arch/x86/insts/static_inst.cc3
-rw-r--r--src/arch/x86/intregs.hh6
-rw-r--r--src/arch/x86/isa.cc22
-rw-r--r--src/arch/x86/isa.hh18
4 files changed, 21 insertions, 28 deletions
diff --git a/src/arch/x86/insts/static_inst.cc b/src/arch/x86/insts/static_inst.cc
index f4ed44603..0820a47d4 100644
--- a/src/arch/x86/insts/static_inst.cc
+++ b/src/arch/x86/insts/static_inst.cc
@@ -153,10 +153,7 @@ namespace X86ISA
reg &= ~(1 << 6);
if(fold)
- {
suffix = "h";
- reg -= 4;
- }
else if(reg < 8 && size == 1)
suffix = "l";
diff --git a/src/arch/x86/intregs.hh b/src/arch/x86/intregs.hh
index 6f252392e..627d7062f 100644
--- a/src/arch/x86/intregs.hh
+++ b/src/arch/x86/intregs.hh
@@ -60,6 +60,8 @@
#include "arch/x86/x86_traits.hh"
#include "base/bitunion.hh"
+#include "base/misc.hh"
+#include "sim/core.hh"
namespace X86ISA
{
@@ -187,7 +189,9 @@ namespace X86ISA
inline static IntRegIndex
INTREG_FOLDED(int index, int foldBit)
{
- return (IntRegIndex)(((index & 0x1C) == 4 ? foldBit : 0) | index);
+ if ((index & 0x1C) == 4 && foldBit)
+ index = (index - 4) | foldBit;
+ return (IntRegIndex)index;
}
};
diff --git a/src/arch/x86/isa.cc b/src/arch/x86/isa.cc
index d19a2a6cc..06a656efc 100644
--- a/src/arch/x86/isa.cc
+++ b/src/arch/x86/isa.cc
@@ -28,7 +28,6 @@
* Authors: Gabe Black
*/
-#include "arch/x86/floatregs.hh"
#include "arch/x86/isa.hh"
#include "arch/x86/tlb.hh"
#include "cpu/base.hh"
@@ -355,25 +354,4 @@ ISA::unserialize(EventManager *em, Checkpoint * cp,
UNSERIALIZE_ARRAY(regVal, NumMiscRegs);
}
-int
-ISA::flattenIntIndex(int reg)
-{
- //If we need to fold over the index to match byte semantics, do that.
- //Otherwise, just strip off any extra bits and pass it through.
- if (reg & (1 << 6))
- return (reg & (~(1 << 6) - 0x4));
- else
- return (reg & ~(1 << 6));
-}
-
-int
-ISA::flattenFloatIndex(int reg)
-{
- if (reg >= NUM_FLOATREGS) {
- int top = readMiscRegNoEffect(MISCREG_X87_TOP);
- reg = FLOATREG_STACK(reg - NUM_FLOATREGS, top);
- }
- return reg;
-}
-
}
diff --git a/src/arch/x86/isa.hh b/src/arch/x86/isa.hh
index 285f0aa82..8d3b110c6 100644
--- a/src/arch/x86/isa.hh
+++ b/src/arch/x86/isa.hh
@@ -31,6 +31,7 @@
#ifndef __ARCH_X86_ISA_HH__
#define __ARCH_X86_ISA_HH__
+#include "arch/x86/floatregs.hh"
#include "arch/x86/miscregs.hh"
#include "arch/x86/registers.hh"
#include "base/types.hh"
@@ -65,8 +66,21 @@ namespace X86ISA
void setMiscRegNoEffect(int miscReg, MiscReg val);
void setMiscReg(int miscReg, MiscReg val, ThreadContext *tc);
- int flattenIntIndex(int reg);
- int flattenFloatIndex(int reg);
+ int
+ flattenIntIndex(int reg)
+ {
+ return reg & ~(1 << 6);
+ }
+
+ int
+ flattenFloatIndex(int reg)
+ {
+ if (reg >= NUM_FLOATREGS) {
+ reg = FLOATREG_STACK(reg - NUM_FLOATREGS,
+ regVal[MISCREG_X87_TOP]);
+ }
+ return reg;
+ }
void serialize(EventManager *em, std::ostream &os);
void unserialize(EventManager *em, Checkpoint *cp,