diff options
| -rw-r--r-- | src/arch/x86/isa/decoder/one_byte_opcodes.isa | 2 | ||||
| -rw-r--r-- | src/arch/x86/isa/insts/general_purpose/compare_and_test/set_byte_on_condition.py | 5 |
2 files changed, 6 insertions, 1 deletions
diff --git a/src/arch/x86/isa/decoder/one_byte_opcodes.isa b/src/arch/x86/isa/decoder/one_byte_opcodes.isa index 483e750b2..473dd1eeb 100644 --- a/src/arch/x86/isa/decoder/one_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/one_byte_opcodes.isa @@ -461,7 +461,7 @@ } 0x6: decode MODE_SUBMODE { 0x0: UD2(); - default: WarnUnimpl::salc(); + default: SALC(rAb); } 0x7: XLAT(); } diff --git a/src/arch/x86/isa/insts/general_purpose/compare_and_test/set_byte_on_condition.py b/src/arch/x86/isa/insts/general_purpose/compare_and_test/set_byte_on_condition.py index 81091905c..fab42dffd 100644 --- a/src/arch/x86/isa/insts/general_purpose/compare_and_test/set_byte_on_condition.py +++ b/src/arch/x86/isa/insts/general_purpose/compare_and_test/set_byte_on_condition.py @@ -54,6 +54,11 @@ # Authors: Gabe Black microcode = ''' +def macroop SALC_R +{ + sbb reg, reg, reg, dataSize=1 +}; + def macroop SETZ_R { movi reg, reg, 1, flags=(CZF,) |