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-rw-r--r--SConscript2
-rw-r--r--arch/alpha/system.cc4
-rw-r--r--base/loader/object_file.cc18
-rw-r--r--base/loader/object_file.hh6
-rw-r--r--cpu/cpu_exec_context.cc4
-rw-r--r--cpu/cpu_exec_context.hh4
-rw-r--r--cpu/simple/cpu.cc2
-rw-r--r--mem/port.hh19
-rw-r--r--mem/translating_port.hh7
-rw-r--r--sim/system.cc12
-rw-r--r--sim/system.hh5
11 files changed, 52 insertions, 31 deletions
diff --git a/SConscript b/SConscript
index daca62c06..ea77f0ec7 100644
--- a/SConscript
+++ b/SConscript
@@ -92,7 +92,6 @@ base_sources = Split('''
mem/mem_object.cc
mem/physical.cc
mem/port.cc
- mem/translating_port.cc
mem/bus.cc
python/pyconfig.cc
@@ -254,6 +253,7 @@ turbolaser_sources = Split('''
# Syscall emulation (non-full-system) sources
syscall_emulation_sources = Split('''
kern/linux/linux.cc
+ mem/translating_port.cc
mem/page_table.cc
sim/process.cc
sim/syscall_emul.cc
diff --git a/arch/alpha/system.cc b/arch/alpha/system.cc
index 547e89cff..8dfc3cbc4 100644
--- a/arch/alpha/system.cc
+++ b/arch/alpha/system.cc
@@ -63,8 +63,8 @@ AlphaSystem::AlphaSystem(Params *p)
// Load program sections into memory
- pal->loadSections(physmem, true);
- console->loadSections(physmem, true);
+ pal->loadSections(&functionalPort, LoadAddrMask);
+ console->loadSections(&functionalPort, LoadAddrMask);
// load symbols
if (!console->loadGlobalSymbols(consoleSymtab))
diff --git a/base/loader/object_file.cc b/base/loader/object_file.cc
index 00c094166..c6dfced1d 100644
--- a/base/loader/object_file.cc
+++ b/base/loader/object_file.cc
@@ -63,16 +63,10 @@ ObjectFile::~ObjectFile()
bool
-ObjectFile::loadSection(Section *sec, Port *memPort, bool loadPhys)
+ObjectFile::loadSection(Section *sec, Port *memPort, Addr addrMask)
{
if (sec->size != 0) {
- Addr addr = sec->baseAddr;
- if (loadPhys) {
- // this is Alpha-specific... going to have to fix this
- // for other architectures
- addr &= (ULL(1) << 40) - 1;
- }
-
+ Addr addr = sec->baseAddr & addrMask;
if (sec->fileImage) {
memPort->writeBlob(addr, sec->fileImage, sec->size);
}
@@ -86,11 +80,11 @@ ObjectFile::loadSection(Section *sec, Port *memPort, bool loadPhys)
bool
-ObjectFile::loadSections(Port *memPort, bool loadPhys)
+ObjectFile::loadSections(Port *memPort, Addr addrMask)
{
- return (loadSection(&text, memPort, loadPhys)
- && loadSection(&data, memPort, loadPhys)
- && loadSection(&bss, memPort, loadPhys));
+ return (loadSection(&text, memPort, addrMask)
+ && loadSection(&data, memPort, addrMask)
+ && loadSection(&bss, memPort, addrMask));
}
diff --git a/base/loader/object_file.hh b/base/loader/object_file.hh
index b47e1981b..b43989cb5 100644
--- a/base/loader/object_file.hh
+++ b/base/loader/object_file.hh
@@ -29,6 +29,7 @@
#ifndef __OBJECT_FILE_HH__
#define __OBJECT_FILE_HH__
+#include <limits>
#include <string>
#include "sim/host.hh" // for Addr
@@ -72,7 +73,8 @@ class ObjectFile
void close();
- virtual bool loadSections(Port *memPort, bool loadPhys = false);
+ virtual bool loadSections(Port *memPort, Addr addrMask =
+ std::numeric_limits<Addr>::max());
virtual bool loadGlobalSymbols(SymbolTable *symtab) = 0;
virtual bool loadLocalSymbols(SymbolTable *symtab) = 0;
@@ -94,7 +96,7 @@ class ObjectFile
Section data;
Section bss;
- bool loadSection(Section *sec, Port *memPort, bool loadPhys);
+ bool loadSection(Section *sec, Port *memPort, Addr addrMask);
void setGlobalPointer(Addr global_ptr) { globalPtr = global_ptr; }
public:
diff --git a/cpu/cpu_exec_context.cc b/cpu/cpu_exec_context.cc
index f6edf4b13..a3e6cc432 100644
--- a/cpu/cpu_exec_context.cc
+++ b/cpu/cpu_exec_context.cc
@@ -80,7 +80,7 @@ CPUExecContext::CPUExecContext(BaseCPU *_cpu, int _thread_num, System *_sys,
}
#else
CPUExecContext::CPUExecContext(BaseCPU *_cpu, int _thread_num,
- Process *_process, int _asid)
+ Process *_process, int _asid, MemObject* memobj)
: _status(ExecContext::Unallocated),
cpu(_cpu), thread_num(_thread_num), cpu_id(-1), lastActivate(0),
lastSuspend(0), process(_process), asid(_asid),
@@ -89,7 +89,7 @@ CPUExecContext::CPUExecContext(BaseCPU *_cpu, int _thread_num,
/* Use this port to for syscall emulation writes to memory. */
Port *mem_port;
port = new TranslatingPort(process->pTable, false);
- mem_port = process->system->physmem->getPort("functional");
+ mem_port = memobj->getPort("functional");
mem_port->setPeer(port);
port->setPeer(mem_port);
diff --git a/cpu/cpu_exec_context.hh b/cpu/cpu_exec_context.hh
index 9bf548a45..7ceb7f2d8 100644
--- a/cpu/cpu_exec_context.hh
+++ b/cpu/cpu_exec_context.hh
@@ -205,8 +205,8 @@ class CPUExecContext
CPUExecContext(BaseCPU *_cpu, int _thread_num, System *_system,
AlphaITB *_itb, AlphaDTB *_dtb);
#else
- CPUExecContext(BaseCPU *_cpu, int _thread_num, Process *_process,
- int _asid);
+ CPUExecContext(BaseCPU *_cpu, int _thread_num, Process *_process, int _asid,
+ MemObject *memobj);
// Constructor to use XC to pass reg file around. Not used for anything
// else.
CPUExecContext(RegFile *regFile);
diff --git a/cpu/simple/cpu.cc b/cpu/simple/cpu.cc
index b7cfc4f16..049606036 100644
--- a/cpu/simple/cpu.cc
+++ b/cpu/simple/cpu.cc
@@ -169,7 +169,7 @@ SimpleCPU::SimpleCPU(Params *p)
cpuXC = new CPUExecContext(this, 0, p->system, p->itb, p->dtb);
#else
cpuXC = new CPUExecContext(this, /* thread_num */ 0, p->process,
- /* asid */ 0);
+ /* asid */ 0, mem);
#endif // !FULL_SYSTEM
xcProxy = cpuXC->getProxy();
diff --git a/mem/port.hh b/mem/port.hh
index 67e259557..1884e96bf 100644
--- a/mem/port.hh
+++ b/mem/port.hh
@@ -165,8 +165,8 @@ class Port
/** Function called by the associated device to send a functional access,
an access in which the data is instantly updated everywhere in the
- memory system, without affecting the current state of any block
- or moving the block.
+ memory system, without affecting the current state of any block or
+ moving the block.
*/
void sendFunctional(Packet &pkt)
{ return peer->recvFunctional(pkt); }
@@ -220,4 +220,19 @@ class Port
void blobHelper(Addr addr, uint8_t *p, int size, Command cmd);
};
+/** A simple functional port that is only meant for one way communication to
+ * physical memory. It is only meant to be used to load data into memory before
+ * the simulation begins.
+ */
+
+class FunctionalPort : public Port
+{
+ public:
+ virtual bool recvTiming(Packet &pkt) { panic("FuncPort is UniDir"); }
+ virtual Tick recvAtomic(Packet &pkt) { panic("FuncPort is UniDir"); }
+ virtual void recvFunctional(Packet &pkt) { panic("FuncPort is UniDir"); }
+ virtual void recvStatusChange(Status status) {panic("FuncPort is UniDir");}
+};
+
+
#endif //__MEM_PORT_HH__
diff --git a/mem/translating_port.hh b/mem/translating_port.hh
index f6ad3ebb9..7611ac3c7 100644
--- a/mem/translating_port.hh
+++ b/mem/translating_port.hh
@@ -33,7 +33,7 @@
class PageTable;
-class TranslatingPort : public Port
+class TranslatingPort : public FunctionalPort
{
private:
PageTable *pTable;
@@ -59,11 +59,6 @@ class TranslatingPort : public Port
void writeString(Addr addr, const char *str);
void readString(std::string &str, Addr addr);
- virtual bool recvTiming(Packet &pkt) { panic("TransPort is UniDir"); }
- virtual Tick recvAtomic(Packet &pkt) { panic("TransPort is UniDir"); }
- virtual void recvFunctional(Packet &pkt) { panic("TransPort is UniDir"); }
- virtual void recvStatusChange(Status status) {panic("TransPort is UniDir");}
-
};
#endif
diff --git a/sim/system.cc b/sim/system.cc
index c1eaaf916..cfa316b11 100644
--- a/sim/system.cc
+++ b/sim/system.cc
@@ -36,6 +36,16 @@ System::System(Params *p)
kernelSymtab = new SymbolTable;
debugSymbolTable = new SymbolTable;
+
+ /**
+ * Get a functional port to memory
+ */
+ Port *mem_port;
+ mem_port = physmem->getPort("functional");
+ functionalPort.setPeer(mem_port);
+ mem_port->setPeer(&functionalPort);
+
+
/**
* Load the kernel code into memory
*/
@@ -45,7 +55,7 @@ System::System(Params *p)
fatal("Could not load kernel file %s", params()->kernel_path);
// Load program sections into memory
- kernel->loadSections(physmem, true);
+ kernel->loadSections(&functionalPort, LoadAddrMask);
// setup entry points
kernelStart = kernel->textBase();
diff --git a/sim/system.hh b/sim/system.hh
index 0f82f81f5..11f8ac70a 100644
--- a/sim/system.hh
+++ b/sim/system.hh
@@ -36,6 +36,7 @@
#include "base/misc.hh"
#include "base/statistics.hh"
#include "cpu/pc_event.hh"
+#include "mem/port.hh"
#include "sim/sim_object.hh"
#if FULL_SYSTEM
#include "kern/system_events.hh"
@@ -76,6 +77,10 @@ class System : public SimObject
Platform *platform;
uint64_t init_param;
+ /** Port to physical memory used for writing object files into ram at
+ * boot.*/
+ FunctionalPort functionalPort;
+
/** kernel symbol table */
SymbolTable *kernelSymtab;
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-10 14:53:10 +0000