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-rw-r--r--src/mem/bridge.cc8
-rw-r--r--src/mem/bridge.hh2
-rw-r--r--src/mem/cache/base.cc12
-rw-r--r--src/mem/cache/mshr.cc12
-rw-r--r--src/mem/cache/mshr.hh4
-rw-r--r--src/mem/cache/queue.hh4
-rw-r--r--src/mem/cache/write_queue_entry.cc10
-rw-r--r--src/mem/cache/write_queue_entry.hh4
-rw-r--r--src/mem/coherent_xbar.cc4
-rw-r--r--src/mem/dram_ctrl.cc2
-rw-r--r--src/mem/dramsim2.cc2
-rw-r--r--src/mem/mem_delay.cc10
-rw-r--r--src/mem/mem_delay.hh2
-rw-r--r--src/mem/noncoherent_xbar.cc2
-rw-r--r--src/mem/packet.cc2
-rw-r--r--src/mem/packet.hh14
-rw-r--r--src/mem/packet_queue.cc4
-rw-r--r--src/mem/packet_queue.hh2
-rw-r--r--src/mem/qport.hh10
-rw-r--r--src/mem/ruby/slicc_interface/AbstractController.cc2
-rw-r--r--src/mem/serial_link.cc8
-rw-r--r--src/mem/serial_link.hh2
-rw-r--r--src/mem/simple_mem.cc2
-rw-r--r--src/mem/tport.cc2
24 files changed, 63 insertions, 63 deletions
diff --git a/src/mem/bridge.cc b/src/mem/bridge.cc
index 0c9e2c15a..1066f47a0 100644
--- a/src/mem/bridge.cc
+++ b/src/mem/bridge.cc
@@ -361,14 +361,14 @@ Bridge::BridgeSlavePort::recvFunctional(PacketPtr pkt)
// check the response queue
for (auto i = transmitList.begin(); i != transmitList.end(); ++i) {
- if (pkt->checkFunctional((*i).pkt)) {
+ if (pkt->trySatisfyFunctional((*i).pkt)) {
pkt->makeResponse();
return;
}
}
// also check the master port's request queue
- if (masterPort.checkFunctional(pkt)) {
+ if (masterPort.trySatisfyFunctional(pkt)) {
return;
}
@@ -379,13 +379,13 @@ Bridge::BridgeSlavePort::recvFunctional(PacketPtr pkt)
}
bool
-Bridge::BridgeMasterPort::checkFunctional(PacketPtr pkt)
+Bridge::BridgeMasterPort::trySatisfyFunctional(PacketPtr pkt)
{
bool found = false;
auto i = transmitList.begin();
while (i != transmitList.end() && !found) {
- if (pkt->checkFunctional((*i).pkt)) {
+ if (pkt->trySatisfyFunctional((*i).pkt)) {
pkt->makeResponse();
found = true;
}
diff --git a/src/mem/bridge.hh b/src/mem/bridge.hh
index f2cc44501..bb7727717 100644
--- a/src/mem/bridge.hh
+++ b/src/mem/bridge.hh
@@ -295,7 +295,7 @@ class Bridge : public MemObject
*
* @return true if we find a match
*/
- bool checkFunctional(PacketPtr pkt);
+ bool trySatisfyFunctional(PacketPtr pkt);
protected:
diff --git a/src/mem/cache/base.cc b/src/mem/cache/base.cc
index c1ebdd6c0..862aa3a94 100644
--- a/src/mem/cache/base.cc
+++ b/src/mem/cache/base.cc
@@ -664,8 +664,8 @@ BaseCache::functionalAccess(PacketPtr pkt, bool from_cpu_side)
// see if we have data at all (owned or otherwise)
bool have_data = blk && blk->isValid()
- && pkt->checkFunctional(&cbpw, blk_addr, is_secure, blkSize,
- blk->data);
+ && pkt->trySatisfyFunctional(&cbpw, blk_addr, is_secure, blkSize,
+ blk->data);
// data we have is dirty if marked as such or if we have an
// in-service MSHR that is pending a modified line
@@ -674,10 +674,10 @@ BaseCache::functionalAccess(PacketPtr pkt, bool from_cpu_side)
(mshr && mshr->inService && mshr->isPendingModified()));
bool done = have_dirty ||
- cpuSidePort.checkFunctional(pkt) ||
- mshrQueue.checkFunctional(pkt, blk_addr) ||
- writeBuffer.checkFunctional(pkt, blk_addr) ||
- memSidePort.checkFunctional(pkt);
+ cpuSidePort.trySatisfyFunctional(pkt) ||
+ mshrQueue.trySatisfyFunctional(pkt, blk_addr) ||
+ writeBuffer.trySatisfyFunctional(pkt, blk_addr) ||
+ memSidePort.trySatisfyFunctional(pkt);
DPRINTF(CacheVerbose, "%s: %s %s%s%s\n", __func__, pkt->print(),
(blk && blk->isValid()) ? "valid " : "",
diff --git a/src/mem/cache/mshr.cc b/src/mem/cache/mshr.cc
index 8629b3377..ccaec7b97 100644
--- a/src/mem/cache/mshr.cc
+++ b/src/mem/cache/mshr.cc
@@ -207,10 +207,10 @@ MSHR::TargetList::clearDownstreamPending()
bool
-MSHR::TargetList::checkFunctional(PacketPtr pkt)
+MSHR::TargetList::trySatisfyFunctional(PacketPtr pkt)
{
for (auto& t : *this) {
- if (pkt->checkFunctional(t.pkt)) {
+ if (pkt->trySatisfyFunctional(t.pkt)) {
return true;
}
}
@@ -618,17 +618,17 @@ MSHR::promoteWritable()
bool
-MSHR::checkFunctional(PacketPtr pkt)
+MSHR::trySatisfyFunctional(PacketPtr pkt)
{
// For printing, we treat the MSHR as a whole as single entity.
// For other requests, we iterate over the individual targets
// since that's where the actual data lies.
if (pkt->isPrint()) {
- pkt->checkFunctional(this, blkAddr, isSecure, blkSize, nullptr);
+ pkt->trySatisfyFunctional(this, blkAddr, isSecure, blkSize, nullptr);
return false;
} else {
- return (targets.checkFunctional(pkt) ||
- deferredTargets.checkFunctional(pkt));
+ return (targets.trySatisfyFunctional(pkt) ||
+ deferredTargets.trySatisfyFunctional(pkt));
}
}
diff --git a/src/mem/cache/mshr.hh b/src/mem/cache/mshr.hh
index 050dbd1bf..218de9244 100644
--- a/src/mem/cache/mshr.hh
+++ b/src/mem/cache/mshr.hh
@@ -235,7 +235,7 @@ class MSHR : public QueueEntry, public Printable
void clearDownstreamPending();
void clearDownstreamPending(iterator begin, iterator end);
- bool checkFunctional(PacketPtr pkt);
+ bool trySatisfyFunctional(PacketPtr pkt);
void print(std::ostream &os, int verbosity,
const std::string &prefix) const;
};
@@ -414,7 +414,7 @@ class MSHR : public QueueEntry, public Printable
*/
void promoteWritable();
- bool checkFunctional(PacketPtr pkt);
+ bool trySatisfyFunctional(PacketPtr pkt);
/**
* Prints the contents of this MSHR for debugging.
diff --git a/src/mem/cache/queue.hh b/src/mem/cache/queue.hh
index 8e5ccf1f4..1d7ce0c07 100644
--- a/src/mem/cache/queue.hh
+++ b/src/mem/cache/queue.hh
@@ -177,11 +177,11 @@ class Queue : public Drainable
return nullptr;
}
- bool checkFunctional(PacketPtr pkt, Addr blk_addr)
+ bool trySatisfyFunctional(PacketPtr pkt, Addr blk_addr)
{
pkt->pushLabel(label);
for (const auto& entry : allocatedList) {
- if (entry->blkAddr == blk_addr && entry->checkFunctional(pkt)) {
+ if (entry->blkAddr == blk_addr && entry->trySatisfyFunctional(pkt)) {
pkt->popLabel();
return true;
}
diff --git a/src/mem/cache/write_queue_entry.cc b/src/mem/cache/write_queue_entry.cc
index e393731b7..6c8387bcb 100644
--- a/src/mem/cache/write_queue_entry.cc
+++ b/src/mem/cache/write_queue_entry.cc
@@ -66,10 +66,10 @@ WriteQueueEntry::TargetList::add(PacketPtr pkt, Tick readyTime,
}
bool
-WriteQueueEntry::TargetList::checkFunctional(PacketPtr pkt)
+WriteQueueEntry::TargetList::trySatisfyFunctional(PacketPtr pkt)
{
for (auto& t : *this) {
- if (pkt->checkFunctional(t.pkt)) {
+ if (pkt->trySatisfyFunctional(t.pkt)) {
return true;
}
}
@@ -122,16 +122,16 @@ WriteQueueEntry::deallocate()
}
bool
-WriteQueueEntry::checkFunctional(PacketPtr pkt)
+WriteQueueEntry::trySatisfyFunctional(PacketPtr pkt)
{
// For printing, we treat the WriteQueueEntry as a whole as single
// entity. For other requests, we iterate over the individual
// targets since that's where the actual data lies.
if (pkt->isPrint()) {
- pkt->checkFunctional(this, blkAddr, isSecure, blkSize, nullptr);
+ pkt->trySatisfyFunctional(this, blkAddr, isSecure, blkSize, nullptr);
return false;
} else {
- return targets.checkFunctional(pkt);
+ return targets.trySatisfyFunctional(pkt);
}
}
diff --git a/src/mem/cache/write_queue_entry.hh b/src/mem/cache/write_queue_entry.hh
index 5a4b5a820..f4ccb1a8c 100644
--- a/src/mem/cache/write_queue_entry.hh
+++ b/src/mem/cache/write_queue_entry.hh
@@ -97,7 +97,7 @@ class WriteQueueEntry : public QueueEntry, public Printable
TargetList() {}
void add(PacketPtr pkt, Tick readyTime, Counter order);
- bool checkFunctional(PacketPtr pkt);
+ bool trySatisfyFunctional(PacketPtr pkt);
void print(std::ostream &os, int verbosity,
const std::string &prefix) const;
};
@@ -179,7 +179,7 @@ class WriteQueueEntry : public QueueEntry, public Printable
targets.pop_front();
}
- bool checkFunctional(PacketPtr pkt);
+ bool trySatisfyFunctional(PacketPtr pkt);
/**
* Prints the contents of this MSHR for debugging.
diff --git a/src/mem/coherent_xbar.cc b/src/mem/coherent_xbar.cc
index d46f3893f..2bee5bc9d 100644
--- a/src/mem/coherent_xbar.cc
+++ b/src/mem/coherent_xbar.cc
@@ -1002,7 +1002,7 @@ CoherentXBar::recvFunctional(PacketPtr pkt, PortID slave_port_id)
// if we find a response that has the data, then the
// downstream caches/memories may be out of date, so simply stop
// here
- if (p->checkFunctional(pkt)) {
+ if (p->trySatisfyFunctional(pkt)) {
if (pkt->needsResponse())
pkt->makeResponse();
return;
@@ -1025,7 +1025,7 @@ CoherentXBar::recvFunctionalSnoop(PacketPtr pkt, PortID master_port_id)
}
for (const auto& p : slavePorts) {
- if (p->checkFunctional(pkt)) {
+ if (p->trySatisfyFunctional(pkt)) {
if (pkt->needsResponse())
pkt->makeResponse();
return;
diff --git a/src/mem/dram_ctrl.cc b/src/mem/dram_ctrl.cc
index 1a3eec48d..ba1a5ca7b 100644
--- a/src/mem/dram_ctrl.cc
+++ b/src/mem/dram_ctrl.cc
@@ -2745,7 +2745,7 @@ DRAMCtrl::MemoryPort::recvFunctional(PacketPtr pkt)
{
pkt->pushLabel(memory.name());
- if (!queue.checkFunctional(pkt)) {
+ if (!queue.trySatisfyFunctional(pkt)) {
// Default implementation of SimpleTimingPort::recvFunctional()
// calls recvAtomic() and throws away the latency; we can save a
// little here by just not calculating the latency.
diff --git a/src/mem/dramsim2.cc b/src/mem/dramsim2.cc
index b900d4df0..6fe854364 100644
--- a/src/mem/dramsim2.cc
+++ b/src/mem/dramsim2.cc
@@ -169,7 +169,7 @@ DRAMSim2::recvFunctional(PacketPtr pkt)
// potentially update the packets in our response queue as well
for (auto i = responseQueue.begin(); i != responseQueue.end(); ++i)
- pkt->checkFunctional(*i);
+ pkt->trySatisfyFunctional(*i);
pkt->popLabel();
}
diff --git a/src/mem/mem_delay.cc b/src/mem/mem_delay.cc
index 4a682f3bc..b3c89d2a3 100644
--- a/src/mem/mem_delay.cc
+++ b/src/mem/mem_delay.cc
@@ -81,10 +81,10 @@ MemDelay::getSlavePort(const std::string& if_name, PortID idx)
}
bool
-MemDelay::checkFunctional(PacketPtr pkt)
+MemDelay::trySatisfyFunctional(PacketPtr pkt)
{
- return slavePort.checkFunctional(pkt) ||
- masterPort.checkFunctional(pkt);
+ return slavePort.trySatisfyFunctional(pkt) ||
+ masterPort.trySatisfyFunctional(pkt);
}
MemDelay::MasterPort::MasterPort(const std::string &_name, MemDelay &_parent)
@@ -107,7 +107,7 @@ MemDelay::MasterPort::recvTimingResp(PacketPtr pkt)
void
MemDelay::MasterPort::recvFunctionalSnoop(PacketPtr pkt)
{
- if (parent.checkFunctional(pkt)) {
+ if (parent.trySatisfyFunctional(pkt)) {
pkt->makeResponse();
} else {
parent.slavePort.sendFunctionalSnoop(pkt);
@@ -156,7 +156,7 @@ MemDelay::SlavePort::recvTimingReq(PacketPtr pkt)
void
MemDelay::SlavePort::recvFunctional(PacketPtr pkt)
{
- if (parent.checkFunctional(pkt)) {
+ if (parent.trySatisfyFunctional(pkt)) {
pkt->makeResponse();
} else {
parent.masterPort.sendFunctional(pkt);
diff --git a/src/mem/mem_delay.hh b/src/mem/mem_delay.hh
index 28c04052b..7ecb656f5 100644
--- a/src/mem/mem_delay.hh
+++ b/src/mem/mem_delay.hh
@@ -125,7 +125,7 @@ class MemDelay : public MemObject
};
- bool checkFunctional(PacketPtr pkt);
+ bool trySatisfyFunctional(PacketPtr pkt);
MasterPort masterPort;
SlavePort slavePort;
diff --git a/src/mem/noncoherent_xbar.cc b/src/mem/noncoherent_xbar.cc
index 7bd04cb3e..b0fe205c1 100644
--- a/src/mem/noncoherent_xbar.cc
+++ b/src/mem/noncoherent_xbar.cc
@@ -297,7 +297,7 @@ NoncoherentXBar::recvFunctional(PacketPtr pkt, PortID slave_port_id)
// if we find a response that has the data, then the
// downstream caches/memories may be out of date, so simply stop
// here
- if (p->checkFunctional(pkt)) {
+ if (p->trySatisfyFunctional(pkt)) {
if (pkt->needsResponse())
pkt->makeResponse();
return;
diff --git a/src/mem/packet.cc b/src/mem/packet.cc
index 7a28fbf5b..866bc9051 100644
--- a/src/mem/packet.cc
+++ b/src/mem/packet.cc
@@ -225,7 +225,7 @@ MemCmd::commandInfo[] =
};
bool
-Packet::checkFunctional(Printable *obj, Addr addr, bool is_secure, int size,
+Packet::trySatisfyFunctional(Printable *obj, Addr addr, bool is_secure, int size,
uint8_t *_data)
{
const Addr func_start = getAddr();
diff --git a/src/mem/packet.hh b/src/mem/packet.hh
index 5c041120a..36a46438a 100644
--- a/src/mem/packet.hh
+++ b/src/mem/packet.hh
@@ -1168,14 +1168,14 @@ class Packet : public Printable
* accordingly.
*/
bool
- checkFunctional(PacketPtr other)
+ trySatisfyFunctional(PacketPtr other)
{
// all packets that are carrying a payload should have a valid
// data pointer
- return checkFunctional(other, other->getAddr(), other->isSecure(),
- other->getSize(),
- other->hasData() ?
- other->getPtr<uint8_t>() : NULL);
+ return trySatisfyFunctional(other, other->getAddr(), other->isSecure(),
+ other->getSize(),
+ other->hasData() ?
+ other->getPtr<uint8_t>() : NULL);
}
/**
@@ -1206,8 +1206,8 @@ class Packet : public Printable
* memory value.
*/
bool
- checkFunctional(Printable *obj, Addr base, bool is_secure, int size,
- uint8_t *_data);
+ trySatisfyFunctional(Printable *obj, Addr base, bool is_secure, int size,
+ uint8_t *_data);
/**
* Push label for PrintReq (safe to call unconditionally).
diff --git a/src/mem/packet_queue.cc b/src/mem/packet_queue.cc
index a630f1f5f..7aa2fc1f9 100644
--- a/src/mem/packet_queue.cc
+++ b/src/mem/packet_queue.cc
@@ -82,7 +82,7 @@ PacketQueue::hasAddr(Addr addr) const
}
bool
-PacketQueue::checkFunctional(PacketPtr pkt)
+PacketQueue::trySatisfyFunctional(PacketPtr pkt)
{
pkt->pushLabel(label);
@@ -92,7 +92,7 @@ PacketQueue::checkFunctional(PacketPtr pkt)
while (!found && i != transmitList.end()) {
// If the buffered packet contains data, and it overlaps the
// current packet, then update data
- found = pkt->checkFunctional(i->pkt);
+ found = pkt->trySatisfyFunctional(i->pkt);
++i;
}
diff --git a/src/mem/packet_queue.hh b/src/mem/packet_queue.hh
index f7379c900..629fca58e 100644
--- a/src/mem/packet_queue.hh
+++ b/src/mem/packet_queue.hh
@@ -169,7 +169,7 @@ class PacketQueue : public Drainable
/** Check the list of buffered packets against the supplied
* functional request. */
- bool checkFunctional(PacketPtr pkt);
+ bool trySatisfyFunctional(PacketPtr pkt);
/**
* Schedule a send event if we are not already waiting for a
diff --git a/src/mem/qport.hh b/src/mem/qport.hh
index b15bdfec2..708347a21 100644
--- a/src/mem/qport.hh
+++ b/src/mem/qport.hh
@@ -93,8 +93,8 @@ class QueuedSlavePort : public SlavePort
/** Check the list of buffered packets against the supplied
* functional request. */
- bool checkFunctional(PacketPtr pkt)
- { return respQueue.checkFunctional(pkt); }
+ bool trySatisfyFunctional(PacketPtr pkt)
+ { return respQueue.trySatisfyFunctional(pkt); }
};
/**
@@ -159,10 +159,10 @@ class QueuedMasterPort : public MasterPort
/** Check the list of buffered packets against the supplied
* functional request. */
- bool checkFunctional(PacketPtr pkt)
+ bool trySatisfyFunctional(PacketPtr pkt)
{
- return reqQueue.checkFunctional(pkt) ||
- snoopRespQueue.checkFunctional(pkt);
+ return reqQueue.trySatisfyFunctional(pkt) ||
+ snoopRespQueue.trySatisfyFunctional(pkt);
}
};
diff --git a/src/mem/ruby/slicc_interface/AbstractController.cc b/src/mem/ruby/slicc_interface/AbstractController.cc
index 5f7eb6558..de7e03dd7 100644
--- a/src/mem/ruby/slicc_interface/AbstractController.cc
+++ b/src/mem/ruby/slicc_interface/AbstractController.cc
@@ -318,7 +318,7 @@ AbstractController::functionalMemoryWrite(PacketPtr pkt)
int num_functional_writes = 0;
// Check the buffer from the controller to the memory.
- if (memoryPort.checkFunctional(pkt)) {
+ if (memoryPort.trySatisfyFunctional(pkt)) {
num_functional_writes++;
}
diff --git a/src/mem/serial_link.cc b/src/mem/serial_link.cc
index 97563c0d0..e1f3a001a 100644
--- a/src/mem/serial_link.cc
+++ b/src/mem/serial_link.cc
@@ -393,14 +393,14 @@ SerialLink::SerialLinkSlavePort::recvFunctional(PacketPtr pkt)
// check the response queue
for (auto i = transmitList.begin(); i != transmitList.end(); ++i) {
- if (pkt->checkFunctional((*i).pkt)) {
+ if (pkt->trySatisfyFunctional((*i).pkt)) {
pkt->makeResponse();
return;
}
}
// also check the master port's request queue
- if (masterPort.checkFunctional(pkt)) {
+ if (masterPort.trySatisfyFunctional(pkt)) {
return;
}
@@ -411,13 +411,13 @@ SerialLink::SerialLinkSlavePort::recvFunctional(PacketPtr pkt)
}
bool
-SerialLink::SerialLinkMasterPort::checkFunctional(PacketPtr pkt)
+SerialLink::SerialLinkMasterPort::trySatisfyFunctional(PacketPtr pkt)
{
bool found = false;
auto i = transmitList.begin();
while (i != transmitList.end() && !found) {
- if (pkt->checkFunctional((*i).pkt)) {
+ if (pkt->trySatisfyFunctional((*i).pkt)) {
pkt->makeResponse();
found = true;
}
diff --git a/src/mem/serial_link.hh b/src/mem/serial_link.hh
index 64f262d0f..6315f1b94 100644
--- a/src/mem/serial_link.hh
+++ b/src/mem/serial_link.hh
@@ -288,7 +288,7 @@ class SerialLink : public MemObject
*
* @return true if we find a match
*/
- bool checkFunctional(PacketPtr pkt);
+ bool trySatisfyFunctional(PacketPtr pkt);
protected:
diff --git a/src/mem/simple_mem.cc b/src/mem/simple_mem.cc
index 6914ac4f6..64d7d204c 100644
--- a/src/mem/simple_mem.cc
+++ b/src/mem/simple_mem.cc
@@ -91,7 +91,7 @@ SimpleMemory::recvFunctional(PacketPtr pkt)
auto p = packetQueue.begin();
// potentially update the packets in our packet queue as well
while (!done && p != packetQueue.end()) {
- done = pkt->checkFunctional(p->pkt);
+ done = pkt->trySatisfyFunctional(p->pkt);
++p;
}
diff --git a/src/mem/tport.cc b/src/mem/tport.cc
index fce4f6ca2..9f0f08814 100644
--- a/src/mem/tport.cc
+++ b/src/mem/tport.cc
@@ -54,7 +54,7 @@ SimpleTimingPort::SimpleTimingPort(const std::string& _name,
void
SimpleTimingPort::recvFunctional(PacketPtr pkt)
{
- if (!respQueue.checkFunctional(pkt)) {
+ if (!respQueue.trySatisfyFunctional(pkt)) {
// do an atomic access and throw away the returned latency
recvAtomic(pkt);
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-17 02:57:13 +0000