diff options
| -rw-r--r-- | cpu/base_cpu.cc | 15 | ||||
| -rw-r--r-- | cpu/base_cpu.hh | 7 | ||||
| -rw-r--r-- | cpu/simple_cpu/simple_cpu.cc | 14 | ||||
| -rw-r--r-- | cpu/simple_cpu/simple_cpu.hh | 3 | ||||
| -rw-r--r-- | sim/system.cc | 16 | ||||
| -rw-r--r-- | sim/system.hh | 2 |
6 files changed, 30 insertions, 27 deletions
diff --git a/cpu/base_cpu.cc b/cpu/base_cpu.cc index 8a9c9a102..7fb8b414f 100644 --- a/cpu/base_cpu.cc +++ b/cpu/base_cpu.cc @@ -47,21 +47,22 @@ vector<BaseCPU *> BaseCPU::cpuList; int maxThreadsPerCPU = 1; #ifdef FULL_SYSTEM -BaseCPU::BaseCPU(const string &_name, int _number_of_threads, +BaseCPU::BaseCPU(const string &_name, int _number_of_threads, bool _def_reg, Counter max_insts_any_thread, Counter max_insts_all_threads, Counter max_loads_any_thread, Counter max_loads_all_threads, System *_system, Tick freq) - : SimObject(_name), frequency(freq), + : SimObject(_name), frequency(freq), deferRegistration(_def_reg), number_of_threads(_number_of_threads), system(_system) #else -BaseCPU::BaseCPU(const string &_name, int _number_of_threads, +BaseCPU::BaseCPU(const string &_name, int _number_of_threads, bool _def_reg, Counter max_insts_any_thread, Counter max_insts_all_threads, Counter max_loads_any_thread, Counter max_loads_all_threads) - : SimObject(_name), number_of_threads(_number_of_threads) + : SimObject(_name), deferRegistration(_def_reg), + number_of_threads(_number_of_threads) #endif { // add self to global list of CPUs @@ -126,6 +127,12 @@ BaseCPU::BaseCPU(const string &_name, int _number_of_threads, #endif } +void +BaseCPU::init() +{ + if (!deferRegistration) + registerExecContexts(); +} void BaseCPU::regStats() diff --git a/cpu/base_cpu.hh b/cpu/base_cpu.hh index f75f00409..7e937c755 100644 --- a/cpu/base_cpu.hh +++ b/cpu/base_cpu.hh @@ -91,12 +91,12 @@ class BaseCPU : public SimObject public: #ifdef FULL_SYSTEM - BaseCPU(const std::string &_name, int _number_of_threads, + BaseCPU(const std::string &_name, int _number_of_threads, bool _def_reg, Counter max_insts_any_thread, Counter max_insts_all_threads, Counter max_loads_any_thread, Counter max_loads_all_threads, System *_system, Tick freq); #else - BaseCPU(const std::string &_name, int _number_of_threads, + BaseCPU(const std::string &_name, int _number_of_threads, bool _def_reg, Counter max_insts_any_thread = 0, Counter max_insts_all_threads = 0, Counter max_loads_any_thread = 0, @@ -105,8 +105,10 @@ class BaseCPU : public SimObject virtual ~BaseCPU() {} + virtual void init(); virtual void regStats(); + bool deferRegistration; void registerExecContexts(); /// Prepare for another CPU to take over execution. Called by @@ -140,7 +142,6 @@ class BaseCPU : public SimObject #ifdef FULL_SYSTEM System *system; - /** * Serialize this object to the given output stream. * @param os The stream to serialize to. diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc index 8ea5798ea..6af67eee0 100644 --- a/cpu/simple_cpu/simple_cpu.cc +++ b/cpu/simple_cpu/simple_cpu.cc @@ -124,7 +124,7 @@ SimpleCPU::SimpleCPU(const string &_name, MemInterface *icache_interface, MemInterface *dcache_interface, bool _def_reg, Tick freq) - : BaseCPU(_name, /* number_of_threads */ 1, + : BaseCPU(_name, /* number_of_threads */ 1, _def_reg, max_insts_any_thread, max_insts_all_threads, max_loads_any_thread, max_loads_all_threads, _system, freq), @@ -137,12 +137,11 @@ SimpleCPU::SimpleCPU(const string &_name, Process *_process, MemInterface *icache_interface, MemInterface *dcache_interface, bool _def_reg) - : BaseCPU(_name, /* number_of_threads */ 1, + : BaseCPU(_name, /* number_of_threads */ 1, _def_reg, max_insts_any_thread, max_insts_all_threads, max_loads_any_thread, max_loads_all_threads), #endif - tickEvent(this), xc(NULL), defer_registration(_def_reg), - cacheCompletionEvent(this) + tickEvent(this), xc(NULL), cacheCompletionEvent(this) { _status = Idle; #ifdef FULL_SYSTEM @@ -176,13 +175,6 @@ SimpleCPU::~SimpleCPU() { } -void SimpleCPU::init() -{ - if (!defer_registration) { - this->registerExecContexts(); - } -} - void SimpleCPU::switchOut() { diff --git a/cpu/simple_cpu/simple_cpu.hh b/cpu/simple_cpu/simple_cpu.hh index d0000dc5b..1610d6060 100644 --- a/cpu/simple_cpu/simple_cpu.hh +++ b/cpu/simple_cpu/simple_cpu.hh @@ -158,7 +158,6 @@ class SimpleCPU : public BaseCPU #endif virtual ~SimpleCPU(); - virtual void init(); // execution context ExecContext *xc; @@ -178,8 +177,6 @@ class SimpleCPU : public BaseCPU // L1 data cache MemInterface *dcacheInterface; - bool defer_registration; - // current instruction MachInst inst; diff --git a/sim/system.cc b/sim/system.cc index 9fdadf649..1b1a145c6 100644 --- a/sim/system.cc +++ b/sim/system.cc @@ -194,12 +194,6 @@ System::registerExecContext(ExecContext *xc) int xcIndex = execContexts.size(); execContexts.push_back(xc); - if (xcIndex == 0) { - // activate with zero delay so that we start ticking right - // away on cycle 0 - xc->activate(0); - } - RemoteGDB *rgdb = new RemoteGDB(this, xc); GDBListener *gdbl = new GDBListener(rgdb, 7000 + xcIndex); gdbl->listen(); @@ -219,6 +213,16 @@ System::registerExecContext(ExecContext *xc) } void +System::startup() +{ + if (!execContexts.empty()) { + // activate with zero delay so that we start ticking right + // away on cycle 0 + execContexts[0]->activate(0); + } +} + +void System::replaceExecContext(ExecContext *xc, int xcIndex) { if (xcIndex >= execContexts.size()) { diff --git a/sim/system.hh b/sim/system.hh index 5294f417e..61784b044 100644 --- a/sim/system.hh +++ b/sim/system.hh @@ -122,6 +122,8 @@ class System : public SimObject System(Params *p); ~System(); + void startup(); + public: /** * Returns the addess the kernel starts at. |