diff options
| -rw-r--r-- | src/arch/arm/insts/macromem.hh | 9 | ||||
| -rw-r--r-- | src/arch/arm/insts/mem.hh | 20 | ||||
| -rw-r--r-- | src/arch/arm/isa/formats/mem.isa | 198 | ||||
| -rw-r--r-- | src/arch/arm/isa/formats/util.isa | 29 |
4 files changed, 7 insertions, 249 deletions
diff --git a/src/arch/arm/insts/macromem.hh b/src/arch/arm/insts/macromem.hh index cfc2075a1..7b566bb57 100644 --- a/src/arch/arm/insts/macromem.hh +++ b/src/arch/arm/insts/macromem.hh @@ -54,10 +54,6 @@ class ArmMacroMemoryOp : public PredMacroOp protected: /// Memory request flags. See mem_req_base.hh. unsigned memAccessFlags; - /// Pointer to EAComp object. - const StaticInstPtr eaCompPtr; - /// Pointer to MemAcc object. - const StaticInstPtr memAccPtr; uint32_t reglist; uint32_t ones; @@ -69,12 +65,9 @@ class ArmMacroMemoryOp : public PredMacroOp loadop; ArmMacroMemoryOp(const char *mnem, ExtMachInst _machInst, - OpClass __opClass, - StaticInstPtr _eaCompPtr = nullStaticInstPtr, - StaticInstPtr _memAccPtr = nullStaticInstPtr) + OpClass __opClass) : PredMacroOp(mnem, _machInst, __opClass), memAccessFlags(0), - eaCompPtr(_eaCompPtr), memAccPtr(_memAccPtr), reglist(machInst.regList), ones(0), puswl(machInst.puswl), prepost(machInst.puswl.prepost), diff --git a/src/arch/arm/insts/mem.hh b/src/arch/arm/insts/mem.hh index 846089566..a5c64a86c 100644 --- a/src/arch/arm/insts/mem.hh +++ b/src/arch/arm/insts/mem.hh @@ -42,10 +42,6 @@ class Memory : public PredOp /// Memory request flags. See mem_req_base.hh. unsigned memAccessFlags; - /// Pointer to EAComp object. - const StaticInstPtr eaCompPtr; - /// Pointer to MemAcc object. - const StaticInstPtr memAccPtr; /// Displacement for EA calculation (signed). int32_t disp; @@ -56,12 +52,9 @@ class Memory : public PredOp shift; /// Constructor - Memory(const char *mnem, ExtMachInst _machInst, OpClass __opClass, - StaticInstPtr _eaCompPtr = nullStaticInstPtr, - StaticInstPtr _memAccPtr = nullStaticInstPtr) + Memory(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : PredOp(mnem, _machInst, __opClass), memAccessFlags(0), - eaCompPtr(_eaCompPtr), memAccPtr(_memAccPtr), disp(machInst.immed11_0), disp8(machInst.immed7_0 << 2), up(machInst.puswl.up), @@ -72,11 +65,6 @@ class Memory : public PredOp std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; - - public: - - const StaticInstPtr &eaCompInst() const { return eaCompPtr; } - const StaticInstPtr &memAccInst() const { return memAccPtr; } }; /** @@ -87,10 +75,8 @@ class MemoryNoDisp : public Memory { protected: /// Constructor - MemoryNoDisp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, - StaticInstPtr _eaCompPtr = nullStaticInstPtr, - StaticInstPtr _memAccPtr = nullStaticInstPtr) - : Memory(mnem, _machInst, __opClass, _eaCompPtr, _memAccPtr) + MemoryNoDisp(const char *mnem, ExtMachInst _machInst, OpClass __opClass) + : Memory(mnem, _machInst, __opClass) { } diff --git a/src/arch/arm/isa/formats/mem.isa b/src/arch/arm/isa/formats/mem.isa index e3eed5df1..2bdd568c7 100644 --- a/src/arch/arm/isa/formats/mem.isa +++ b/src/arch/arm/isa/formats/mem.isa @@ -39,32 +39,6 @@ def template LoadStoreDeclare {{ */ class %(class_name)s : public %(base_class)s { - protected: - - /** - * "Fake" effective address computation class for "%(mnemonic)s". - */ - class EAComp : public %(base_class)s - { - public: - /// Constructor - EAComp(ExtMachInst machInst); - - %(BasicExecDeclare)s - }; - - /** - * "Fake" memory access instruction class for "%(mnemonic)s". - */ - class MemAcc : public %(base_class)s - { - public: - /// Constructor - MemAcc(ExtMachInst machInst); - - %(BasicExecDeclare)s - }; - public: /// Constructor. @@ -89,87 +63,15 @@ def template CompleteAccDeclare {{ }}; -def template EACompConstructor {{ - inline %(class_name)s::EAComp::EAComp(ExtMachInst machInst) - : %(base_class)s("%(mnemonic)s (EAComp)", machInst, IntAluOp) - { - %(constructor)s; - } -}}; - - -def template MemAccConstructor {{ - inline %(class_name)s::MemAcc::MemAcc(ExtMachInst machInst) - : %(base_class)s("%(mnemonic)s (MemAcc)", machInst, %(op_class)s) - { - %(constructor)s; - } -}}; - - def template LoadStoreConstructor {{ inline %(class_name)s::%(class_name)s(ExtMachInst machInst) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - new EAComp(machInst), new MemAcc(machInst)) + : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s) { %(constructor)s; } }}; -def template EACompExecute {{ - Fault - %(class_name)s::EAComp::execute(%(CPU_exec_context)s *xc, - Trace::InstRecord *traceData) const - { - Addr EA; - Fault fault = NoFault; - - %(op_decl)s; - %(op_rd)s; - %(ea_code)s; - - if (%(predicate_test)s) - { - if (fault == NoFault) { - %(op_wb)s; - xc->setEA(EA); - } - } - - return fault; - } -}}; - -def template LoadMemAccExecute {{ - Fault - %(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc, - Trace::InstRecord *traceData) const - { - Addr EA; - Fault fault = NoFault; - - %(op_decl)s; - %(op_rd)s; - EA = xc->getEA(); - - if (%(predicate_test)s) - { - if (fault == NoFault) { - fault = xc->read(EA, (uint%(mem_acc_size)d_t&)Mem, memAccessFlags); - %(memacc_code)s; - } - - if (fault == NoFault) { - %(op_wb)s; - } - } - - return fault; - } -}}; - - def template LoadExecute {{ Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const @@ -250,37 +152,6 @@ def template LoadCompleteAcc {{ }}; -def template StoreMemAccExecute {{ - Fault - %(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc, - Trace::InstRecord *traceData) const - { - Addr EA; - Fault fault = NoFault; - - %(op_decl)s; - %(op_rd)s; - - if (%(predicate_test)s) - { - EA = xc->getEA(); - - if (fault == NoFault) { - fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA, - memAccessFlags, NULL); - if (traceData) { traceData->setData(Mem); } - } - - if (fault == NoFault) { - %(op_wb)s; - } - } - - return fault; - } -}}; - - def template StoreExecute {{ Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const @@ -388,73 +259,6 @@ def template StoreCondCompleteAcc {{ } }}; - -def template MiscMemAccExecute {{ - Fault %(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc, - Trace::InstRecord *traceData) const - { - Addr EA; - Fault fault = NoFault; - - %(op_decl)s; - %(op_rd)s; - - if (%(predicate_test)s) - { - EA = xc->getEA(); - - if (fault == NoFault) { - %(memacc_code)s; - } - } - - return NoFault; - } -}}; - -def template MiscExecute {{ - Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, - Trace::InstRecord *traceData) const - { - Addr EA; - Fault fault = NoFault; - - %(op_decl)s; - %(op_rd)s; - %(ea_code)s; - - if (%(predicate_test)s) - { - if (fault == NoFault) { - %(memacc_code)s; - } - } - - return NoFault; - } -}}; - -def template MiscInitiateAcc {{ - Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc, - Trace::InstRecord *traceData) const - { - panic("Misc instruction does not support split access method!"); - return NoFault; - } -}}; - - -def template MiscCompleteAcc {{ - Fault %(class_name)s::completeAcc(PacketPtr pkt, - %(CPU_exec_context)s *xc, - Trace::InstRecord *traceData) const - { - panic("Misc instruction does not support split access method!"); - - return NoFault; - } -}}; - let {{ def buildPUBWLCase(p, u, b, w, l): return (p << 4) + (u << 3) + (b << 2) + (w << 1) + (l << 0) diff --git a/src/arch/arm/isa/formats/util.isa b/src/arch/arm/isa/formats/util.isa index ac2e077ba..e9cb533d6 100644 --- a/src/arch/arm/isa/formats/util.isa +++ b/src/arch/arm/isa/formats/util.isa @@ -44,31 +44,11 @@ def LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, mem_flags = makeList(mem_flags) inst_flags = makeList(inst_flags) - # add hook to get effective addresses into execution trace output. - ea_code += '\nif (traceData) { traceData->setAddr(EA); }\n' - - # Some CPU models execute the memory operation as an atomic unit, - # while others want to separate them into an effective address - # computation and a memory access operation. As a result, we need - # to generate three StaticInst objects. Note that the latter two - # are nested inside the larger "atomic" one. - - # Generate InstObjParams for each of the three objects. Note that - # they differ only in the set of code objects contained (which in - # turn affects the object's overall operand list). iop = InstObjParams(name, Name, base_class, {'ea_code': ea_code, 'memacc_code': memacc_code, 'predicate_test': predicateTest}, inst_flags) - ea_iop = InstObjParams(name, Name, base_class, - {'ea_code': ea_code, - 'predicate_test': predicateTest}, - inst_flags) - memacc_iop = InstObjParams(name, Name, base_class, - {'memacc_code': memacc_code, - 'predicate_test': predicateTest}, - inst_flags) if mem_flags: s = '\n\tmemAccessFlags = ' + string.join(mem_flags, '|') + ';' @@ -81,20 +61,15 @@ def LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, # corresponding Store template.. StoreCondInitiateAcc = StoreInitiateAcc - memAccExecTemplate = eval(exec_template_base + 'MemAccExecute') fullExecTemplate = eval(exec_template_base + 'Execute') initiateAccTemplate = eval(exec_template_base + 'InitiateAcc') completeAccTemplate = eval(exec_template_base + 'CompleteAcc') # (header_output, decoder_output, decode_block, exec_output) return (LoadStoreDeclare.subst(iop), - EACompConstructor.subst(ea_iop) - + MemAccConstructor.subst(memacc_iop) - + LoadStoreConstructor.subst(iop), + LoadStoreConstructor.subst(iop), decode_template.subst(iop), - EACompExecute.subst(ea_iop) - + memAccExecTemplate.subst(memacc_iop) - + fullExecTemplate.subst(iop) + fullExecTemplate.subst(iop) + initiateAccTemplate.subst(iop) + completeAccTemplate.subst(iop)) }}; |