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-rw-r--r--src/arch/arm/isa.cc10
-rw-r--r--src/arch/arm/isa.hh2
-rw-r--r--src/arch/arm/isa_device.hh5
3 files changed, 15 insertions, 2 deletions
diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc
index c701cc3a7..9a4fb2805 100644
--- a/src/arch/arm/isa.cc
+++ b/src/arch/arm/isa.cc
@@ -329,6 +329,14 @@ ISA::clear64(const ArmISAParams *p)
encodePhysAddrRange64(physAddrRange64));
}
+void
+ISA::startup(ThreadContext *tc)
+{
+ pmu->setThreadContext(tc);
+
+}
+
+
MiscReg
ISA::readMiscRegNoEffect(int misc_reg) const
{
@@ -1946,6 +1954,8 @@ ISA::getGenericTimer(ThreadContext *tc)
}
timer.reset(new GenericTimerISA(*generic_timer, tc->contextId()));
+ timer->setThreadContext(tc);
+
return *timer.get();
}
diff --git a/src/arch/arm/isa.hh b/src/arch/arm/isa.hh
index 9158b62aa..0521c43f9 100644
--- a/src/arch/arm/isa.hh
+++ b/src/arch/arm/isa.hh
@@ -659,7 +659,7 @@ namespace ArmISA
UNSERIALIZE_SCALAR(physAddrRange64);
}
- void startup(ThreadContext *tc) {}
+ void startup(ThreadContext *tc);
Enums::DecoderFlavour decoderFlavour() const { return _decoderFlavour; }
diff --git a/src/arch/arm/isa_device.hh b/src/arch/arm/isa_device.hh
index 185e632a5..374f105c1 100644
--- a/src/arch/arm/isa_device.hh
+++ b/src/arch/arm/isa_device.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2014 ARM Limited
+ * Copyright (c) 2014, 2017 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -43,6 +43,8 @@
#include "arch/arm/registers.hh"
#include "base/compiler.hh"
+class ThreadContext;
+
namespace ArmISA
{
@@ -62,6 +64,7 @@ class BaseISADevice
virtual ~BaseISADevice() {}
virtual void setISA(ISA *isa);
+ virtual void setThreadContext(ThreadContext *tc) {}
/**
* Write to a system register belonging to this device.