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-rw-r--r--src/cpu/o3/bpred_unit_impl.hh2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/cpu/o3/bpred_unit_impl.hh b/src/cpu/o3/bpred_unit_impl.hh
index 6f0e5e3e0..7231d8f8c 100644
--- a/src/cpu/o3/bpred_unit_impl.hh
+++ b/src/cpu/o3/bpred_unit_impl.hh
@@ -207,8 +207,6 @@ BPredUnit<Impl>::predict(DynInstPtr &inst, TheISA::PCState &pc, ThreadID tid)
predict_record.RASIndex = RAS[tid].topIdx();
predict_record.RASTarget = rasTop;
- assert(predict_record.RASIndex < 16);
-
RAS[tid].pop();
DPRINTF(Fetch, "BranchPred: [tid:%i]: Instruction %s is a return, "