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-rw-r--r--configs/common/Options.py3
-rw-r--r--configs/example/fs.py1
-rw-r--r--configs/example/se.py11
3 files changed, 11 insertions, 4 deletions
diff --git a/configs/common/Options.py b/configs/common/Options.py
index 69f48dc3b..4f2b317c0 100644
--- a/configs/common/Options.py
+++ b/configs/common/Options.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2006 The Regents of The University of Michigan
+# Copyright (c) 2006-2007 The Regents of The University of Michigan
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
@@ -31,6 +31,7 @@ parser.add_option("-d", "--detailed", action="store_true")
parser.add_option("-t", "--timing", action="store_true")
parser.add_option("-n", "--num_cpus", type="int", default=1)
parser.add_option("--caches", action="store_true")
+parser.add_option("--l2cache", action="store_true")
# Run duration options
parser.add_option("-m", "--maxtick", type="int")
diff --git a/configs/example/fs.py b/configs/example/fs.py
index bd4637e95..76c12bd9e 100644
--- a/configs/example/fs.py
+++ b/configs/example/fs.py
@@ -51,7 +51,6 @@ parser.add_option("--kernel", action="store", type="string")
parser.add_option("--script", action="store", type="string")
# Benchmark options
-parser.add_option("--l2cache", action="store_true")
parser.add_option("--dual", action="store_true",
help="Simulate two systems attached with an ethernet link")
parser.add_option("-b", "--benchmark", action="store", type="string",
diff --git a/configs/example/se.py b/configs/example/se.py
index 0944a030e..b294480f6 100644
--- a/configs/example/se.py
+++ b/configs/example/se.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2006 The Regents of The University of Michigan
+# Copyright (c) 2006-2007 The Regents of The University of Michigan
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
@@ -104,7 +104,14 @@ for i in xrange(np):
if options.caches:
system.cpu[i].addPrivateSplitL1Caches(L1Cache(size = '32kB'),
L1Cache(size = '64kB'))
- system.cpu[i].connectMemPorts(system.membus)
+ if options.l2cache:
+ system.l2 = L2Cache(size='2MB')
+ system.tol2bus = Bus()
+ system.l2.cpu_side = system.tol2bus.port
+ system.l2.mem_side = system.membus.port
+ system.cpu[i].connectMemPorts(system.tol2bus)
+ else:
+ system.cpu[i].connectMemPorts(system.membus)
system.cpu[i].workload = process
root = Root(system = system)