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-rw-r--r--src/arch/x86/isa/insts/general_purpose/control_transfer/call.py4
-rw-r--r--src/arch/x86/isa/insts/general_purpose/control_transfer/xreturn.py9
-rw-r--r--src/arch/x86/isa/macroop.isa19
3 files changed, 28 insertions, 4 deletions
diff --git a/src/arch/x86/isa/insts/general_purpose/control_transfer/call.py b/src/arch/x86/isa/insts/general_purpose/control_transfer/call.py
index f18a062a6..eaaa18208 100644
--- a/src/arch/x86/isa/insts/general_purpose/control_transfer/call.py
+++ b/src/arch/x86/isa/insts/general_purpose/control_transfer/call.py
@@ -40,6 +40,7 @@ def macroop CALL_NEAR_I
{
# Make the default data size of calls 64 bits in 64 bit mode
.adjust_env oszIn64Override
+ .function_call
limm t1, imm
rdip t7
@@ -53,6 +54,7 @@ def macroop CALL_NEAR_R
{
# Make the default data size of calls 64 bits in 64 bit mode
.adjust_env oszIn64Override
+ .function_call
rdip t1
# Check target of call
@@ -65,6 +67,7 @@ def macroop CALL_NEAR_M
{
# Make the default data size of calls 64 bits in 64 bit mode
.adjust_env oszIn64Override
+ .function_call
rdip t7
ld t1, seg, sib, disp
@@ -78,6 +81,7 @@ def macroop CALL_NEAR_P
{
# Make the default data size of calls 64 bits in 64 bit mode
.adjust_env oszIn64Override
+ .function_call
rdip t7
ld t1, seg, riprel, disp
diff --git a/src/arch/x86/isa/insts/general_purpose/control_transfer/xreturn.py b/src/arch/x86/isa/insts/general_purpose/control_transfer/xreturn.py
index 7ebe22e78..f24b9d70e 100644
--- a/src/arch/x86/isa/insts/general_purpose/control_transfer/xreturn.py
+++ b/src/arch/x86/isa/insts/general_purpose/control_transfer/xreturn.py
@@ -40,6 +40,7 @@ def macroop RET_NEAR
{
# Make the default data size of rets 64 bits in 64 bit mode
.adjust_env oszIn64Override
+ .function_return
ld t1, ss, [1, t0, rsp]
# Check address of return
@@ -51,6 +52,7 @@ def macroop RET_NEAR_I
{
# Make the default data size of rets 64 bits in 64 bit mode
.adjust_env oszIn64Override
+ .function_return
limm t2, imm
ld t1, ss, [1, t0, rsp]
@@ -62,6 +64,7 @@ def macroop RET_NEAR_I
def macroop RET_FAR {
.adjust_env oszIn64Override
+ .function_return
# Get the return RIP
ld t1, ss, [1, t0, rsp]
@@ -99,10 +102,10 @@ processDescriptor:
wrdl cs, t3, t2
wrsel cs, t2
wrip t0, t1
- br label("end")
+# br label("end")
# Do other stuff if they're not.
-end:
- fault "NoFault"
+#end:
+# fault "NoFault"
};
'''
diff --git a/src/arch/x86/isa/macroop.isa b/src/arch/x86/isa/macroop.isa
index 94b17ff4c..d510a0c7c 100644
--- a/src/arch/x86/isa/macroop.isa
+++ b/src/arch/x86/isa/macroop.isa
@@ -141,13 +141,21 @@ let {{
self.adjust_disp += val
def serializing(self):
self.serializing = True
+
+ def function_call(self):
+ self.function_call = True
+ def function_return(self):
+ self.function_return = True
+
def __init__(self, name):
super(X86Macroop, self).__init__(name)
self.directives = {
"adjust_env" : self.setAdjustEnv,
"adjust_imm" : self.adjustImm,
"adjust_disp" : self.adjustDisp,
- "serializing" : self.serializing
+ "serializing" : self.serializing,
+ "function_call" : self.function_call,
+ "function_return" : self.function_return
}
self.declared = False
self.adjust_env = ""
@@ -163,6 +171,9 @@ let {{
adjustedDisp = adjustedDisp;
'''
self.serializing = False
+ self.function_call = False
+ self.function_return = False
+
def getAllocator(self, env):
return "new X86Macroop::%s(machInst, %s)" % \
(self.name, env.getAllocator())
@@ -192,9 +203,15 @@ let {{
flags = ["IsMicroop"]
if micropc == numMicroops - 1:
flags.append("IsLastMicroop")
+
if self.serializing:
flags.append("IsSerializing")
flags.append("IsSerializeAfter")
+
+ if self.function_call:
+ flags.append("IsCall")
+ if self.function_return:
+ flags.append("IsReturn")
else:
flags.append("IsDelayedCommit")
if micropc == 0: