diff options
| -rw-r--r-- | src/arch/arm/isa/bitfields.isa | 27 | ||||
| -rw-r--r-- | src/arch/arm/types.hh | 25 |
2 files changed, 51 insertions, 1 deletions
diff --git a/src/arch/arm/isa/bitfields.isa b/src/arch/arm/isa/bitfields.isa index 807f4be96..c9696a115 100644 --- a/src/arch/arm/isa/bitfields.isa +++ b/src/arch/arm/isa/bitfields.isa @@ -116,7 +116,7 @@ def bitfield PUNWL punwl; // M5 instructions def bitfield M5FUNC m5Func; -// Thumb bitfields +// 16 bit thumb bitfields def bitfield TOPCODE_15_13 topcode15_13; def bitfield TOPCODE_13_11 topcode13_11; def bitfield TOPCODE_12_11 topcode12_11; @@ -131,3 +131,28 @@ def bitfield TOPCODE_7_6 topcode7_6; def bitfield TOPCODE_7_5 topcode7_5; def bitfield TOPCODE_7_4 topcode7_4; def bitfield TOPCODE_3_0 topcode3_0; + +// 32 bit thumb bitfields +def bitfield HTOPCODE_12_11 htopcode12_11; +def bitfield HTOPCODE_10_9 htopcode10_9; +def bitfield HTOPCODE_9 htopcode9; +def bitfield HTOPCODE_9_8 htopcode9_8; +def bitfield HTOPCODE_9_5 htopcode9_5; +def bitfield HTOPCODE_9_4 htopcode9_4; +def bitfield HTOPCODE_8 htopcode8; +def bitfield HTOPCODE_8_7 htopcode8_7; +def bitfield HTOPCODE_8_6 htopcode8_6; +def bitfield HTOPCODE_8_5 htopcode8_5; +def bitfield HTOPCODE_6_5 htopcode6_5; +def bitfield HTOPCODE_5_4 htopcode5_4; +def bitfield HTOPCODE_4 htopcode4; + +def bitfield HTRN htrn; +def bitfield HTS hts; + +def bitfield LTOPCODE_15 ltopcode15; +def bitfield LTOPCODE_7_4 ltopcode7_4; +def bitfield LTOPCODE_4 ltopcode4; + +def bitfield LTRD ltrd; +def bitfield LTCOPROC ltcoproc; diff --git a/src/arch/arm/types.hh b/src/arch/arm/types.hh index 72745a83c..c3dcfe28a 100644 --- a/src/arch/arm/types.hh +++ b/src/arch/arm/types.hh @@ -143,6 +143,31 @@ namespace ArmISA Bitfield<7, 5> topcode7_5; Bitfield<7, 4> topcode7_4; Bitfield<3, 0> topcode3_0; + + // 32 bit thumb bitfields + Bitfield<28, 27> htopcode12_11; + Bitfield<26, 25> htopcode10_9; + Bitfield<25> htopcode9; + Bitfield<25, 24> htopcode9_8; + Bitfield<25, 21> htopcode9_5; + Bitfield<25, 20> htopcode9_4; + Bitfield<24> htopcode8; + Bitfield<24, 23> htopcode8_7; + Bitfield<24, 22> htopcode8_6; + Bitfield<24, 21> htopcode8_5; + Bitfield<22, 21> htopcode6_5; + Bitfield<21, 20> htopcode5_4; + Bitfield<20> htopcode4; + + Bitfield<19, 16> htrn; + Bitfield<20> hts; + + Bitfield<15> ltopcode15; + Bitfield<7, 4> ltopcode7_4; + Bitfield<4> ltopcode4; + + Bitfield<11, 8> ltrd; + Bitfield<11, 8> ltcoproc; EndBitUnion(ExtMachInst) // Shift types for ARM instructions |