diff options
| -rw-r--r-- | src/cpu/base.cc | 12 | ||||
| -rw-r--r-- | src/cpu/base.hh | 3 | ||||
| -rw-r--r-- | src/cpu/o3/alpha/cpu_builder.cc | 2 | ||||
| -rw-r--r-- | src/cpu/o3/mips/cpu_builder.cc | 2 | ||||
| -rw-r--r-- | src/cpu/simple/atomic.cc | 3 | ||||
| -rw-r--r-- | src/cpu/simple/timing.cc | 7 |
6 files changed, 23 insertions, 6 deletions
diff --git a/src/cpu/base.cc b/src/cpu/base.cc index 4c243a2e9..7cbbb0b96 100644 --- a/src/cpu/base.cc +++ b/src/cpu/base.cc @@ -97,11 +97,13 @@ CPUProgressEvent::description() #if FULL_SYSTEM BaseCPU::BaseCPU(Params *p) : MemObject(p->name), clock(p->clock), checkInterrupts(true), - params(p), number_of_threads(p->numberOfThreads), system(p->system) + params(p), number_of_threads(p->numberOfThreads), system(p->system), + phase(p->phase) #else BaseCPU::BaseCPU(Params *p) : MemObject(p->name), clock(p->clock), params(p), - number_of_threads(p->numberOfThreads), system(p->system) + number_of_threads(p->numberOfThreads), system(p->system), + phase(p->phase) #endif { // currentTick = curTick; @@ -257,8 +259,9 @@ BaseCPU::regStats() Tick BaseCPU::nextCycle() { - Tick next_tick = curTick + clock - 1; + Tick next_tick = curTick - phase + clock - 1; next_tick -= (next_tick % clock); + next_tick += phase; return next_tick; } @@ -266,11 +269,12 @@ Tick BaseCPU::nextCycle(Tick begin_tick) { Tick next_tick = begin_tick; + next_tick -= (next_tick % clock); + next_tick += phase; while (next_tick < curTick) next_tick += clock; - next_tick -= (next_tick % clock); assert(next_tick >= curTick); return next_tick; } diff --git a/src/cpu/base.hh b/src/cpu/base.hh index 788f77e3a..1d9b6a93b 100644 --- a/src/cpu/base.hh +++ b/src/cpu/base.hh @@ -153,6 +153,7 @@ class BaseCPU : public MemObject Tick functionTraceStart; System *system; int cpu_id; + Tick phase; #if FULL_SYSTEM Tick profile; @@ -209,6 +210,8 @@ class BaseCPU : public MemObject System *system; + Tick phase; + #if FULL_SYSTEM /** * Serialize this object to the given output stream. diff --git a/src/cpu/o3/alpha/cpu_builder.cc b/src/cpu/o3/alpha/cpu_builder.cc index 09ccc7f65..5a375a4b8 100644 --- a/src/cpu/o3/alpha/cpu_builder.cc +++ b/src/cpu/o3/alpha/cpu_builder.cc @@ -48,6 +48,7 @@ class DerivO3CPU : public AlphaO3CPU<AlphaSimpleImpl> BEGIN_DECLARE_SIM_OBJECT_PARAMS(DerivO3CPU) Param<int> clock; + Param<int> phase; Param<int> numThreads; Param<int> activity; @@ -158,6 +159,7 @@ END_DECLARE_SIM_OBJECT_PARAMS(DerivO3CPU) BEGIN_INIT_SIM_OBJECT_PARAMS(DerivO3CPU) INIT_PARAM(clock, "clock speed"), + INIT_PARAM_DFLT(phase, "clock phase", 0), INIT_PARAM(numThreads, "number of HW thread contexts"), INIT_PARAM_DFLT(activity, "Initial activity count", 0), diff --git a/src/cpu/o3/mips/cpu_builder.cc b/src/cpu/o3/mips/cpu_builder.cc index ee9f2b48d..66741aee9 100644 --- a/src/cpu/o3/mips/cpu_builder.cc +++ b/src/cpu/o3/mips/cpu_builder.cc @@ -49,6 +49,7 @@ class DerivO3CPU : public MipsO3CPU<MipsSimpleImpl> BEGIN_DECLARE_SIM_OBJECT_PARAMS(DerivO3CPU) Param<int> clock; +Param<int> phase; Param<int> numThreads; Param<int> activity; @@ -146,6 +147,7 @@ END_DECLARE_SIM_OBJECT_PARAMS(DerivO3CPU) BEGIN_INIT_SIM_OBJECT_PARAMS(DerivO3CPU) INIT_PARAM(clock, "clock speed"), + INIT_PARAM_DFLT(phase, "clock phase", 0), INIT_PARAM(numThreads, "number of HW thread contexts"), INIT_PARAM_DFLT(activity, "Initial activity count", 0), diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc index 325260609..133b5500b 100644 --- a/src/cpu/simple/atomic.cc +++ b/src/cpu/simple/atomic.cc @@ -520,6 +520,7 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(AtomicSimpleCPU) #endif // FULL_SYSTEM Param<int> clock; + Param<int> phase; Param<bool> defer_registration; Param<int> width; @@ -555,6 +556,7 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(AtomicSimpleCPU) #endif // FULL_SYSTEM INIT_PARAM(clock, "clock speed"), + INIT_PARAM_DFLT(phase, "clock phase", 0), INIT_PARAM(defer_registration, "defer system registration (for sampling)"), INIT_PARAM(width, "cpu width"), INIT_PARAM(function_trace, "Enable function trace"), @@ -575,6 +577,7 @@ CREATE_SIM_OBJECT(AtomicSimpleCPU) params->max_loads_all_threads = max_loads_all_threads; params->progress_interval = progress_interval; params->deferRegistration = defer_registration; + params->phase = phase; params->clock = clock; params->functionTrace = function_trace; params->functionTraceStart = function_trace_start; diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc index 1ea2df894..d9839bede 100644 --- a/src/cpu/simple/timing.cc +++ b/src/cpu/simple/timing.cc @@ -169,7 +169,7 @@ TimingSimpleCPU::resume() fetchEvent = new EventWrapper<TimingSimpleCPU, &TimingSimpleCPU::fetch>(this, false); - fetchEvent->schedule(curTick); + fetchEvent->schedule(nextCycle()); } changeState(SimObject::Running); @@ -241,7 +241,7 @@ TimingSimpleCPU::activateContext(int thread_num, int delay) // kick things off by initiating the fetch of the next instruction fetchEvent = new EventWrapper<TimingSimpleCPU, &TimingSimpleCPU::fetch>(this, false); - fetchEvent->schedule(curTick + cycles(delay)); + fetchEvent->schedule(nextCycle(curTick + cycles(delay))); } @@ -683,6 +683,7 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(TimingSimpleCPU) #endif // FULL_SYSTEM Param<int> clock; + Param<int> phase; Param<bool> defer_registration; Param<int> width; @@ -718,6 +719,7 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(TimingSimpleCPU) #endif // FULL_SYSTEM INIT_PARAM(clock, "clock speed"), + INIT_PARAM_DFLT(phase, "clock phase", 0), INIT_PARAM(defer_registration, "defer system registration (for sampling)"), INIT_PARAM(width, "cpu width"), INIT_PARAM(function_trace, "Enable function trace"), @@ -739,6 +741,7 @@ CREATE_SIM_OBJECT(TimingSimpleCPU) params->progress_interval = progress_interval; params->deferRegistration = defer_registration; params->clock = clock; + params->phase = phase; params->functionTrace = function_trace; params->functionTraceStart = function_trace_start; params->system = system; |