diff options
| -rw-r--r-- | src/arch/arm/isa/formats/mem.isa | 2 | ||||
| -rw-r--r-- | src/arch/arm/isa/formats/uncond.isa | 2 |
2 files changed, 4 insertions, 0 deletions
diff --git a/src/arch/arm/isa/formats/mem.isa b/src/arch/arm/isa/formats/mem.isa index 59a6f126a..f7830eff3 100644 --- a/src/arch/arm/isa/formats/mem.isa +++ b/src/arch/arm/isa/formats/mem.isa @@ -282,6 +282,8 @@ def format Thumb32SrsRfe() {{ } } else { const uint32_t mode = bits(machInst, 4, 0); + if (badMode((OperatingMode)mode)) + return new Unknown(machInst); if (!add && !wb) { return new %(srs)s(machInst, mode, SrsOp::DecrementBefore, wb); diff --git a/src/arch/arm/isa/formats/uncond.isa b/src/arch/arm/isa/formats/uncond.isa index f4cc16262..4fa707b2b 100644 --- a/src/arch/arm/isa/formats/uncond.isa +++ b/src/arch/arm/isa/formats/uncond.isa @@ -166,6 +166,8 @@ def format ArmUnconditional() {{ const uint32_t val = ((machInst >> 20) & 0x5); if (val == 0x4) { const uint32_t mode = bits(machInst, 4, 0); + if (badMode((OperatingMode)mode)) + return new Unknown(machInst); switch (bits(machInst, 24, 21)) { case 0x2: return new %(srs)s(machInst, mode, |