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-rw-r--r--src/mem/cache/prefetch/ghb.cc7
-rw-r--r--src/mem/cache/prefetch/stride.cc5
-rw-r--r--src/mem/request.hh8
3 files changed, 18 insertions, 2 deletions
diff --git a/src/mem/cache/prefetch/ghb.cc b/src/mem/cache/prefetch/ghb.cc
index c27165248..f8f7de1db 100644
--- a/src/mem/cache/prefetch/ghb.cc
+++ b/src/mem/cache/prefetch/ghb.cc
@@ -34,13 +34,18 @@
* GHB Prefetcher implementation.
*/
+#include "base/trace.hh"
#include "mem/cache/prefetch/ghb.hh"
-#include "arch/isa_traits.hh"
void
GHBPrefetcher::calculatePrefetch(PacketPtr &pkt, std::list<Addr> &addresses,
std::list<Tick> &delays)
{
+ if (useContextId && !pkt->req->hasContextId()) {
+ DPRINTF(HWPrefetch, "ignoring request with no context ID");
+ return;
+ }
+
Addr blk_addr = pkt->getAddr() & ~(Addr)(blkSize-1);
int ctx_id = useContextId ? pkt->req->contextId() : 0;
assert(ctx_id < Max_Contexts);
diff --git a/src/mem/cache/prefetch/stride.cc b/src/mem/cache/prefetch/stride.cc
index cfd2469fa..8af4e615e 100644
--- a/src/mem/cache/prefetch/stride.cc
+++ b/src/mem/cache/prefetch/stride.cc
@@ -46,6 +46,11 @@ StridePrefetcher::calculatePrefetch(PacketPtr &pkt, std::list<Addr> &addresses,
return;
}
+ if (useContextId && !pkt->req->hasContextId()) {
+ DPRINTF(HWPrefetch, "ignoring request with no context ID");
+ return;
+ }
+
Addr blk_addr = pkt->getAddr() & ~(Addr)(blkSize-1);
int ctx_id = useContextId ? pkt->req->contextId() : 0;
Addr pc = pkt->req->getPC();
diff --git a/src/mem/request.hh b/src/mem/request.hh
index dde68ca37..ee62ce771 100644
--- a/src/mem/request.hh
+++ b/src/mem/request.hh
@@ -409,6 +409,12 @@ class Request : public FastAlloc
flags.set(VALID_EXTRA_DATA);
}
+ bool
+ hasContextId() const
+ {
+ return flags.isSet(VALID_CONTEXT_ID);
+ }
+
/** Accessor function for context ID.*/
int
contextId() const
@@ -425,13 +431,13 @@ class Request : public FastAlloc
return _threadId;
}
- /** Accessor function for pc.*/
bool
hasPC() const
{
return flags.isSet(VALID_PC);
}
+ /** Accessor function for pc.*/
Addr
getPC() const
{