diff options
-rw-r--r-- | src/cpu/simple/atomic.cc | 3 | ||||
-rw-r--r-- | src/cpu/simple/timing.cc | 3 | ||||
-rw-r--r-- | src/python/m5/objects/BaseCPU.py | 1 |
3 files changed, 7 insertions, 0 deletions
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc index c396f5033..7ba1b7df1 100644 --- a/src/cpu/simple/atomic.cc +++ b/src/cpu/simple/atomic.cc @@ -464,6 +464,7 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(AtomicSimpleCPU) Param<Counter> max_insts_all_threads; Param<Counter> max_loads_any_thread; Param<Counter> max_loads_all_threads; + Param<Tick> progress_interval; SimObjectParam<MemObject *> mem; SimObjectParam<System *> system; @@ -496,6 +497,7 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(AtomicSimpleCPU) "terminate when any thread reaches this load count"), INIT_PARAM(max_loads_all_threads, "terminate when all threads have reached this load count"), + INIT_PARAM(progress_interval, "Progress interval"), INIT_PARAM(mem, "memory"), INIT_PARAM(system, "system object"), @@ -527,6 +529,7 @@ CREATE_SIM_OBJECT(AtomicSimpleCPU) params->max_insts_all_threads = max_insts_all_threads; params->max_loads_any_thread = max_loads_any_thread; params->max_loads_all_threads = max_loads_all_threads; + params->progress_interval = progress_interval; params->deferRegistration = defer_registration; params->clock = clock; params->functionTrace = function_trace; diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc index 5c1654f7e..03ee27e04 100644 --- a/src/cpu/simple/timing.cc +++ b/src/cpu/simple/timing.cc @@ -589,6 +589,7 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(TimingSimpleCPU) Param<Counter> max_insts_all_threads; Param<Counter> max_loads_any_thread; Param<Counter> max_loads_all_threads; + Param<Tick> progress_interval; SimObjectParam<MemObject *> mem; SimObjectParam<System *> system; @@ -621,6 +622,7 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(TimingSimpleCPU) "terminate when any thread reaches this load count"), INIT_PARAM(max_loads_all_threads, "terminate when all threads have reached this load count"), + INIT_PARAM(progress_interval, "Progress interval"), INIT_PARAM(mem, "memory"), INIT_PARAM(system, "system object"), @@ -652,6 +654,7 @@ CREATE_SIM_OBJECT(TimingSimpleCPU) params->max_insts_all_threads = max_insts_all_threads; params->max_loads_any_thread = max_loads_any_thread; params->max_loads_all_threads = max_loads_all_threads; + params->progress_interval = progress_interval; params->deferRegistration = defer_registration; params->clock = clock; params->functionTrace = function_trace; diff --git a/src/python/m5/objects/BaseCPU.py b/src/python/m5/objects/BaseCPU.py index 3dd0bda01..0b887cceb 100644 --- a/src/python/m5/objects/BaseCPU.py +++ b/src/python/m5/objects/BaseCPU.py @@ -26,6 +26,7 @@ class BaseCPU(SimObject): "terminate when all threads have reached this load count") max_loads_any_thread = Param.Counter(0, "terminate when any thread reaches this load count") + progress_interval = Param.Tick(0, "interval to print out the progress message") defer_registration = Param.Bool(False, "defer registration with system (for sampling)") |