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-rw-r--r--src/mem/protocol/MI_example-dir.sm12
-rw-r--r--src/mem/protocol/MOESI_CMP_directory-dir.sm49
2 files changed, 46 insertions, 15 deletions
diff --git a/src/mem/protocol/MI_example-dir.sm b/src/mem/protocol/MI_example-dir.sm
index 9af1940f7..9502a40b4 100644
--- a/src/mem/protocol/MI_example-dir.sm
+++ b/src/mem/protocol/MI_example-dir.sm
@@ -361,6 +361,10 @@ machine(Directory, "Directory protocol")
requestQueue_in.recycle();
}
+ action(y_recycleDMARequestQueue, "y", desc="recycle dma request queue") {
+ dmaRequestQueue_in.recycle();
+ }
+
action(qf_queueMemoryFetchRequest, "qf", desc="Queue off-chip fetch request") {
peek(requestQueue_in, RequestMsg) {
@@ -449,14 +453,18 @@ machine(Directory, "Directory protocol")
// TRANSITIONS
- transition({M_DRD, M_DWR}, GETX) {
+ transition({M_DRD, M_DWR, M_DWRI}, GETX) {
z_recycleRequestQueue;
}
- transition({IM, MI, ID, ID_W}, {GETX, GETS, DMA_READ, DMA_WRITE, PUTX, PUTX_NotOwner} ) {
+ transition({IM, MI, ID, ID_W}, {GETX, GETS, PUTX, PUTX_NotOwner} ) {
z_recycleRequestQueue;
}
+ transition({IM, MI, ID, ID_W}, {DMA_READ, DMA_WRITE} ) {
+ y_recycleDMARequestQueue;
+ }
+
transition(I, GETX, IM) {
//d_sendData;
qf_queueMemoryFetchRequest;
diff --git a/src/mem/protocol/MOESI_CMP_directory-dir.sm b/src/mem/protocol/MOESI_CMP_directory-dir.sm
index 8d8ee7f8a..f1fb687bb 100644
--- a/src/mem/protocol/MOESI_CMP_directory-dir.sm
+++ b/src/mem/protocol/MOESI_CMP_directory-dir.sm
@@ -405,6 +405,14 @@ machine(Directory, "Directory protocol")
}
}
+ action(p_writeFwdDataToMemory, "p", desc="Write Response data to memory") {
+ peek(unblockNetwork_in, ResponseMsg) {
+ directory[in_msg.Address].DataBlk := in_msg.DataBlk;
+ DEBUG_EXPR(in_msg.Address);
+ DEBUG_EXPR(in_msg.DataBlk);
+ }
+ }
+
action(ll_checkDataInMemory, "\ld", desc="Check PUTX/PUTO data is same as in the memory") {
peek(unblockNetwork_in, ResponseMsg) {
assert(in_msg.Dirty == false);
@@ -506,14 +514,31 @@ machine(Directory, "Directory protocol")
}
action(a_sendDMAAck, "\a", desc="Send DMA Ack that write completed, along with Inv Ack count") {
- peek(memQueue_in, MemoryMsg) {
+ peek(requestQueue_in, RequestMsg) {
enqueue(responseNetwork_out, ResponseMsg, latency="1") {
out_msg.Address := address;
out_msg.Sender := machineID;
out_msg.SenderMachine := MachineType:Directory;
- out_msg.Destination.add(in_msg.OriginalRequestorMachId);
+ out_msg.Destination.add(in_msg.Requestor);
+ out_msg.DataBlk := in_msg.DataBlk;
+ out_msg.Acks := directory[address].Sharers.count(); // for dma requests
+ out_msg.Type := CoherenceResponseType:DMA_ACK;
+ out_msg.MessageSize := MessageSizeType:Writeback_Control;
+ }
+ }
+ }
+
+ action(a_sendDMAAck2, "\aa", desc="Send DMA Ack that write completed, along with Inv Ack count") {
+ peek(unblockNetwork_in, ResponseMsg) {
+ enqueue(responseNetwork_out, ResponseMsg, latency="1") {
+ out_msg.Address := address;
+ out_msg.Sender := machineID;
+ out_msg.SenderMachine := MachineType:Directory;
+ if (TBEs.isPresent(address)) {
+ out_msg.Destination.add(TBEs[address].Requestor);
+ }
out_msg.DataBlk := in_msg.DataBlk;
- out_msg.Acks := in_msg.Acks;
+ out_msg.Acks := directory[address].Sharers.count(); // for dma requests
out_msg.Type := CoherenceResponseType:DMA_ACK;
out_msg.MessageSize := MessageSizeType:Writeback_Control;
}
@@ -560,8 +585,9 @@ machine(Directory, "Directory protocol")
i_popIncomingRequestQueue;
}
- transition(I, DMA_WRITE, XI_M) {
+ transition(I, DMA_WRITE, XI_U) {
qw_queueMemoryWBRequest2;
+ a_sendDMAAck; // ack count may be zero
l_writeDMADataToMemory;
i_popIncomingRequestQueue;
}
@@ -571,11 +597,6 @@ machine(Directory, "Directory protocol")
q_popMemQueue;
}
- transition(XI_M, Memory_Ack, XI_U) {
- a_sendDMAAck; // ack count may be zero
- q_popMemQueue;
- }
-
transition(XI_U, Exclusive_Unblock, I) {
cc_clearSharers;
c_clearOwner;
@@ -594,8 +615,9 @@ machine(Directory, "Directory protocol")
i_popIncomingRequestQueue;
}
- transition(S, DMA_WRITE, XI_M) {
+ transition(S, DMA_WRITE, XI_U) {
qw_queueMemoryWBRequest2;
+ a_sendDMAAck; // ack count may be zero
l_writeDMADataToMemory;
g_sendInvalidations; // the DMA will collect invalidations
i_popIncomingRequestQueue;
@@ -641,9 +663,10 @@ machine(Directory, "Directory protocol")
i_popIncomingRequestQueue;
}
- transition(OI_D, Data, XI_M) {
+ transition(OI_D, Data, XI_U) {
qw_queueMemoryWBRequest;
- l_writeDataToMemory;
+ a_sendDMAAck2; // ack count may be zero
+ p_writeFwdDataToMemory;
l_writeDMADataToMemoryFromTBE;
w_deallocateTBE;
j_popIncomingUnblockQueue;
@@ -821,7 +844,7 @@ machine(Directory, "Directory protocol")
q_popMemQueue;
}
- transition({I, S, O, M, IS, SS, OO, MO, MM, MI, MIS, OS, OSS}, Memory_Ack) {
+ transition({I, S, O, M, IS, SS, OO, MO, MM, MI, MIS, OS, OSS, XI_U, XI_M}, Memory_Ack) {
//a_sendAck;
q_popMemQueue;
}