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-rw-r--r--src/arch/arm/isa/bitfields.isa3
-rw-r--r--src/arch/arm/predecoder.hh2
-rw-r--r--src/arch/arm/types.hh6
3 files changed, 10 insertions, 1 deletions
diff --git a/src/arch/arm/isa/bitfields.isa b/src/arch/arm/isa/bitfields.isa
index 44b0b3458..5ad874003 100644
--- a/src/arch/arm/isa/bitfields.isa
+++ b/src/arch/arm/isa/bitfields.isa
@@ -61,6 +61,9 @@ def bitfield OPCODE_6 opcode6;
def bitfield OPCODE_5 opcode5;
def bitfield OPCODE_4 opcode4;
+def bitfield IS_MISC isMisc;
+def bitfield SEVEN_AND_FOUR sevenAndFour;
+
// Other
def bitfield COND_CODE condCode;
def bitfield S_FIELD sField;
diff --git a/src/arch/arm/predecoder.hh b/src/arch/arm/predecoder.hh
index 2c0b773a0..bd4a7b03b 100644
--- a/src/arch/arm/predecoder.hh
+++ b/src/arch/arm/predecoder.hh
@@ -73,6 +73,8 @@ namespace ArmISA
void moreBytes(Addr pc, Addr fetchPC, MachInst inst)
{
emi = inst;
+ emi.sevenAndFour = bits(inst, 7) && bits(inst, 4);
+ emi.isMisc = (bits(inst, 24, 23) == 0x2 && bits(inst, 20) == 0);
}
//Use this to give data to the predecoder. This should be used
diff --git a/src/arch/arm/types.hh b/src/arch/arm/types.hh
index 98070a874..d87bad412 100644
--- a/src/arch/arm/types.hh
+++ b/src/arch/arm/types.hh
@@ -38,7 +38,11 @@ namespace ArmISA
{
typedef uint32_t MachInst;
- BitUnion32(ExtMachInst)
+ BitUnion64(ExtMachInst)
+ // Made up bitfields that make life easier.
+ Bitfield<33> sevenAndFour;
+ Bitfield<32> isMisc;
+
// All the different types of opcode fields.
Bitfield<27, 25> opcode;
Bitfield<27, 25> opcode27_25;