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-rw-r--r--src/arch/x86/isa/decoder/two_byte_opcodes.isa2
-rw-r--r--src/arch/x86/isa/insts/general_purpose/data_transfer/move.py2
2 files changed, 4 insertions, 0 deletions
diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
index a23531c13..348bff32e 100644
--- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa
+++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
@@ -878,6 +878,8 @@
// no prefix
0x0: decode OPCODE_OP_BOTTOM3 {
0x2: CMPPS(Vo,Wo,Ib);
+ //Non-temporal hint is ignored since we don't have
+ //proper support for it in the memory system.
0x3: MOVNTI(Mdp,Gdp);
0x4: PINSRW(Pq,Ew,Ib);
0x5: PEXTRW(Gd,PRq,Ib);
diff --git a/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py b/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py
index 13d2f18e0..91cf92a58 100644
--- a/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py
+++ b/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py
@@ -333,10 +333,12 @@ processDescriptor:
};
def macroop MOVNTI_M_R {
+ warn_once "MOVNTI: Ignoring non-temporal hint, modeling as cacheable!"
st reg, seg, sib, disp
};
def macroop MOVNTI_P_R {
+ warn_once "MOVNTI_P: Ignoring non-temporal hint, modeling as cacheable!"
rdip t7
st reg, seg, riprel, disp
};