summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--src/cpu/o3/rename_map.cc8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/cpu/o3/rename_map.cc b/src/cpu/o3/rename_map.cc
index d1876a965..1b831d940 100644
--- a/src/cpu/o3/rename_map.cc
+++ b/src/cpu/o3/rename_map.cc
@@ -76,14 +76,14 @@ SimpleRenameMap::rename(const RegId& arch_reg)
PhysRegIdPtr renamed_reg;
// Record the current physical register that is renamed to the
// requested architected register.
- PhysRegIdPtr prev_reg = map[arch_reg.index()];
+ PhysRegIdPtr prev_reg = map[arch_reg.flatIndex()];
// If it's not referencing the zero register, then rename the
// register.
if (arch_reg != zeroReg) {
renamed_reg = freeList->getReg();
- map[arch_reg.index()] = renamed_reg;
+ map[arch_reg.flatIndex()] = renamed_reg;
} else {
// Otherwise return the zero register so nothing bad happens.
assert(prev_reg->isZeroReg());
@@ -92,8 +92,8 @@ SimpleRenameMap::rename(const RegId& arch_reg)
DPRINTF(Rename, "Renamed reg %d to physical reg %d (%d) old mapping was"
" %d (%d)\n",
- arch_reg, renamed_reg->index(), renamed_reg->flatIndex(),
- prev_reg->index(), prev_reg->flatIndex());
+ arch_reg, renamed_reg->flatIndex(), renamed_reg->flatIndex(),
+ prev_reg->flatIndex(), prev_reg->flatIndex());
return RenameInfo(renamed_reg, prev_reg);
}