diff options
| -rw-r--r-- | src/mem/cache/prefetch/Prefetcher.py | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/src/mem/cache/prefetch/Prefetcher.py b/src/mem/cache/prefetch/Prefetcher.py index 404a44240..aaa140887 100644 --- a/src/mem/cache/prefetch/Prefetcher.py +++ b/src/mem/cache/prefetch/Prefetcher.py @@ -43,7 +43,6 @@ from m5.SimObject import * from m5.params import * from m5.proxy import * -from m5.objects.BaseCPU import BaseCPU from m5.objects.ClockedObject import ClockedObject from m5.objects.IndexingPolicies import * from m5.objects.ReplacementPolicies import * @@ -481,6 +480,6 @@ class PIFPrefetcher(QueuedPrefetcher): "Replacement policy of the index") def listenFromProbeRetiredInstructions(self, simObj): - if not isinstance(simObj, BaseCPU): - raise TypeError("argument must be of BaseCPU type") + if not isinstance(simObj, SimObject): + raise TypeError("argument must be of SimObject type") self.addEvent(HWPProbeEventRetiredInsts(self, simObj,"RetiredInstsPC")) |