diff options
| -rw-r--r-- | src/mem/dram_ctrl.cc | 4 | ||||
| -rw-r--r-- | src/mem/dram_ctrl.hh | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/src/mem/dram_ctrl.cc b/src/mem/dram_ctrl.cc index e89a47a72..429e9ef5e 100644 --- a/src/mem/dram_ctrl.cc +++ b/src/mem/dram_ctrl.cc @@ -303,8 +303,8 @@ DRAMCtrl::writeQueueFull(unsigned int neededEntries) const } DRAMCtrl::DRAMPacket* -DRAMCtrl::decodeAddr(PacketPtr pkt, Addr dramPktAddr, unsigned size, - bool isRead) +DRAMCtrl::decodeAddr(const PacketPtr pkt, Addr dramPktAddr, unsigned size, + bool isRead) const { // decode the address based on the address mapping scheme, with // Ro, Ra, Co, Ba and Ch denoting row, rank, column, bank and diff --git a/src/mem/dram_ctrl.hh b/src/mem/dram_ctrl.hh index d09223b4b..54826e0a8 100644 --- a/src/mem/dram_ctrl.hh +++ b/src/mem/dram_ctrl.hh @@ -839,8 +839,8 @@ class DRAMCtrl : public QoS::MemCtrl * @param isRead Is the request for a read or a write to DRAM * @return A DRAMPacket pointer with the decoded information */ - DRAMPacket* decodeAddr(PacketPtr pkt, Addr dramPktAddr, unsigned int size, - bool isRead); + DRAMPacket* decodeAddr(const PacketPtr pkt, Addr dramPktAddr, + unsigned int size, bool isRead) const; /** * The memory schduler/arbiter - picks which request needs to |