diff options
| -rw-r--r-- | src/arch/arm/insts/misc64.cc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/arch/arm/insts/misc64.cc b/src/arch/arm/insts/misc64.cc index fed2d9ac8..423aaca25 100644 --- a/src/arch/arm/insts/misc64.cc +++ b/src/arch/arm/insts/misc64.cc @@ -269,6 +269,7 @@ MiscRegOp64::checkEL2Trap(ThreadContext *tc, const MiscRegIndex misc_reg, break; case MISCREG_IMPDEF_UNIMPL: trap_to_hyp = hcr.tidcp && el == EL1; + break; // GICv3 regs case MISCREG_ICC_SGI0R_EL1: if (tc->getIsaPtr()->haveGICv3CpuIfc()) |