diff options
| -rw-r--r-- | src/dev/arm/Gic.py | 1 | ||||
| -rw-r--r-- | system/arm/dt/platforms/vexpress_gem5_v2_base.dtsi | 3 |
2 files changed, 3 insertions, 1 deletions
diff --git a/src/dev/arm/Gic.py b/src/dev/arm/Gic.py index 734299f50..e1a8a78db 100644 --- a/src/dev/arm/Gic.py +++ b/src/dev/arm/Gic.py @@ -235,6 +235,7 @@ class Gicv3(BaseGic): node.append(self._state.interruptCellsProperty()) node.append(self._state.addrCellsProperty()) node.append(self._state.sizeCellsProperty()) + node.append(FdtProperty("ranges")) node.append(FdtProperty("interrupt-controller")) redist_stride = 0x40000 if self.gicv4 else 0x20000 diff --git a/system/arm/dt/platforms/vexpress_gem5_v2_base.dtsi b/system/arm/dt/platforms/vexpress_gem5_v2_base.dtsi index b901b9279..334074050 100644 --- a/system/arm/dt/platforms/vexpress_gem5_v2_base.dtsi +++ b/system/arm/dt/platforms/vexpress_gem5_v2_base.dtsi @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2017 ARM Limited + * Copyright (c) 2015-2017, 2019 ARM Limited * All rights reserved * * Redistribution and use in source and binary forms, with or without @@ -39,6 +39,7 @@ compatible = "arm,gic-v3"; #interrupt-cells = <0x3>; #address-cells = <0x2>; + ranges; interrupt-controller; redistributor-stride = <0x0 0x40000>; // 256kB stride reg = <0x0 0x2c000000 0x0 0x10000 |