diff options
| -rw-r--r-- | src/cpu/simple/BaseSimpleCPU.py | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/cpu/simple/BaseSimpleCPU.py b/src/cpu/simple/BaseSimpleCPU.py index 6714295d2..f8e2948c9 100644 --- a/src/cpu/simple/BaseSimpleCPU.py +++ b/src/cpu/simple/BaseSimpleCPU.py @@ -42,11 +42,11 @@ class BaseSimpleCPU(BaseCPU): def addCheckerCpu(self): if buildEnv['TARGET_ISA'] in ['arm']: - from m5.objects.ArmTLB import ArmTLB + from m5.objects.ArmTLB import ArmITB, ArmDTB self.checker = DummyChecker(workload = self.workload) - self.checker.itb = ArmTLB(size = self.itb.size) - self.checker.dtb = ArmTLB(size = self.dtb.size) + self.checker.itb = ArmITB(size = self.itb.size) + self.checker.dtb = ArmDTB(size = self.dtb.size) else: print("ERROR: Checker only supported under ARM ISA!") exit(1) |