diff options
| -rw-r--r-- | src/cpu/simple/atomic.hh | 2 | ||||
| -rw-r--r-- | src/cpu/simple/timing.hh | 4 | ||||
| -rw-r--r-- | src/dev/io_device.cc | 6 | ||||
| -rw-r--r-- | src/mem/bus.hh | 2 | ||||
| -rw-r--r-- | src/mem/cache/base_cache.cc | 2 | ||||
| -rw-r--r-- | src/mem/port.hh | 31 | ||||
| -rw-r--r-- | src/mem/tport.hh | 4 |
7 files changed, 31 insertions, 20 deletions
diff --git a/src/cpu/simple/atomic.hh b/src/cpu/simple/atomic.hh index 0edca9369..166a18127 100644 --- a/src/cpu/simple/atomic.hh +++ b/src/cpu/simple/atomic.hh @@ -87,7 +87,7 @@ class AtomicSimpleCPU : public BaseSimpleCPU public: CpuPort(const std::string &_name, AtomicSimpleCPU *_cpu) - : Port(_name), cpu(_cpu) + : Port(_name, _cpu), cpu(_cpu) { } protected: diff --git a/src/cpu/simple/timing.hh b/src/cpu/simple/timing.hh index 577e13e40..408fa315e 100644 --- a/src/cpu/simple/timing.hh +++ b/src/cpu/simple/timing.hh @@ -79,7 +79,7 @@ class TimingSimpleCPU : public BaseSimpleCPU public: CpuPort(const std::string &_name, TimingSimpleCPU *_cpu, Tick _lat) - : Port(_name), cpu(_cpu), lat(_lat) + : Port(_name, _cpu), cpu(_cpu), lat(_lat) { } protected: @@ -166,6 +166,8 @@ class TimingSimpleCPU : public BaseSimpleCPU PacketPtr ifetch_pkt; PacketPtr dcache_pkt; + + int cpu_id; Tick previousTick; diff --git a/src/dev/io_device.cc b/src/dev/io_device.cc index 9671d77cc..a1285fefc 100644 --- a/src/dev/io_device.cc +++ b/src/dev/io_device.cc @@ -37,7 +37,7 @@ PioPort::PioPort(PioDevice *dev, System *s, std::string pname) - : SimpleTimingPort(dev->name() + pname), device(dev) + : SimpleTimingPort(dev->name() + pname, dev), device(dev) { } @@ -92,8 +92,8 @@ BasicPioDevice::addressRanges(AddrRangeList &range_list) DmaPort::DmaPort(DmaDevice *dev, System *s) - : Port(dev->name() + "-dmaport"), device(dev), sys(s), pendingCount(0), - actionInProgress(0), drainEvent(NULL) + : Port(dev->name() + "-dmaport", dev), device(dev), sys(s), + pendingCount(0), actionInProgress(0), drainEvent(NULL) { } bool diff --git a/src/mem/bus.hh b/src/mem/bus.hh index 9fb33b7c3..7ec7e6830 100644 --- a/src/mem/bus.hh +++ b/src/mem/bus.hh @@ -144,7 +144,7 @@ class Bus : public MemObject /** Constructor for the BusPort.*/ BusPort(const std::string &_name, Bus *_bus, int _id) - : Port(_name), _onRetryList(false), bus(_bus), id(_id) + : Port(_name, _bus), _onRetryList(false), bus(_bus), id(_id) { } bool onRetryList() diff --git a/src/mem/cache/base_cache.cc b/src/mem/cache/base_cache.cc index 599958222..47d40a490 100644 --- a/src/mem/cache/base_cache.cc +++ b/src/mem/cache/base_cache.cc @@ -42,7 +42,7 @@ using namespace std; BaseCache::CachePort::CachePort(const std::string &_name, BaseCache *_cache, bool _isCpuSide) - : Port(_name), cache(_cache), isCpuSide(_isCpuSide) + : Port(_name, _cache), cache(_cache), isCpuSide(_isCpuSide) { blocked = false; waitingOnRetry = false; diff --git a/src/mem/port.hh b/src/mem/port.hh index b6eeb9db3..75afc04e6 100644 --- a/src/mem/port.hh +++ b/src/mem/port.hh @@ -58,6 +58,8 @@ typedef std::list<Range<Addr> > AddrRangeList; typedef std::list<Range<Addr> >::iterator AddrRangeIter; +class MemObject; + /** * Ports are used to interface memory objects to * each other. They will always come in pairs, and we refer to the other @@ -81,10 +83,13 @@ class Port memory objects. */ Port *peer; + /** A pointer to the MemObject that owns this port. This may not be set. */ + MemObject *owner; + public: Port() - : peer(NULL) + : peer(NULL), owner(NULL) { } /** @@ -92,9 +97,11 @@ class Port * * @param _name Port name for DPRINTF output. Should include name * of memory system object to which the port belongs. + * @param _owner Pointer to the MemObject that owns this port. + * Will not necessarily be set. */ - Port(const std::string &_name) - : portName(_name), peer(NULL) + Port(const std::string &_name, MemObject *_owner = NULL) + : portName(_name), peer(NULL), owner(_owner) { } /** Return port name (for DPRINTF). */ @@ -112,16 +119,18 @@ class Port void setName(const std::string &name) { portName = name; } - /** Function to set the pointer for the peer port. - @todo should be called by the configuration stuff (python). - */ + /** Function to set the pointer for the peer port. */ void setPeer(Port *port); - /** Function to set the pointer for the peer port. - @todo should be called by the configuration stuff (python). - */ + /** Function to get the pointer to the peer port. */ Port *getPeer() { return peer; } + /** Function to set the owner of this port. */ + void setOwner(MemObject *_owner) { owner = _owner; } + + /** Function to return the owner of this port. */ + MemObject *getOwner() { return owner; } + protected: /** These functions are protected because they should only be @@ -247,8 +256,8 @@ class Port class FunctionalPort : public Port { public: - FunctionalPort(const std::string &_name) - : Port(_name) + FunctionalPort(const std::string &_name, MemObject *_owner = NULL) + : Port(_name, _owner) {} protected: diff --git a/src/mem/tport.hh b/src/mem/tport.hh index fbe81c443..b419b7c7f 100644 --- a/src/mem/tport.hh +++ b/src/mem/tport.hh @@ -117,8 +117,8 @@ class SimpleTimingPort : public Port public: - SimpleTimingPort(std::string pname) - : Port(pname), outTiming(0), drainEvent(NULL) + SimpleTimingPort(std::string pname, MemObject *_owner = NULL) + : Port(pname, _owner), outTiming(0), drainEvent(NULL) {} /** Hook for draining timing accesses from the system. The |