summaryrefslogtreecommitdiff
path: root/arch/alpha/isa_traits.hh
diff options
context:
space:
mode:
Diffstat (limited to 'arch/alpha/isa_traits.hh')
-rw-r--r--arch/alpha/isa_traits.hh19
1 files changed, 9 insertions, 10 deletions
diff --git a/arch/alpha/isa_traits.hh b/arch/alpha/isa_traits.hh
index 5f8b00c40..65c72115b 100644
--- a/arch/alpha/isa_traits.hh
+++ b/arch/alpha/isa_traits.hh
@@ -75,6 +75,11 @@ class SyscallReturn {
#endif
+#if FULL_SYSTEM
+#include "arch/alpha/isa_fullsys_traits.hh"
+#endif
+
+
namespace AlphaISA
{
@@ -83,12 +88,6 @@ using namespace LittleEndianGuest;
// redirected register map, really only used for the full system case.
extern const int reg_redir[NumIntRegs];
-#if FULL_SYSTEM
-
-#include "arch/alpha/isa_fullsys_traits.hh"
-
-#endif
-
StaticInstPtr decodeInst(ExtMachInst);
#if !FULL_SYSTEM
@@ -99,12 +98,12 @@ extern const int reg_redir[NumIntRegs];
// return value itself in the standard return value reg (v0).
if (return_value.successful()) {
// no error
- regs->intRegFile[SyscallSuccessReg] = 0;
- regs->intRegFile[ReturnValueReg] = return_value.value();
+ regs->setIntReg(SyscallSuccessReg, 0);
+ regs->setIntReg(ReturnValueReg, return_value.value());
} else {
// got an error, return details
- regs->intRegFile[SyscallSuccessReg] = (IntReg) -1;
- regs->intRegFile[ReturnValueReg] = -return_value.value();
+ regs->setIntReg(SyscallSuccessReg, (IntReg)-1);
+ regs->setIntReg(ReturnValueReg, -return_value.value());
}
}
#endif