summaryrefslogtreecommitdiff
path: root/arch/alpha/isa_traits.hh
diff options
context:
space:
mode:
Diffstat (limited to 'arch/alpha/isa_traits.hh')
-rw-r--r--arch/alpha/isa_traits.hh7
1 files changed, 0 insertions, 7 deletions
diff --git a/arch/alpha/isa_traits.hh b/arch/alpha/isa_traits.hh
index 6b78722ad..5e2dac9f3 100644
--- a/arch/alpha/isa_traits.hh
+++ b/arch/alpha/isa_traits.hh
@@ -168,13 +168,6 @@ class AlphaISA
ITOUCH_ANNOTE = 0xffffffff,
};
-#if 0
- static inline Addr
- extractInstructionPrefetchTarget(const MachInst &IR, Addr PC) {
- return(0);
- }
-#endif
-
static inline bool isCallerSaveIntegerRegister(unsigned int reg) {
panic("register classification not implemented");
return (reg >= 1 && reg <= 8 || reg >= 22 && reg <= 25 || reg == 27);