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-rw-r--r--arch/alpha/faults.hh1
-rw-r--r--arch/alpha/isa_desc12
2 files changed, 7 insertions, 6 deletions
diff --git a/arch/alpha/faults.hh b/arch/alpha/faults.hh
index 45ac122dc..a49a1c4f0 100644
--- a/arch/alpha/faults.hh
+++ b/arch/alpha/faults.hh
@@ -47,6 +47,7 @@ enum Fault {
Fen_Fault, // FP not-enabled fault
Pal_Fault, // call_pal S/W interrupt
Integer_Overflow_Fault,
+ Fake_Mem_Fault,
Num_Faults // number of faults
};
diff --git a/arch/alpha/isa_desc b/arch/alpha/isa_desc
index 904af3ef0..0e07400d3 100644
--- a/arch/alpha/isa_desc
+++ b/arch/alpha/isa_desc
@@ -744,9 +744,9 @@ output header {{
/// Memory request flags. See mem_req_base.hh.
unsigned memAccessFlags;
/// Pointer to EAComp object.
- StaticInstPtr<AlphaISA> eaCompPtr;
+ const StaticInstPtr<AlphaISA> eaCompPtr;
/// Pointer to MemAcc object.
- StaticInstPtr<AlphaISA> memAccPtr;
+ const StaticInstPtr<AlphaISA> memAccPtr;
/// Constructor
Memory(const char *mnem, MachInst _machInst, OpClass __opClass,
@@ -762,8 +762,8 @@ output header {{
public:
- StaticInstPtr<AlphaISA> &eaCompInst() { return eaCompPtr; }
- StaticInstPtr<AlphaISA> &memAccInst() { return memAccPtr; }
+ const StaticInstPtr<AlphaISA> &eaCompInst() const { return eaCompPtr; }
+ const StaticInstPtr<AlphaISA> &memAccInst() const { return memAccPtr; }
};
/**
@@ -2539,9 +2539,9 @@ decode OPCODE default Unknown::unknown() {
xc->syscall();
}}, IsNonSpeculative);
// Read uniq reg into ABI return value register (r0)
- 0x9e: rduniq({{ R0 = Runiq; }}, IsNonSpeculative);
+ 0x9e: rduniq({{ R0 = Runiq; }});
// Write uniq reg with value from ABI arg register (r16)
- 0x9f: wruniq({{ Runiq = R16; }}, IsNonSpeculative);
+ 0x9f: wruniq({{ Runiq = R16; }});
}
}
#endif