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-rw-r--r--arch/alpha/isa_desc12
-rw-r--r--arch/alpha/isa_traits.hh4
2 files changed, 10 insertions, 6 deletions
diff --git a/arch/alpha/isa_desc b/arch/alpha/isa_desc
index 0e07400d3..904af3ef0 100644
--- a/arch/alpha/isa_desc
+++ b/arch/alpha/isa_desc
@@ -744,9 +744,9 @@ output header {{
/// Memory request flags. See mem_req_base.hh.
unsigned memAccessFlags;
/// Pointer to EAComp object.
- const StaticInstPtr<AlphaISA> eaCompPtr;
+ StaticInstPtr<AlphaISA> eaCompPtr;
/// Pointer to MemAcc object.
- const StaticInstPtr<AlphaISA> memAccPtr;
+ StaticInstPtr<AlphaISA> memAccPtr;
/// Constructor
Memory(const char *mnem, MachInst _machInst, OpClass __opClass,
@@ -762,8 +762,8 @@ output header {{
public:
- const StaticInstPtr<AlphaISA> &eaCompInst() const { return eaCompPtr; }
- const StaticInstPtr<AlphaISA> &memAccInst() const { return memAccPtr; }
+ StaticInstPtr<AlphaISA> &eaCompInst() { return eaCompPtr; }
+ StaticInstPtr<AlphaISA> &memAccInst() { return memAccPtr; }
};
/**
@@ -2539,9 +2539,9 @@ decode OPCODE default Unknown::unknown() {
xc->syscall();
}}, IsNonSpeculative);
// Read uniq reg into ABI return value register (r0)
- 0x9e: rduniq({{ R0 = Runiq; }});
+ 0x9e: rduniq({{ R0 = Runiq; }}, IsNonSpeculative);
// Write uniq reg with value from ABI arg register (r16)
- 0x9f: wruniq({{ Runiq = R16; }});
+ 0x9f: wruniq({{ Runiq = R16; }}, IsNonSpeculative);
}
}
#endif
diff --git a/arch/alpha/isa_traits.hh b/arch/alpha/isa_traits.hh
index 9327fa88b..9c7709a60 100644
--- a/arch/alpha/isa_traits.hh
+++ b/arch/alpha/isa_traits.hh
@@ -148,6 +148,10 @@ static const Addr PageOffset = PageBytes - 1;
NumIntRegs + NumFloatRegs + NumMiscRegs + NumInternalProcRegs
};
+ enum {
+ TotalDataRegs = NumIntRegs + NumFloatRegs
+ };
+
typedef union {
IntReg intreg;
FloatReg fpreg;