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-rw-r--r--arch/alpha/ev5.cc36
-rw-r--r--arch/alpha/faults.cc54
-rw-r--r--arch/alpha/faults.hh38
3 files changed, 68 insertions, 60 deletions
diff --git a/arch/alpha/ev5.cc b/arch/alpha/ev5.cc
index 2bb005eb4..c6da628be 100644
--- a/arch/alpha/ev5.cc
+++ b/arch/alpha/ev5.cc
@@ -164,41 +164,9 @@ AlphaISA::zeroRegisters(CPU *cpu)
}
void
-ExecContext::ev5_temp_trap(Fault fault)
-{
- DPRINTF(Fault, "Fault %s at PC: %#x\n", fault->name(), regs.pc);
- cpu->recordEvent(csprintf("Fault %s", fault->name()));
-
- assert(!misspeculating());
- kernelStats->fault(fault);
-
- if (fault->isA<ArithmeticFault>())
- panic("Arithmetic traps are unimplemented!");
-
- // exception restart address
- if (!fault->isA<InterruptFault>() || !inPalMode())
- setMiscReg(AlphaISA::IPR_EXC_ADDR, regs.pc);
-
- if (fault->isA<PalFault>() || fault->isA<ArithmeticFault>() /* ||
- fault == InterruptFault && !inPalMode() */) {
- // traps... skip faulting instruction.
- setMiscReg(AlphaISA::IPR_EXC_ADDR,
- readMiscReg(AlphaISA::IPR_EXC_ADDR) + 4);
- }
-
- if (!inPalMode())
- AlphaISA::swap_palshadow(&regs, true);
-
- regs.pc = readMiscReg(AlphaISA::IPR_PAL_BASE) +
- (dynamic_cast<AlphaFault *>(fault.get()))->vect();
- regs.npc = regs.pc + sizeof(MachInst);
-}
-
-
-void
AlphaISA::intr_post(RegFile *regs, Fault fault, Addr pc)
{
- bool use_pc = (fault == NoFault);
+/* bool use_pc = (fault == NoFault);
if (fault->isA<ArithmeticFault>())
panic("arithmetic faults NYI...");
@@ -218,7 +186,7 @@ AlphaISA::intr_post(RegFile *regs, Fault fault, Addr pc)
(dynamic_cast<AlphaFault *>(fault.get()))->vect();
else
regs->npc = regs->miscRegs.readReg(IPR_PAL_BASE) + pc;
-
+*/
// that's it! (orders of magnitude less painful than x86)
}
diff --git a/arch/alpha/faults.cc b/arch/alpha/faults.cc
index 78613761d..0a836363c 100644
--- a/arch/alpha/faults.cc
+++ b/arch/alpha/faults.cc
@@ -28,15 +28,20 @@
#include "arch/alpha/faults.hh"
#include "cpu/exec_context.hh"
+#include "cpu/base.hh"
+#include "base/trace.hh"
+#include "kern/kernel_stats.hh"
namespace AlphaISA
{
-FaultVect AlphaMachineCheckFault::_vect = 0x0401;
-FaultStat AlphaMachineCheckFault::_stat;
+FaultName MachineCheckFault::_name = "mchk";
+FaultVect MachineCheckFault::_vect = 0x0401;
+FaultStat MachineCheckFault::_stat;
-FaultVect AlphaAlignmentFault::_vect = 0x0301;
-FaultStat AlphaAlignmentFault::_stat;
+FaultName AlignmentFault::_name = "unalign";
+FaultVect AlignmentFault::_vect = 0x0301;
+FaultStat AlignmentFault::_stat;
FaultName ResetFault::_name = "reset";
FaultVect ResetFault::_vect = 0x0001;
@@ -96,20 +101,47 @@ FaultStat IntegerOverflowFault::_stat;
#if FULL_SYSTEM
-void AlphaFault::ev5_trap(ExecContext * xc)
+void AlphaFault::invoke(ExecContext * xc)
{
- xc->ev5_temp_trap(this);
+ DPRINTF(Fault, "Fault %s at PC: %#x\n", name(), xc->regs.pc);
+ xc->cpu->recordEvent(csprintf("Fault %s", name()));
+
+ assert(!xc->misspeculating());
+ xc->kernelStats->fault(this);
+
+ // exception restart address
+ if (setRestartAddress() || !xc->inPalMode())
+ xc->setMiscReg(AlphaISA::IPR_EXC_ADDR, xc->regs.pc);
+
+ if (skipFaultingInstruction()) {
+ // traps... skip faulting instruction.
+ xc->setMiscReg(AlphaISA::IPR_EXC_ADDR,
+ xc->readMiscReg(AlphaISA::IPR_EXC_ADDR) + 4);
+ }
+
+ if (!xc->inPalMode())
+ AlphaISA::swap_palshadow(&(xc->regs), true);
+
+ xc->regs.pc = xc->readMiscReg(AlphaISA::IPR_PAL_BASE) + vect();
+ xc->regs.npc = xc->regs.pc + sizeof(MachInst);
}
-void AlphaMachineCheckFault::ev5_trap(ExecContext * xc)
+void ArithmeticFault::invoke(ExecContext * xc)
{
- xc->ev5_temp_trap(this);
+ DPRINTF(Fault, "Fault %s at PC: %#x\n", name(), xc->regs.pc);
+ xc->cpu->recordEvent(csprintf("Fault %s", name()));
+
+ assert(!xc->misspeculating());
+ xc->kernelStats->fault(this);
+
+ panic("Arithmetic traps are unimplemented!");
}
-void AlphaAlignmentFault::ev5_trap(ExecContext * xc)
+
+/*void ArithmeticFault::invoke(ExecContext * xc)
{
- xc->ev5_temp_trap(this);
-}
+ panic("Arithmetic traps are unimplemented!");
+}*/
#endif
diff --git a/arch/alpha/faults.hh b/arch/alpha/faults.hh
index 156faa8fb..c4a72e07c 100644
--- a/arch/alpha/faults.hh
+++ b/arch/alpha/faults.hh
@@ -40,51 +40,50 @@ typedef const Addr FaultVect;
class AlphaFault : public virtual FaultBase
{
+ protected:
+ virtual bool skipFaultingInstruction() {return false;}
+ virtual bool setRestartAddress() {return true;}
public:
#if FULL_SYSTEM
- void ev5_trap(ExecContext * xc);
+ void invoke(ExecContext * xc);
#endif
virtual FaultVect vect() = 0;
};
-class AlphaMachineCheckFault :
- public MachineCheckFault,
- public AlphaFault
+class MachineCheckFault : public AlphaFault
{
private:
+ static FaultName _name;
static FaultVect _vect;
static FaultStat _stat;
public:
-#if FULL_SYSTEM
- void ev5_trap(ExecContext * xc);
-#endif
+ FaultName name() {return _name;}
FaultVect vect() {return _vect;}
FaultStat & stat() {return _stat;}
+ bool isMachineCheckFault() {return true;}
};
-class AlphaAlignmentFault :
- public AlignmentFault,
- public AlphaFault
+class AlignmentFault : public AlphaFault
{
private:
+ static FaultName _name;
static FaultVect _vect;
static FaultStat _stat;
public:
-#if FULL_SYSTEM
- void ev5_trap(ExecContext * xc);
-#endif
+ FaultName name() {return _name;}
FaultVect vect() {return _vect;}
FaultStat & stat() {return _stat;}
+ bool isAlignmentFault() {return true;}
};
static inline Fault genMachineCheckFault()
{
- return new AlphaMachineCheckFault;
+ return new MachineCheckFault;
}
static inline Fault genAlignmentFault()
{
- return new AlphaAlignmentFault;
+ return new AlignmentFault;
}
class ResetFault : public AlphaFault
@@ -101,6 +100,8 @@ class ResetFault : public AlphaFault
class ArithmeticFault : public AlphaFault
{
+ protected:
+ bool skipFaultingInstruction() {return true;}
private:
static FaultName _name;
static FaultVect _vect;
@@ -109,10 +110,15 @@ class ArithmeticFault : public AlphaFault
FaultName name() {return _name;}
FaultVect vect() {return _vect;}
FaultStat & stat() {return _stat;}
+#if FULL_SYSTEM
+ void invoke(ExecContext * xc);
+#endif
};
class InterruptFault : public AlphaFault
{
+ protected:
+ bool setRestartAddress() {return false;}
private:
static FaultName _name;
static FaultVect _vect;
@@ -233,6 +239,8 @@ class FloatEnableFault : public AlphaFault
class PalFault : public AlphaFault
{
+ protected:
+ bool skipFaultingInstruction() {return true;}
private:
static FaultName _name;
static FaultVect _vect;
generated by cgit v1.2.3 (git 2.25.1) at 2025-03-24 05:36:12 +0000