diff options
Diffstat (limited to 'arch/alpha')
| -rw-r--r-- | arch/alpha/SConscript | 1 | ||||
| -rw-r--r-- | arch/alpha/ev5.cc | 36 | ||||
| -rw-r--r-- | arch/alpha/faults.cc | 54 | ||||
| -rw-r--r-- | arch/alpha/faults.hh | 38 | ||||
| -rw-r--r-- | arch/alpha/isa_traits.hh | 1 | ||||
| -rw-r--r-- | arch/alpha/process.cc | 61 | ||||
| -rw-r--r-- | arch/alpha/process.hh | 48 | ||||
| -rw-r--r-- | arch/alpha/system.cc | 2 |
8 files changed, 179 insertions, 62 deletions
diff --git a/arch/alpha/SConscript b/arch/alpha/SConscript index 3b0e69b7a..03d73eef7 100644 --- a/arch/alpha/SConscript +++ b/arch/alpha/SConscript @@ -64,6 +64,7 @@ syscall_emulation_sources = Split(''' common_syscall_emul.cc linux_process.cc tru64_process.cc + process.cc ''') # Set up complete list of sources based on configuration. diff --git a/arch/alpha/ev5.cc b/arch/alpha/ev5.cc index 2bb005eb4..c6da628be 100644 --- a/arch/alpha/ev5.cc +++ b/arch/alpha/ev5.cc @@ -164,41 +164,9 @@ AlphaISA::zeroRegisters(CPU *cpu) } void -ExecContext::ev5_temp_trap(Fault fault) -{ - DPRINTF(Fault, "Fault %s at PC: %#x\n", fault->name(), regs.pc); - cpu->recordEvent(csprintf("Fault %s", fault->name())); - - assert(!misspeculating()); - kernelStats->fault(fault); - - if (fault->isA<ArithmeticFault>()) - panic("Arithmetic traps are unimplemented!"); - - // exception restart address - if (!fault->isA<InterruptFault>() || !inPalMode()) - setMiscReg(AlphaISA::IPR_EXC_ADDR, regs.pc); - - if (fault->isA<PalFault>() || fault->isA<ArithmeticFault>() /* || - fault == InterruptFault && !inPalMode() */) { - // traps... skip faulting instruction. - setMiscReg(AlphaISA::IPR_EXC_ADDR, - readMiscReg(AlphaISA::IPR_EXC_ADDR) + 4); - } - - if (!inPalMode()) - AlphaISA::swap_palshadow(®s, true); - - regs.pc = readMiscReg(AlphaISA::IPR_PAL_BASE) + - (dynamic_cast<AlphaFault *>(fault.get()))->vect(); - regs.npc = regs.pc + sizeof(MachInst); -} - - -void AlphaISA::intr_post(RegFile *regs, Fault fault, Addr pc) { - bool use_pc = (fault == NoFault); +/* bool use_pc = (fault == NoFault); if (fault->isA<ArithmeticFault>()) panic("arithmetic faults NYI..."); @@ -218,7 +186,7 @@ AlphaISA::intr_post(RegFile *regs, Fault fault, Addr pc) (dynamic_cast<AlphaFault *>(fault.get()))->vect(); else regs->npc = regs->miscRegs.readReg(IPR_PAL_BASE) + pc; - +*/ // that's it! (orders of magnitude less painful than x86) } diff --git a/arch/alpha/faults.cc b/arch/alpha/faults.cc index 78613761d..0a836363c 100644 --- a/arch/alpha/faults.cc +++ b/arch/alpha/faults.cc @@ -28,15 +28,20 @@ #include "arch/alpha/faults.hh" #include "cpu/exec_context.hh" +#include "cpu/base.hh" +#include "base/trace.hh" +#include "kern/kernel_stats.hh" namespace AlphaISA { -FaultVect AlphaMachineCheckFault::_vect = 0x0401; -FaultStat AlphaMachineCheckFault::_stat; +FaultName MachineCheckFault::_name = "mchk"; +FaultVect MachineCheckFault::_vect = 0x0401; +FaultStat MachineCheckFault::_stat; -FaultVect AlphaAlignmentFault::_vect = 0x0301; -FaultStat AlphaAlignmentFault::_stat; +FaultName AlignmentFault::_name = "unalign"; +FaultVect AlignmentFault::_vect = 0x0301; +FaultStat AlignmentFault::_stat; FaultName ResetFault::_name = "reset"; FaultVect ResetFault::_vect = 0x0001; @@ -96,20 +101,47 @@ FaultStat IntegerOverflowFault::_stat; #if FULL_SYSTEM -void AlphaFault::ev5_trap(ExecContext * xc) +void AlphaFault::invoke(ExecContext * xc) { - xc->ev5_temp_trap(this); + DPRINTF(Fault, "Fault %s at PC: %#x\n", name(), xc->regs.pc); + xc->cpu->recordEvent(csprintf("Fault %s", name())); + + assert(!xc->misspeculating()); + xc->kernelStats->fault(this); + + // exception restart address + if (setRestartAddress() || !xc->inPalMode()) + xc->setMiscReg(AlphaISA::IPR_EXC_ADDR, xc->regs.pc); + + if (skipFaultingInstruction()) { + // traps... skip faulting instruction. + xc->setMiscReg(AlphaISA::IPR_EXC_ADDR, + xc->readMiscReg(AlphaISA::IPR_EXC_ADDR) + 4); + } + + if (!xc->inPalMode()) + AlphaISA::swap_palshadow(&(xc->regs), true); + + xc->regs.pc = xc->readMiscReg(AlphaISA::IPR_PAL_BASE) + vect(); + xc->regs.npc = xc->regs.pc + sizeof(MachInst); } -void AlphaMachineCheckFault::ev5_trap(ExecContext * xc) +void ArithmeticFault::invoke(ExecContext * xc) { - xc->ev5_temp_trap(this); + DPRINTF(Fault, "Fault %s at PC: %#x\n", name(), xc->regs.pc); + xc->cpu->recordEvent(csprintf("Fault %s", name())); + + assert(!xc->misspeculating()); + xc->kernelStats->fault(this); + + panic("Arithmetic traps are unimplemented!"); } -void AlphaAlignmentFault::ev5_trap(ExecContext * xc) + +/*void ArithmeticFault::invoke(ExecContext * xc) { - xc->ev5_temp_trap(this); -} + panic("Arithmetic traps are unimplemented!"); +}*/ #endif diff --git a/arch/alpha/faults.hh b/arch/alpha/faults.hh index 156faa8fb..c4a72e07c 100644 --- a/arch/alpha/faults.hh +++ b/arch/alpha/faults.hh @@ -40,51 +40,50 @@ typedef const Addr FaultVect; class AlphaFault : public virtual FaultBase { + protected: + virtual bool skipFaultingInstruction() {return false;} + virtual bool setRestartAddress() {return true;} public: #if FULL_SYSTEM - void ev5_trap(ExecContext * xc); + void invoke(ExecContext * xc); #endif virtual FaultVect vect() = 0; }; -class AlphaMachineCheckFault : - public MachineCheckFault, - public AlphaFault +class MachineCheckFault : public AlphaFault { private: + static FaultName _name; static FaultVect _vect; static FaultStat _stat; public: -#if FULL_SYSTEM - void ev5_trap(ExecContext * xc); -#endif + FaultName name() {return _name;} FaultVect vect() {return _vect;} FaultStat & stat() {return _stat;} + bool isMachineCheckFault() {return true;} }; -class AlphaAlignmentFault : - public AlignmentFault, - public AlphaFault +class AlignmentFault : public AlphaFault { private: + static FaultName _name; static FaultVect _vect; static FaultStat _stat; public: -#if FULL_SYSTEM - void ev5_trap(ExecContext * xc); -#endif + FaultName name() {return _name;} FaultVect vect() {return _vect;} FaultStat & stat() {return _stat;} + bool isAlignmentFault() {return true;} }; static inline Fault genMachineCheckFault() { - return new AlphaMachineCheckFault; + return new MachineCheckFault; } static inline Fault genAlignmentFault() { - return new AlphaAlignmentFault; + return new AlignmentFault; } class ResetFault : public AlphaFault @@ -101,6 +100,8 @@ class ResetFault : public AlphaFault class ArithmeticFault : public AlphaFault { + protected: + bool skipFaultingInstruction() {return true;} private: static FaultName _name; static FaultVect _vect; @@ -109,10 +110,15 @@ class ArithmeticFault : public AlphaFault FaultName name() {return _name;} FaultVect vect() {return _vect;} FaultStat & stat() {return _stat;} +#if FULL_SYSTEM + void invoke(ExecContext * xc); +#endif }; class InterruptFault : public AlphaFault { + protected: + bool setRestartAddress() {return false;} private: static FaultName _name; static FaultVect _vect; @@ -233,6 +239,8 @@ class FloatEnableFault : public AlphaFault class PalFault : public AlphaFault { + protected: + bool skipFaultingInstruction() {return true;} private: static FaultName _name; static FaultVect _vect; diff --git a/arch/alpha/isa_traits.hh b/arch/alpha/isa_traits.hh index 938ba696e..b8aeffdde 100644 --- a/arch/alpha/isa_traits.hh +++ b/arch/alpha/isa_traits.hh @@ -57,7 +57,6 @@ namespace AlphaISA { typedef uint32_t MachInst; -// typedef uint64_t Addr; typedef uint8_t RegIndex; enum { diff --git a/arch/alpha/process.cc b/arch/alpha/process.cc new file mode 100644 index 000000000..b2dbe7ad1 --- /dev/null +++ b/arch/alpha/process.cc @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2003-2004 The Regents of The University of Michigan + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "arch/alpha/process.hh" + +namespace AlphaISA +{ + +LiveProcess * +createProcess(const std::string &nm, ObjectFile * objFile, + int stdin_fd, int stdout_fd, int stderr_fd, + std::vector<std::string> &argv, std::vector<std::string> &envp) +{ + LiveProcess * process = NULL; + if (objFile->getArch() != ObjectFile::Alpha) + fatal("Object file does not match architecture."); + switch (objFile->getOpSys()) { + case ObjectFile::Tru64: + process = new AlphaTru64Process(nm, objFile, + stdin_fd, stdout_fd, stderr_fd, + argv, envp); + break; + + case ObjectFile::Linux: + process = new AlphaLinuxProcess(nm, objFile, + stdin_fd, stdout_fd, stderr_fd, + argv, envp); + break; + + default: + fatal("Unknown/unsupported operating system."); + } + return process; +} + +} // namespace AlphaISA diff --git a/arch/alpha/process.hh b/arch/alpha/process.hh new file mode 100644 index 000000000..7b660ddd0 --- /dev/null +++ b/arch/alpha/process.hh @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2003-2004 The Regents of The University of Michigan + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __ALPHA_PROCESS_HH__ +#define __ALPHA_PROCESS_HH__ + +#include <string> + +#include "arch/alpha/linux_process.hh" +#include "arch/alpha/tru64_process.hh" +#include "base/loader/object_file.hh" + +namespace AlphaISA +{ + +LiveProcess * +createProcess(const std::string &nm, ObjectFile * objFile, + int stdin_fd, int stdout_fd, int stderr_fd, + std::vector<std::string> &argv, std::vector<std::string> &envp); + +} // namespace AlphaISA + +#endif // __ALPHA_PROCESS_HH__ diff --git a/arch/alpha/system.cc b/arch/alpha/system.cc index b841a6d53..1e80c7768 100644 --- a/arch/alpha/system.cc +++ b/arch/alpha/system.cc @@ -27,6 +27,7 @@ */ #include "arch/alpha/system.hh" +#include "arch/vtophys.hh" #include "base/remote_gdb.hh" #include "base/loader/object_file.hh" #include "base/loader/symtab.hh" @@ -35,7 +36,6 @@ #include "mem/functional/physical.hh" #include "sim/byteswap.hh" #include "sim/builder.hh" -#include "targetarch/vtophys.hh" using namespace LittleEndianGuest; |