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-rw-r--r--arch/mips/isa/decoder.isa2
-rw-r--r--arch/mips/isa/operands.isa1
2 files changed, 2 insertions, 1 deletions
diff --git a/arch/mips/isa/decoder.isa b/arch/mips/isa/decoder.isa
index eaa7b7248..077f0afd0 100644
--- a/arch/mips/isa/decoder.isa
+++ b/arch/mips/isa/decoder.isa
@@ -119,7 +119,7 @@ decode OPCODE_HI default Unknown::unknown() {
}
format BasicOp {
- 0x4: syscall({{ xc->syscall(); }},IsNonSpeculative);
+ 0x4: syscall({{ xc->syscall(R2); }},IsNonSpeculative);
0x5: break({{ panic("Not implemented break yet"); }},IsNonSpeculative);
0x7: sync({{ panic("Not implemented sync yet"); }},IsNonSpeculative);
}
diff --git a/arch/mips/isa/operands.isa b/arch/mips/isa/operands.isa
index 5bc32d6e1..2fa3238dc 100644
--- a/arch/mips/isa/operands.isa
+++ b/arch/mips/isa/operands.isa
@@ -18,6 +18,7 @@ def operands {{
'Rt': ('IntReg', 'uw', 'RT', 'IsInteger', 3),
'r31': ('IntReg', 'uw','R31','IsInteger', 4),
'R0': ('IntReg', 'uw','R0', 'IsInteger', 5),
+ 'R2': ('IntReg', 'uw','2', 'IsInteger', 5),
'IntImm': ('IntReg', 'uw', 'INTIMM', 'IsInteger', 3),