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-rw-r--r--arch/mips/isa_traits.hh166
1 files changed, 13 insertions, 153 deletions
diff --git a/arch/mips/isa_traits.hh b/arch/mips/isa_traits.hh
index 35c207828..83b021540 100644
--- a/arch/mips/isa_traits.hh
+++ b/arch/mips/isa_traits.hh
@@ -60,7 +60,7 @@ class SyscallReturn {
template <class T>
SyscallReturn(T v, bool s)
{
- retval = (uint64_t)v;
+ retval = (uint32_t)v;
success = s;
}
@@ -68,7 +68,7 @@ class SyscallReturn {
SyscallReturn(T v)
{
success = (v >= 0);
- retval = (uint64_t)v;
+ retval = (uint32_t)v;
}
~SyscallReturn() {}
@@ -138,7 +138,7 @@ namespace MipsISA
const int SyscallNumReg = ReturnValueReg1;
const int SyscallPseudoReturnReg = ReturnValueReg1;
- const int SyscallSuccessReg = ReturnValueReg1;
+ const int SyscallSuccessReg = ArgumentReg3;
const int LogVMPageSize = 13; // 8K bytes
const int VMPageSize = (1 << LogVMPageSize);
@@ -163,30 +163,8 @@ namespace MipsISA
MiscReg_DepTag = 67
};
- typedef uint64_t IntReg;
-
- class IntRegFile
- {
- protected:
- IntReg regs[NumIntRegs];
-
- public:
- IntReg readReg(int intReg)
- {
- return regs[intReg];
- }
-
- Fault setReg(int intReg, const IntReg &val)
- {
- regs[intReg] = val;
- return NoFault;
- }
-
- void serialize(std::ostream &os);
-
- void unserialize(Checkpoint *cp, const std::string &section);
-
- };
+ typedef uint32_t IntReg;
+ typedef IntReg IntRegFile[NumIntRegs];
/* floating point register file entry type
typedef union {
@@ -263,7 +241,7 @@ namespace MipsISA
// cop-0/cop-1 system control register file
typedef uint64_t MiscReg;
-//typedef MiscReg MiscRegFile[NumMiscRegs];
+ //typedef MiscReg MiscRegFile[NumMiscRegs];
class MiscRegFile {
protected:
@@ -474,6 +452,7 @@ namespace MipsISA
Hi,
Lo,
FCSR,
+ FIR,
FPCR,
//Alpha Regs, but here now, for
@@ -506,130 +485,17 @@ extern const Addr PageOffset;
MiscReg ctrlreg;
} AnyReg;
- class RegFile {
- protected:
+ struct RegFile {
IntRegFile intRegFile; // (signed) integer register file
FloatRegFile floatRegFile; // floating point register file
- MiscRegFile miscRegFile; // control register file
-
- public:
-
- void clear()
- {
- bzero(&intRegFile, sizeof(intRegFile));
- bzero(&floatRegFile, sizeof(floatRegFile));
- bzero(&miscRegFile, sizeof(miscRegFile));
- }
-
- MiscReg readMiscReg(int miscReg)
- {
- return miscRegFile.readReg(miscReg);
- }
-
- MiscReg readMiscRegWithEffect(int miscReg,
- Fault &fault, ExecContext *xc)
- {
- fault = NoFault;
- return miscRegFile.readRegWithEffect(miscReg, fault, xc);
- }
-
- Fault setMiscReg(int miscReg, const MiscReg &val)
- {
- return miscRegFile.setReg(miscReg, val);
- }
-
- Fault setMiscRegWithEffect(int miscReg, const MiscReg &val,
- ExecContext * xc)
- {
- return miscRegFile.setRegWithEffect(miscReg, val, xc);
- }
-
- FloatReg readFloatReg(int floatReg)
- {
- return floatRegFile.readReg(floatReg);
- }
-
- FloatReg readFloatReg(int floatReg, int width)
- {
- return readFloatReg(floatReg);
- }
-
- FloatRegBits readFloatRegBits(int floatReg)
- {
- return floatRegFile.readRegBits(floatReg);
- }
-
- FloatRegBits readFloatRegBits(int floatReg, int width)
- {
- return readFloatRegBits(floatReg);
- }
-
- Fault setFloatReg(int floatReg, const FloatReg &val)
- {
- return floatRegFile.setReg(floatReg, val);
- }
-
- Fault setFloatReg(int floatReg, const FloatReg &val, int width)
- {
- return setFloatReg(floatReg, val);
- }
+ MiscRegFile miscRegs; // control register file
- Fault setFloatRegBits(int floatReg, const FloatRegBits &val)
- {
- return floatRegFile.setRegBits(floatReg, val);
- }
-
- Fault setFloatRegBits(int floatReg, const FloatRegBits &val, int width)
- {
- return setFloatRegBits(floatReg, val);
- }
-
- IntReg readIntReg(int intReg)
- {
- return intRegFile.readReg(intReg);
- }
-
- Fault setIntReg(int intReg, const IntReg &val)
- {
- return intRegFile.setReg(intReg, val);
- }
- protected:
Addr pc; // program counter
Addr npc; // next-cycle program counter
Addr nnpc; // next-next-cycle program counter
// used to implement branch delay slot
// not real register
- public:
- Addr readPC()
- {
- return pc;
- }
-
- void setPC(Addr val)
- {
- pc = val;
- }
-
- Addr readNextPC()
- {
- return npc;
- }
-
- void setNextPC(Addr val)
- {
- npc = val;
- }
-
- Addr readNextNPC()
- {
- return nnpc;
- }
-
- void setNextNPC(Addr val)
- {
- nnpc = val;
- }
MiscReg hi; // MIPS HI Register
MiscReg lo; // MIPS LO Register
@@ -732,21 +598,15 @@ extern const Addr PageOffset;
static inline void setSyscallReturn(SyscallReturn return_value, RegFile *regs)
{
- // check for error condition. Alpha syscall convention is to
- // indicate success/failure in reg a3 (r19) and put the
- // return value itself in the standard return value reg (v0).
if (return_value.successful()) {
// no error
- regs->setIntReg(ReturnValueReg1, 0);
- regs->setIntReg(ReturnValueReg2, return_value.value());
+ regs->intRegFile[SyscallSuccessReg] = 0;
+ regs->intRegFile[ReturnValueReg1] = return_value.value();
} else {
// got an error, return details
- regs->setIntReg(ReturnValueReg1, (IntReg) -1);
- regs->setIntReg(ReturnValueReg2, -return_value.value());
+ regs->intRegFile[SyscallSuccessReg] = (IntReg) -1;
+ regs->intRegFile[ReturnValueReg1] = -return_value.value();
}
-
- //regs->intRegFile[ReturnValueReg1] = (IntReg)return_value;
- //panic("Returning from syscall\n");
}
// Machine operations