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-rw-r--r--arch/sparc/isa/formats/mem.isa5
-rw-r--r--arch/sparc/isa/formats/priv.isa20
-rw-r--r--arch/sparc/isa/formats/trap.isa2
3 files changed, 21 insertions, 6 deletions
diff --git a/arch/sparc/isa/formats/mem.isa b/arch/sparc/isa/formats/mem.isa
index 06725eae8..cf6e7d95b 100644
--- a/arch/sparc/isa/formats/mem.isa
+++ b/arch/sparc/isa/formats/mem.isa
@@ -34,9 +34,10 @@ def template MemExecute {{
Trace::InstRecord *traceData) const
{
Fault fault = NoFault;
+ Addr EA;
%(op_decl)s;
%(op_rd)s;
- ea_code
+ %(ea_code)s;
%(code)s;
if(fault == NoFault)
@@ -54,9 +55,9 @@ def format Mem(code, *opt_flags) {{
orig_code = code
cblk = CodeBlock(code)
iop = InstObjParams(name, Name, 'SparcStaticInst', cblk, opt_flags)
+ iop.ea_code = CodeBlock('EA = I ? (R1 + SIMM13) : R1 + R2;').code
header_output = BasicDeclare.subst(iop)
decoder_output = BasicConstructor.subst(iop)
decode_block = BasicDecode.subst(iop)
exec_output = MemExecute.subst(iop)
- exec_output.replace('ea_code', 'EA = I ? (R1 + SIMM13) : R1 + R2;');
}};
diff --git a/arch/sparc/isa/formats/priv.isa b/arch/sparc/isa/formats/priv.isa
index c89e769b4..162ad5ee0 100644
--- a/arch/sparc/isa/formats/priv.isa
+++ b/arch/sparc/isa/formats/priv.isa
@@ -91,12 +91,18 @@ def template PrivExecute {{
%(op_decl)s;
%(op_rd)s;
+ //Since these are processed inside templates and not in codeblocks,
+ //They aren't translated by the isa_parser. Their names begin with
+ //underscores so they don't cause conflicts.
+ uint32_t _PstatePriv = xc->readMiscReg(MISCREG_PSTATE_PRIV);
+
//If the processor isn't in privileged mode, fault out right away
- if(!PstatePriv)
- return new PrivilegedOpcode
+ if(!_PstatePriv)
+ return new PrivilegedOpcode;
%(code)s;
%(op_wb)s;
+ return NoFault;
}
}};
@@ -107,12 +113,18 @@ def template PrivTickExecute {{
%(op_decl)s;
%(op_rd)s;
+ //Since these are processed inside templates and not in codeblocks,
+ //They aren't translated by the isa_parser. Their names begin with
+ //underscores so they don't cause conflicts.
+ uint32_t _PstatePriv = xc->readMiscReg(MISCREG_PSTATE_PRIV);
+ uint32_t _TickNpt = xc->readMiscReg(MISCREG_TICK_NPT);
//If the processor isn't in privileged mode, fault out right away
- if(!PstatePriv && TickNpt)
- return new PrivilegedAction
+ if(!_PstatePriv && _TickNpt)
+ return new PrivilegedAction;
%(code)s;
%(op_wb)s;
+ return NoFault;
}
}};
diff --git a/arch/sparc/isa/formats/trap.isa b/arch/sparc/isa/formats/trap.isa
index 935fbfe6b..db4494132 100644
--- a/arch/sparc/isa/formats/trap.isa
+++ b/arch/sparc/isa/formats/trap.isa
@@ -36,6 +36,8 @@ def template TrapExecute {{
Trace::InstRecord *traceData) const
{
Fault fault = NoFault;
+ %(op_decl)s;
+ %(op_rd)s;
%(code)s
return fault;
}