summaryrefslogtreecommitdiff
path: root/arch/sparc
diff options
context:
space:
mode:
Diffstat (limited to 'arch/sparc')
-rw-r--r--arch/sparc/SConscript84
-rw-r--r--arch/sparc/faults.cc255
-rw-r--r--arch/sparc/faults.hh591
-rw-r--r--arch/sparc/isa/base.isa222
-rw-r--r--arch/sparc/isa/bitfields.isa48
-rw-r--r--arch/sparc/isa/decoder.isa691
-rw-r--r--arch/sparc/isa/formats.isa28
-rw-r--r--arch/sparc/isa/formats/basic.isa68
-rw-r--r--arch/sparc/isa/formats/branch.isa308
-rw-r--r--arch/sparc/isa/formats/integerop.isa349
-rw-r--r--arch/sparc/isa/formats/mem.isa171
-rw-r--r--arch/sparc/isa/formats/nop.isa62
-rw-r--r--arch/sparc/isa/formats/priv.isa139
-rw-r--r--arch/sparc/isa/formats/trap.isa64
-rw-r--r--arch/sparc/isa/formats/unknown.isa46
-rw-r--r--arch/sparc/isa/includes.isa46
-rw-r--r--arch/sparc/isa/main.isa52
-rw-r--r--arch/sparc/isa/operands.isa115
-rw-r--r--arch/sparc/isa_traits.hh187
-rw-r--r--arch/sparc/linux/linux.cc68
-rw-r--r--arch/sparc/linux/linux.hh61
-rw-r--r--arch/sparc/linux/process.cc407
-rw-r--r--arch/sparc/linux/process.hh65
-rw-r--r--arch/sparc/process.cc388
-rw-r--r--arch/sparc/process.hh79
-rw-r--r--arch/sparc/regfile.hh812
-rw-r--r--arch/sparc/solaris/process.cc347
-rw-r--r--arch/sparc/solaris/process.hh63
-rw-r--r--arch/sparc/solaris/solaris.cc74
-rw-r--r--arch/sparc/solaris/solaris.hh62
-rw-r--r--arch/sparc/stacktrace.hh119
-rw-r--r--arch/sparc/system.cc200
-rw-r--r--arch/sparc/system.hh114
-rw-r--r--arch/sparc/utility.hh89
34 files changed, 0 insertions, 6474 deletions
diff --git a/arch/sparc/SConscript b/arch/sparc/SConscript
deleted file mode 100644
index 7362c9275..000000000
--- a/arch/sparc/SConscript
+++ /dev/null
@@ -1,84 +0,0 @@
-# -*- mode:python -*-
-
-# Copyright (c) 2004-2005 The Regents of The University of Michigan
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are
-# met: redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer;
-# redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution;
-# neither the name of the copyright holders nor the names of its
-# contributors may be used to endorse or promote products derived from
-# this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
-import os
-import sys
-from os.path import isdir
-
-# Import build environment variable from SConstruct.
-Import('env')
-
-###################################################
-#
-# Define needed sources.
-#
-###################################################
-
-# Base sources used by all configurations.
-base_sources = Split('''
- faults.cc
- isa_traits.cc
- ''')
-
-# Full-system sources
-full_system_sources = Split('''
- tlb.cc
- arguments.cc
- ev5.cc
- osfpal.cc
- stacktrace.cc
- vtophys.cc
- ''')
-
-# Syscall emulation (non-full-system) sources
-syscall_emulation_sources = Split('''
- linux/linux.cc
- linux/process.cc
- solaris/solaris.cc
- solaris/process.cc
- process.cc
- ''')
-
-sources = base_sources
-
-if env['FULL_SYSTEM']:
- sources += full_system_sources
-else:
- sources += syscall_emulation_sources
-
-# Convert file names to SCons File objects. This takes care of the
-# path relative to the top of the directory tree.
-sources = [File(s) for s in sources]
-
-# Add in files generated by the ISA description.
-isa_desc_files = env.ISADesc('isa/main.isa')
-# Only non-header files need to be compiled.
-isa_desc_sources = [f for f in isa_desc_files if not f.path.endswith('.hh')]
-sources += isa_desc_sources
-
-Return('sources')
diff --git a/arch/sparc/faults.cc b/arch/sparc/faults.cc
deleted file mode 100644
index 67a89ab0e..000000000
--- a/arch/sparc/faults.cc
+++ /dev/null
@@ -1,255 +0,0 @@
-/*
- * Copyright (c) 2003-2005 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "arch/sparc/faults.hh"
-#include "cpu/exec_context.hh"
-#include "cpu/base.hh"
-#include "base/trace.hh"
-
-namespace SparcISA
-{
-
-FaultName InternalProcessorError::_name = "intprocerr";
-TrapType InternalProcessorError::_trapType = 0x029;
-FaultPriority InternalProcessorError::_priority = 4;
-FaultStat InternalProcessorError::_count;
-
-FaultName MemAddressNotAligned::_name = "unalign";
-TrapType MemAddressNotAligned::_trapType = 0x034;
-FaultPriority MemAddressNotAligned::_priority = 10;
-FaultStat MemAddressNotAligned::_count;
-
-FaultName PowerOnReset::_name = "pow_reset";
-TrapType PowerOnReset::_trapType = 0x001;
-FaultPriority PowerOnReset::_priority = 0;
-FaultStat PowerOnReset::_count;
-
-FaultName WatchDogReset::_name = "watch_dog_reset";
-TrapType WatchDogReset::_trapType = 0x002;
-FaultPriority WatchDogReset::_priority = 1;
-FaultStat WatchDogReset::_count;
-
-FaultName ExternallyInitiatedReset::_name = "extern_reset";
-TrapType ExternallyInitiatedReset::_trapType = 0x003;
-FaultPriority ExternallyInitiatedReset::_priority = 1;
-FaultStat ExternallyInitiatedReset::_count;
-
-FaultName SoftwareInitiatedReset::_name = "software_reset";
-TrapType SoftwareInitiatedReset::_trapType = 0x004;
-FaultPriority SoftwareInitiatedReset::_priority = 1;
-FaultStat SoftwareInitiatedReset::_count;
-
-FaultName REDStateException::_name = "red_counte";
-TrapType REDStateException::_trapType = 0x005;
-FaultPriority REDStateException::_priority = 1;
-FaultStat REDStateException::_count;
-
-FaultName InstructionAccessException::_name = "inst_access";
-TrapType InstructionAccessException::_trapType = 0x008;
-FaultPriority InstructionAccessException::_priority = 5;
-FaultStat InstructionAccessException::_count;
-
-FaultName InstructionAccessMMUMiss::_name = "inst_mmu";
-TrapType InstructionAccessMMUMiss::_trapType = 0x009;
-FaultPriority InstructionAccessMMUMiss::_priority = 2;
-FaultStat InstructionAccessMMUMiss::_count;
-
-FaultName InstructionAccessError::_name = "inst_error";
-TrapType InstructionAccessError::_trapType = 0x00A;
-FaultPriority InstructionAccessError::_priority = 3;
-FaultStat InstructionAccessError::_count;
-
-FaultName IllegalInstruction::_name = "illegal_inst";
-TrapType IllegalInstruction::_trapType = 0x010;
-FaultPriority IllegalInstruction::_priority = 7;
-FaultStat IllegalInstruction::_count;
-
-FaultName PrivilegedOpcode::_name = "priv_opcode";
-TrapType PrivilegedOpcode::_trapType = 0x011;
-FaultPriority PrivilegedOpcode::_priority = 6;
-FaultStat PrivilegedOpcode::_count;
-
-FaultName UnimplementedLDD::_name = "unimp_ldd";
-TrapType UnimplementedLDD::_trapType = 0x012;
-FaultPriority UnimplementedLDD::_priority = 6;
-FaultStat UnimplementedLDD::_count;
-
-FaultName UnimplementedSTD::_name = "unimp_std";
-TrapType UnimplementedSTD::_trapType = 0x013;
-FaultPriority UnimplementedSTD::_priority = 6;
-FaultStat UnimplementedSTD::_count;
-
-FaultName FpDisabled::_name = "fp_disabled";
-TrapType FpDisabled::_trapType = 0x020;
-FaultPriority FpDisabled::_priority = 8;
-FaultStat FpDisabled::_count;
-
-FaultName FpExceptionIEEE754::_name = "fp_754";
-TrapType FpExceptionIEEE754::_trapType = 0x021;
-FaultPriority FpExceptionIEEE754::_priority = 11;
-FaultStat FpExceptionIEEE754::_count;
-
-FaultName FpExceptionOther::_name = "fp_other";
-TrapType FpExceptionOther::_trapType = 0x022;
-FaultPriority FpExceptionOther::_priority = 11;
-FaultStat FpExceptionOther::_count;
-
-FaultName TagOverflow::_name = "tag_overflow";
-TrapType TagOverflow::_trapType = 0x023;
-FaultPriority TagOverflow::_priority = 14;
-FaultStat TagOverflow::_count;
-
-FaultName DivisionByZero::_name = "div_by_zero";
-TrapType DivisionByZero::_trapType = 0x028;
-FaultPriority DivisionByZero::_priority = 15;
-FaultStat DivisionByZero::_count;
-
-FaultName DataAccessException::_name = "data_access";
-TrapType DataAccessException::_trapType = 0x030;
-FaultPriority DataAccessException::_priority = 12;
-FaultStat DataAccessException::_count;
-
-FaultName DataAccessMMUMiss::_name = "data_mmu";
-TrapType DataAccessMMUMiss::_trapType = 0x031;
-FaultPriority DataAccessMMUMiss::_priority = 12;
-FaultStat DataAccessMMUMiss::_count;
-
-FaultName DataAccessError::_name = "data_error";
-TrapType DataAccessError::_trapType = 0x032;
-FaultPriority DataAccessError::_priority = 12;
-FaultStat DataAccessError::_count;
-
-FaultName DataAccessProtection::_name = "data_protection";
-TrapType DataAccessProtection::_trapType = 0x033;
-FaultPriority DataAccessProtection::_priority = 12;
-FaultStat DataAccessProtection::_count;
-
-FaultName LDDFMemAddressNotAligned::_name = "unalign_lddf";
-TrapType LDDFMemAddressNotAligned::_trapType = 0x035;
-FaultPriority LDDFMemAddressNotAligned::_priority = 10;
-FaultStat LDDFMemAddressNotAligned::_count;
-
-FaultName STDFMemAddressNotAligned::_name = "unalign_stdf";
-TrapType STDFMemAddressNotAligned::_trapType = 0x036;
-FaultPriority STDFMemAddressNotAligned::_priority = 10;
-FaultStat STDFMemAddressNotAligned::_count;
-
-FaultName PrivilegedAction::_name = "priv_action";
-TrapType PrivilegedAction::_trapType = 0x037;
-FaultPriority PrivilegedAction::_priority = 11;
-FaultStat PrivilegedAction::_count;
-
-FaultName LDQFMemAddressNotAligned::_name = "unalign_ldqf";
-TrapType LDQFMemAddressNotAligned::_trapType = 0x038;
-FaultPriority LDQFMemAddressNotAligned::_priority = 10;
-FaultStat LDQFMemAddressNotAligned::_count;
-
-FaultName STQFMemAddressNotAligned::_name = "unalign_stqf";
-TrapType STQFMemAddressNotAligned::_trapType = 0x039;
-FaultPriority STQFMemAddressNotAligned::_priority = 10;
-FaultStat STQFMemAddressNotAligned::_count;
-
-FaultName AsyncDataError::_name = "async_data";
-TrapType AsyncDataError::_trapType = 0x040;
-FaultPriority AsyncDataError::_priority = 2;
-FaultStat AsyncDataError::_count;
-
-FaultName CleanWindow::_name = "clean_win";
-TrapType CleanWindow::_trapType = 0x024;
-FaultPriority CleanWindow::_priority = 10;
-FaultStat CleanWindow::_count;
-
-//The enumerated faults
-
-FaultName InterruptLevelN::_name = "interrupt_n";
-TrapType InterruptLevelN::_baseTrapType = 0x041;
-FaultStat InterruptLevelN::_count;
-
-FaultName SpillNNormal::_name = "spill_n_normal";
-TrapType SpillNNormal::_baseTrapType = 0x080;
-FaultPriority SpillNNormal::_priority = 9;
-FaultStat SpillNNormal::_count;
-
-FaultName SpillNOther::_name = "spill_n_other";
-TrapType SpillNOther::_baseTrapType = 0x0A0;
-FaultPriority SpillNOther::_priority = 9;
-FaultStat SpillNOther::_count;
-
-FaultName FillNNormal::_name = "fill_n_normal";
-TrapType FillNNormal::_baseTrapType = 0x0C0;
-FaultPriority FillNNormal::_priority = 9;
-FaultStat FillNNormal::_count;
-
-FaultName FillNOther::_name = "fill_n_other";
-TrapType FillNOther::_baseTrapType = 0x0E0;
-FaultPriority FillNOther::_priority = 9;
-FaultStat FillNOther::_count;
-
-FaultName TrapInstruction::_name = "trap_inst_n";
-TrapType TrapInstruction::_baseTrapType = 0x100;
-FaultPriority TrapInstruction::_priority = 16;
-FaultStat TrapInstruction::_count;
-
-#if FULL_SYSTEM
-
-void SparcFault::invoke(ExecContext * xc)
-{
- FaultBase::invoke(xc);
- countStat()++;
-
- //Use the SPARC trap state machine
- /*// exception restart address
- if (setRestartAddress() || !xc->inPalMode())
- xc->setMiscReg(AlphaISA::IPR_EXC_ADDR, xc->regs.pc);
-
- if (skipFaultingInstruction()) {
- // traps... skip faulting instruction.
- xc->setMiscReg(AlphaISA::IPR_EXC_ADDR,
- xc->readMiscReg(AlphaISA::IPR_EXC_ADDR) + 4);
- }
-
- if (!xc->inPalMode())
- AlphaISA::swap_palshadow(&(xc->regs), true);
-
- xc->regs.pc = xc->readMiscReg(AlphaISA::IPR_PAL_BASE) + vect();
- xc->regs.npc = xc->regs.pc + sizeof(MachInst);*/
-}
-
-#endif
-
-#if !FULL_SYSTEM
-
-void TrapInstruction::invoke(ExecContext * xc)
-{
- xc->syscall(syscall_num);
-}
-
-#endif
-
-} // namespace SparcISA
-
diff --git a/arch/sparc/faults.hh b/arch/sparc/faults.hh
deleted file mode 100644
index e8fb8dfc5..000000000
--- a/arch/sparc/faults.hh
+++ /dev/null
@@ -1,591 +0,0 @@
-/*
- * Copyright (c) 2003-2005 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef __ALPHA_FAULTS_HH__
-#define __ALPHA_FAULTS_HH__
-
-#include "sim/faults.hh"
-
-// The design of the "name" and "vect" functions is in sim/faults.hh
-
-namespace SparcISA
-{
-
-typedef const uint32_t TrapType;
-typedef const uint32_t FaultPriority;
-
-class SparcFault : public FaultBase
-{
- public:
-#if FULL_SYSTEM
- void invoke(ExecContext * xc);
-#endif
- virtual TrapType trapType() = 0;
- virtual FaultPriority priority() = 0;
- virtual FaultStat & countStat() = 0;
-};
-
-class InternalProcessorError : public SparcFault
-{
- private:
- static FaultName _name;
- static TrapType _trapType;
- static FaultPriority _priority;
- static FaultStat _count;
- public:
- FaultName name() {return _name;}
- TrapType trapType() {return _trapType;}
- FaultPriority priority() {return _priority;}
- FaultStat & countStat() {return _count;}
- bool isMachineCheckFault() {return true;}
-};
-
-class MemAddressNotAligned : public SparcFault
-{
- private:
- static FaultName _name;
- static TrapType _trapType;
- static FaultPriority _priority;
- static FaultStat _count;
- public:
- FaultName name() {return _name;}
- TrapType trapType() {return _trapType;}
- FaultPriority priority() {return _priority;}
- FaultStat & countStat() {return _count;}
- bool isAlignmentFault() {return true;}
-};
-
-static inline Fault genMachineCheckFault()
-{
- return new InternalProcessorError;
-}
-
-static inline Fault genAlignmentFault()
-{
- return new MemAddressNotAligned;
-}
-
-class PowerOnReset : public SparcFault
-{
- private:
- static FaultName _name;
- static TrapType _trapType;
- static FaultPriority _priority;
- static FaultStat _count;
- public:
- FaultName name() {return _name;}
- TrapType trapType() {return _trapType;}
- FaultPriority priority() {return _priority;}
- FaultStat & countStat() {return _count;}
-};
-
-class WatchDogReset : public SparcFault
-{
- private:
- static FaultName _name;
- static TrapType _trapType;
- static FaultPriority _priority;
- static FaultStat _count;
- public:
- FaultName name() {return _name;}
- TrapType trapType() {return _trapType;}
- FaultPriority priority() {return _priority;}
- FaultStat & countStat() {return _count;}
-};
-
-class ExternallyInitiatedReset : public SparcFault
-{
- private:
- static FaultName _name;
- static TrapType _trapType;
- static FaultPriority _priority;
- static FaultStat _count;
- public:
- FaultName name() {return _name;}
- TrapType trapType() {return _trapType;}
- FaultPriority priority() {return _priority;}
- FaultStat & countStat() {return _count;}
-};
-
-class SoftwareInitiatedReset : public SparcFault
-{
- private:
- static FaultName _name;
- static TrapType _trapType;
- static FaultPriority _priority;
- static FaultStat _count;
- public:
- FaultName name() {return _name;}
- TrapType trapType() {return _trapType;}
- FaultPriority priority() {return _priority;}
- FaultStat & countStat() {return _count;}
-};
-
-class REDStateException : public SparcFault
-{
- private:
- static FaultName _name;
- static TrapType _trapType;
- static FaultPriority _priority;
- static FaultStat _count;
- public:
- FaultName name() {return _name;}
- TrapType trapType() {return _trapType;}
- FaultPriority priority() {return _priority;}
- FaultStat & countStat() {return _count;}
-};
-
-class InstructionAccessException : public SparcFault
-{
- private:
- static FaultName _name;
- static TrapType _trapType;
- static FaultPriority _priority;
- static FaultStat _count;
- public:
- FaultName name() {return _name;}
- TrapType trapType() {return _trapType;}
- FaultPriority priority() {return _priority;}
- FaultStat & countStat() {return _count;}
-};
-
-class InstructionAccessMMUMiss : public SparcFault
-{
- private:
- static FaultName _name;
- static TrapType _trapType;
- static FaultPriority _priority;
- static FaultStat _count;
- public:
- FaultName name() {return _name;}
- TrapType trapType() {return _trapType;}
- FaultPriority priority() {return _priority;}
- FaultStat & countStat() {return _count;}
-};
-
-class InstructionAccessError : public SparcFault
-{
- private:
- static FaultName _name;
- static TrapType _trapType;
- static FaultPriority _priority;
- static FaultStat _count;
- public:
- FaultName name() {return _name;}
- TrapType trapType() {return _trapType;}
- FaultPriority priority() {return _priority;}
- FaultStat & countStat() {return _count;}
-};
-
-class IllegalInstruction : public SparcFault
-{
- private:
- static FaultName _name;
- static TrapType _trapType;
- static FaultPriority _priority;
- static FaultStat _count;
- public:
- FaultName name() {return _name;}
- TrapType trapType() {return _trapType;}
- FaultPriority priority() {return _priority;}
- FaultStat & countStat() {return _count;}
-};
-
-class PrivilegedOpcode : public SparcFault
-{
- private:
- static FaultName _name;
- static TrapType _trapType;
- static FaultPriority _priority;
- static FaultStat _count;
- public:
- FaultName name() {return _name;}
- TrapType trapType() {return _trapType;}
- FaultPriority priority() {return _priority;}
- FaultStat & countStat() {return _count;}
-};
-
-class UnimplementedLDD : public SparcFault
-{
- private:
- static FaultName _name;
- static TrapType _trapType;
- static FaultPriority _priority;
- static FaultStat _count;
- public:
- FaultName name() {return _name;}
- TrapType trapType() {return _trapType;}
- FaultPriority priority() {return _priority;}
- FaultStat & countStat() {return _count;}
-};
-
-class UnimplementedSTD : public SparcFault
-{
- private:
- static FaultName _name;
- static TrapType _trapType;
- static FaultPriority _priority;
- static FaultStat _count;
- public:
- FaultName name() {return _name;}
- TrapType trapType() {return _trapType;}
- FaultPriority priority() {return _priority;}
- FaultStat & countStat() {return _count;}
-};
-
-class FpDisabled : public SparcFault
-{
- private:
- static FaultName _name;
- static TrapType _trapType;
- static FaultPriority _priority;
- static FaultStat _count;
- public:
- FaultName name() {return _name;}
- TrapType trapType() {return _trapType;}
- FaultPriority priority() {return _priority;}
- FaultStat & countStat() {return _count;}
-};
-
-class FpExceptionIEEE754 : public SparcFault
-{
- private:
- static FaultName _name;
- static TrapType _trapType;
- static FaultPriority _priority;
- static FaultStat _count;
- public:
- FaultName name() {return _name;}
- TrapType trapType() {return _trapType;}
- FaultPriority priority() {return _priority;}
- FaultStat & countStat() {return _count;}
-};
-
-class FpExceptionOther : public SparcFault
-{
- private:
- static FaultName _name;
- static TrapType _trapType;
- static FaultPriority _priority;
- static FaultStat _count;
- public:
- FaultName name() {return _name;}
- TrapType trapType() {return _trapType;}
- FaultPriority priority() {return _priority;}
- FaultStat & countStat() {return _count;}
-};
-
-class TagOverflow : public SparcFault
-{
- private:
- static FaultName _name;
- static TrapType _trapType;
- static FaultPriority _priority;
- static FaultStat _count;
- public:
- FaultName name() {return _name;}
- TrapType trapType() {return _trapType;}
- FaultPriority priority() {return _priority;}
- FaultStat & countStat() {return _count;}
-};
-
-class DivisionByZero : public SparcFault
-{
- private:
- static FaultName _name;
- static TrapType _trapType;
- static FaultPriority _priority;
- static FaultStat _count;
- public:
- FaultName name() {return _name;}
- TrapType trapType() {return _trapType;}
- FaultPriority priority() {return _priority;}
- FaultStat & countStat() {return _count;}
-};
-
-class DataAccessException : public SparcFault
-{
- private:
- static FaultName _name;
- static TrapType _trapType;
- static FaultPriority _priority;
- static FaultStat _count;
- public:
- FaultName name() {return _name;}
- TrapType trapType() {return _trapType;}
- FaultPriority priority() {return _priority;}
- FaultStat & countStat() {return _count;}
-};
-
-class DataAccessMMUMiss : public SparcFault
-{
- private:
- static FaultName _name;
- static TrapType _trapType;
- static FaultPriority _priority;
- static FaultStat _count;
- public:
- FaultName name() {return _name;}
- TrapType trapType() {return _trapType;}
- FaultPriority priority() {return _priority;}
- FaultStat & countStat() {return _count;}
-};
-
-class DataAccessError : public SparcFault
-{
- private:
- static FaultName _name;
- static TrapType _trapType;
- static FaultPriority _priority;
- static FaultStat _count;
- public:
- FaultName name() {return _name;}
- TrapType trapType() {return _trapType;}
- FaultPriority priority() {return _priority;}
- FaultStat & countStat() {return _count;}
-};
-
-class DataAccessProtection : public SparcFault
-{
- private:
- static FaultName _name;
- static TrapType _trapType;
- static FaultPriority _priority;
- static FaultStat _count;
- public:
- FaultName name() {return _name;}
- TrapType trapType() {return _trapType;}
- FaultPriority priority() {return _priority;}
- FaultStat & countStat() {return _count;}
-};
-
-class LDDFMemAddressNotAligned : public SparcFault
-{
- private:
- static FaultName _name;
- static TrapType _trapType;
- static FaultPriority _priority;
- static FaultStat _count;
- public:
- FaultName name() {return _name;}
- TrapType trapType() {return _trapType;}
- FaultPriority priority() {return _priority;}
- FaultStat & countStat() {return _count;}
-};
-
-class STDFMemAddressNotAligned : public SparcFault
-{
- private:
- static FaultName _name;
- static TrapType _trapType;
- static FaultPriority _priority;
- static FaultStat _count;
- public:
- FaultName name() {return _name;}
- TrapType trapType() {return _trapType;}
- FaultPriority priority() {return _priority;}
- FaultStat & countStat() {return _count;}
-};
-
-class PrivilegedAction : public SparcFault
-{
- private:
- static FaultName _name;
- static TrapType _trapType;
- static FaultPriority _priority;
- static FaultStat _count;
- public:
- FaultName name() {return _name;}
- TrapType trapType() {return _trapType;}
- FaultPriority priority() {return _priority;}
- FaultStat & countStat() {return _count;}
-};
-
-class LDQFMemAddressNotAligned : public SparcFault
-{
- private:
- static FaultName _name;
- static TrapType _trapType;
- static FaultPriority _priority;
- static FaultStat _count;
- public:
- FaultName name() {return _name;}
- TrapType trapType() {return _trapType;}
- FaultPriority priority() {return _priority;}
- FaultStat & countStat() {return _count;}
-};
-
-class STQFMemAddressNotAligned : public SparcFault
-{
- private:
- static FaultName _name;
- static TrapType _trapType;
- static FaultPriority _priority;
- static FaultStat _count;
- public:
- FaultName name() {return _name;}
- TrapType trapType() {return _trapType;}
- FaultPriority priority() {return _priority;}
- FaultStat & countStat() {return _count;}
-};
-
-class AsyncDataError : public SparcFault
-{
- private:
- static FaultName _name;
- static TrapType _trapType;
- static FaultPriority _priority;
- static FaultStat _count;
- public:
- FaultName name() {return _name;}
- TrapType trapType() {return _trapType;}
- FaultPriority priority() {return _priority;}
- FaultStat & countStat() {return _count;}
-};
-
-class CleanWindow : public SparcFault
-{
- private:
- static FaultName _name;
- static TrapType _trapType;
- static FaultPriority _priority;
- static FaultStat _count;
- public:
- FaultName name() {return _name;}
- TrapType trapType() {return _trapType;}
- FaultPriority priority() {return _priority;}
- FaultStat & countStat() {return _count;}
-};
-
-class EnumeratedFault : public SparcFault
-{
- protected:
- uint32_t _n;
- virtual TrapType baseTrapType() = 0;
- public:
- EnumeratedFault(uint32_t n) : SparcFault() {_n = n;}
- TrapType trapType() {return baseTrapType() + _n;}
-};
-
-class InterruptLevelN : public EnumeratedFault
-{
- private:
- static FaultName _name;
- static TrapType _baseTrapType;
- static FaultStat _count;
- TrapType baseTrapType() {return _baseTrapType;}
- public:
- InterruptLevelN(uint32_t n) : EnumeratedFault(n) {;}
- FaultName name() {return _name;}
- FaultPriority priority() {return 32 - _n;}
- FaultStat & countStat() {return _count;}
-};
-
-class SpillNNormal : public EnumeratedFault
-{
- private:
- static FaultName _name;
- static TrapType _baseTrapType;
- static FaultPriority _priority;
- static FaultStat _count;
- TrapType baseTrapType() {return _baseTrapType;}
- public:
- SpillNNormal(uint32_t n) : EnumeratedFault(n) {;}
- FaultName name() {return _name;}
- FaultPriority priority() {return _priority;}
- FaultStat & countStat() {return _count;}
-};
-
-class SpillNOther : public EnumeratedFault
-{
- private:
- static FaultName _name;
- static TrapType _baseTrapType;
- static FaultPriority _priority;
- static FaultStat _count;
- TrapType baseTrapType() {return _baseTrapType;}
- public:
- SpillNOther(uint32_t n) : EnumeratedFault(n) {;}
- FaultName name() {return _name;}
- FaultPriority priority() {return _priority;}
- FaultStat & countStat() {return _count;}
-};
-
-class FillNNormal : public EnumeratedFault
-{
- private:
- static FaultName _name;
- static TrapType _baseTrapType;
- static FaultPriority _priority;
- static FaultStat _count;
- TrapType baseTrapType() {return _baseTrapType;}
- public:
- FillNNormal(uint32_t n) : EnumeratedFault(n) {;}
- FaultName name() {return _name;}
- FaultPriority priority() {return _priority;}
- FaultStat & countStat() {return _count;}
-};
-
-class FillNOther : public EnumeratedFault
-{
- private:
- static FaultName _name;
- static TrapType _baseTrapType;
- static FaultPriority _priority;
- static FaultStat _count;
- TrapType baseTrapType() {return _baseTrapType;}
- public:
- FillNOther(uint32_t n) : EnumeratedFault(n) {;}
- FaultName name() {return _name;}
- FaultPriority priority() {return _priority;}
- FaultStat & countStat() {return _count;}
-};
-
-class TrapInstruction : public EnumeratedFault
-{
- private:
- static FaultName _name;
- static TrapType _baseTrapType;
- static FaultPriority _priority;
- static FaultStat _count;
- uint64_t syscall_num;
- TrapType baseTrapType() {return _baseTrapType;}
- public:
- TrapInstruction(uint32_t n, uint64_t syscall) :
- EnumeratedFault(n), syscall_num(syscall) {;}
- FaultName name() {return _name;}
- FaultPriority priority() {return _priority;}
- FaultStat & countStat() {return _count;}
-#if !FULL_SYSTEM
- void invoke(ExecContext * xc);
-#endif
-};
-
-} // SparcISA namespace
-
-#endif // __FAULTS_HH__
diff --git a/arch/sparc/isa/base.isa b/arch/sparc/isa/base.isa
deleted file mode 100644
index 8ea11b40e..000000000
--- a/arch/sparc/isa/base.isa
+++ /dev/null
@@ -1,222 +0,0 @@
-////////////////////////////////////////////////////////////////////
-//
-// Base class for sparc instructions, and some support functions
-//
-
-output header {{
-
- union CondCodes
- {
- struct
- {
- uint8_t c:1;
- uint8_t v:1;
- uint8_t z:1;
- uint8_t n:1;
- };
- uint32_t bits;
- };
-
- enum CondTest
- {
- Always=0x8,
- Never=0x0,
- NotEqual=0x9,
- Equal=0x1,
- Greater=0xA,
- LessOrEqual=0x2,
- GreaterOrEqual=0xB,
- Less=0x3,
- GreaterUnsigned=0xC,
- LessOrEqualUnsigned=0x4,
- CarryClear=0xD,
- CarrySet=0x5,
- Positive=0xE,
- Negative=0x6,
- OverflowClear=0xF,
- OverflowSet=0x7
- };
-
- extern char * CondTestAbbrev[];
-
- /**
- * Base class for all SPARC static instructions.
- */
- class SparcStaticInst : public StaticInst
- {
- protected:
- // Constructor.
- SparcStaticInst(const char *mnem,
- MachInst _machInst, OpClass __opClass)
- : StaticInst(mnem, _machInst, __opClass)
- {
- }
-
- std::string generateDisassembly(Addr pc,
- const SymbolTable *symtab) const;
-
- void printReg(std::ostream &os, int reg) const;
- };
-
- bool passesCondition(uint32_t codes, uint32_t condition);
-
- inline int64_t sign_ext(uint64_t data, int origWidth)
- {
- int shiftAmount = 64 - origWidth;
- return (((int64_t)data) << shiftAmount) >> shiftAmount;
- }
-}};
-
-output decoder {{
-
- char * CondTestAbbrev[] =
- {
- "nev", //Never
- "e", //Equal
- "le", //Less or Equal
- "l", //Less
- "leu", //Less or Equal Unsigned
- "c", //Carry set
- "n", //Negative
- "o", //Overflow set
- "a", //Always
- "ne", //Not Equal
- "g", //Greater
- "ge", //Greater or Equal
- "gu", //Greater Unsigned
- "cc", //Carry clear
- "p", //Positive
- "oc" //Overflow Clear
- };
-}};
-
-def template ROrImmDecode {{
- {
- return (I ? (SparcStaticInst *)(new %(class_name)sImm(machInst))
- : (SparcStaticInst *)(new %(class_name)s(machInst)));
- }
-}};
-
-let {{
- def splitOutImm(code):
- matcher = re.compile(r'Rs(?P<rNum>\d)_or_imm(?P<iNum>\d+)(?P<typeQual>\.\w+)?')
- rOrImmMatch = matcher.search(code)
- if (rOrImmMatch == None):
- return (False, code, '', '', '')
- rString = rOrImmMatch.group("rNum")
- if (rOrImmMatch.group("typeQual") != None):
- rString += rOrImmMatch.group("typeQual")
- iString = rOrImmMatch.group("iNum")
- orig_code = code
- code = matcher.sub('Rs' + rString, orig_code)
- imm_code = matcher.sub('imm', orig_code)
- return (True, code, imm_code, rString, iString)
-}};
-
-output decoder {{
-
- inline void printMnemonic(std::ostream &os, const char * mnemonic)
- {
- ccprintf(os, "\t%s ", mnemonic);
- }
-
- void
- SparcStaticInst::printReg(std::ostream &os, int reg) const
- {
- const int MaxGlobal = 8;
- const int MaxOutput = 16;
- const int MaxLocal = 24;
- const int MaxInput = 32;
- if (reg == FramePointerReg)
- ccprintf(os, "%%fp");
- else if (reg == StackPointerReg)
- ccprintf(os, "%%sp");
- else if(reg < MaxGlobal)
- ccprintf(os, "%%g%d", reg);
- else if(reg < MaxOutput)
- ccprintf(os, "%%o%d", reg - MaxGlobal);
- else if(reg < MaxLocal)
- ccprintf(os, "%%l%d", reg - MaxOutput);
- else if(reg < MaxInput)
- ccprintf(os, "%%i%d", reg - MaxLocal);
- else {
- ccprintf(os, "%%f%d", reg - FP_Base_DepTag);
- }
- }
-
- std::string SparcStaticInst::generateDisassembly(Addr pc,
- const SymbolTable *symtab) const
- {
- std::stringstream ss;
-
- printMnemonic(ss, mnemonic);
-
- // just print the first two source regs... if there's
- // a third one, it's a read-modify-write dest (Rc),
- // e.g. for CMOVxx
- if(_numSrcRegs > 0)
- {
- printReg(ss, _srcRegIdx[0]);
- }
- if(_numSrcRegs > 1)
- {
- ss << ",";
- printReg(ss, _srcRegIdx[1]);
- }
-
- // just print the first dest... if there's a second one,
- // it's generally implicit
- if(_numDestRegs > 0)
- {
- if(_numSrcRegs > 0)
- ss << ",";
- printReg(ss, _destRegIdx[0]);
- }
-
- return ss.str();
- }
-
- bool passesCondition(uint32_t codes, uint32_t condition)
- {
- CondCodes condCodes;
- condCodes.bits = codes;
- switch(condition)
- {
- case Always:
- return true;
- case Never:
- return false;
- case NotEqual:
- return !condCodes.z;
- case Equal:
- return condCodes.z;
- case Greater:
- return !(condCodes.z | (condCodes.n ^ condCodes.v));
- case LessOrEqual:
- return condCodes.z | (condCodes.n ^ condCodes.v);
- case GreaterOrEqual:
- return !(condCodes.n ^ condCodes.v);
- case Less:
- return (condCodes.n ^ condCodes.v);
- case GreaterUnsigned:
- return !(condCodes.c | condCodes.z);
- case LessOrEqualUnsigned:
- return (condCodes.c | condCodes.z);
- case CarryClear:
- return !condCodes.c;
- case CarrySet:
- return condCodes.c;
- case Positive:
- return !condCodes.n;
- case Negative:
- return condCodes.n;
- case OverflowClear:
- return !condCodes.v;
- case OverflowSet:
- return condCodes.v;
- }
- panic("Tried testing condition nonexistant "
- "condition code %d", condition);
- }
-}};
-
diff --git a/arch/sparc/isa/bitfields.isa b/arch/sparc/isa/bitfields.isa
deleted file mode 100644
index 2e4478099..000000000
--- a/arch/sparc/isa/bitfields.isa
+++ /dev/null
@@ -1,48 +0,0 @@
-////////////////////////////////////////////////////////////////////
-//
-// Bitfield definitions.
-//
-
-// Bitfields are shared liberally between instruction formats, so they are
-// simply defined alphabetically
-
-def bitfield A <29>;
-def bitfield BPCC <21:20>; // for BPcc & FBPcc
-def bitfield FCMPCC <26:56>; // for FCMP & FCMPEa
-def bitfield FMOVCC <13:11>; // for FMOVcc
-def bitfield CC <12:11>; // for MOVcc & Tcc
-def bitfield MOVCC3 <18>; // also for MOVcc
-def bitfield CMASK <6:4>;
-def bitfield COND2 <28:25>;
-def bitfield COND4 <17:14>;
-def bitfield D16HI <21:20>;
-def bitfield D16LO <13:0>;
-def bitfield DISP19 <18:0>;
-def bitfield DISP22 <21:0>;
-def bitfield DISP30 <29:0>;
-def bitfield FCN <29:26>;
-def bitfield I <13>;
-def bitfield IMM_ASI <12:5>;
-def bitfield IMM22 <21:0>;
-def bitfield MMASK <3:0>;
-def bitfield OP <31:30>;
-def bitfield OP2 <24:22>;
-def bitfield OP3 <24:19>;
-def bitfield OPF <13:5>;
-def bitfield OPF_CC <13:11>;
-def bitfield OPF_LOW5 <9:5>;
-def bitfield OPF_LOW6 <10:5>;
-def bitfield P <19>;
-def bitfield RCOND2 <27:25>;
-def bitfield RCOND3 <12:10>;
-def bitfield RCOND4 <12:10>;
-def bitfield RD <29:25>;
-def bitfield RS1 <18:14>;
-def bitfield RS2 <4:0>;
-def bitfield SHCNT32 <4:0>;
-def bitfield SHCNT64 <5:0>;
-def bitfield SIMM10 <9:0>;
-def bitfield SIMM11 <10:0>;
-def bitfield SIMM13 <12:0>;
-def bitfield SW_TRAP <7:0>;
-def bitfield X <12>;
diff --git a/arch/sparc/isa/decoder.isa b/arch/sparc/isa/decoder.isa
deleted file mode 100644
index 52ca5d7cd..000000000
--- a/arch/sparc/isa/decoder.isa
+++ /dev/null
@@ -1,691 +0,0 @@
-////////////////////////////////////////////////////////////////////
-//
-// The actual decoder specification
-//
-
-decode OP default Unknown::unknown()
-{
- 0x0: decode OP2
- {
- //Throw an illegal instruction acception
- 0x0: Trap::illtrap({{fault = new IllegalInstruction;}});
- 0x1: decode BPCC
- {
- format Branch19
- {
- 0x0: bpcci({{
- if(passesCondition(CcrIcc, COND2))
- NNPC = xc->readPC() + disp;
- else
- handle_annul
- }});
- 0x2: bpccx({{
- if(passesCondition(CcrXcc, COND2))
- NNPC = xc->readPC() + disp;
- else
- handle_annul
- }});
- }
- }
- 0x2: Branch22::bicc({{
- if(passesCondition(CcrIcc, COND2))
- NNPC = xc->readPC() + disp;
- else
- handle_annul
- }});
- 0x3: decode RCOND2
- {
- format BranchSplit
- {
- 0x1: bpreq({{
- if(Rs1.sdw == 0)
- NNPC = xc->readPC() + disp;
- else
- handle_annul
- }});
- 0x2: bprle({{
- if(Rs1.sdw <= 0)
- NNPC = xc->readPC() + disp;
- else
- handle_annul
- }});
- 0x3: bprl({{
- if(Rs1.sdw < 0)
- NNPC = xc->readPC() + disp;
- else
- handle_annul
- }});
- 0x5: bprne({{
- if(Rs1.sdw != 0)
- NNPC = xc->readPC() + disp;
- else
- handle_annul
- }});
- 0x6: bprg({{
- if(Rs1.sdw > 0)
- NNPC = xc->readPC() + disp;
- else
- handle_annul
- }});
- 0x7: bprge({{
- if(Rs1.sdw >= 0)
- NNPC = xc->readPC() + disp;
- else
- handle_annul
- }});
- }
- }
- //SETHI (or NOP if rd == 0 and imm == 0)
- 0x4: SetHi::sethi({{Rd = imm;}});
- 0x5: Trap::fbpfcc({{fault = new FpDisabled;}});
- 0x6: Trap::fbfcc({{fault = new FpDisabled;}});
- }
- 0x1: Branch30::call({{
- R15 = xc->readPC();
- NNPC = R15 + disp;
- }});
- 0x2: decode OP3 {
- format IntOp {
- 0x00: add({{Rd = Rs1.sdw + Rs2_or_imm13;}});
- 0x01: and({{Rd = Rs1.udw & Rs2_or_imm13;}});
- 0x02: or({{Rd = Rs1.udw | Rs2_or_imm13;}});
- 0x03: xor({{Rd = Rs1.udw ^ Rs2_or_imm13;}});
- 0x04: sub({{Rd = Rs1.sdw - Rs2_or_imm13;}});
- 0x05: andn({{Rd = Rs1.udw & ~Rs2_or_imm13;}});
- 0x06: orn({{Rd = Rs1.udw | ~Rs2_or_imm13;}});
- 0x07: xnor({{Rd = ~(Rs1.udw ^ Rs2_or_imm13);}});
- 0x08: addc({{Rd = Rs1.sdw + Rs2_or_imm13 + CcrIccC;}});
- 0x09: mulx({{Rd = Rs1 * Rs2_or_imm13;}});
- 0x0A: umul({{
- Rd = Rs1.udw<31:0> * Rs2_or_imm13<31:0>;
- YValue = Rd<63:32>;
- }});
- 0x0B: smul({{
- Rd.sdw = Rs1.sdw<31:0> * Rs2_or_imm13<31:0>;
- YValue = Rd.sdw;
- }});
- 0x0C: subc({{Rd.sdw = Rs1.sdw + (~Rs2_or_imm13) + 1 + CcrIccC;}});
- 0x0D: udivx({{
- if(Rs2_or_imm13 == 0) fault = new DivisionByZero;
- else Rd.udw = Rs1.udw / Rs2_or_imm13;
- }});
- 0x0E: udiv({{
- if(Rs2_or_imm13 == 0) fault = new DivisionByZero;
- else
- {
- Rd.udw = ((YValue << 32) | Rs1.udw<31:0>) / Rs2_or_imm13;
- if(Rd.udw >> 32 != 0)
- Rd.udw = 0xFFFFFFFF;
- }
- }});
- 0x0F: sdiv({{
- if(Rs2_or_imm13.sdw == 0)
- fault = new DivisionByZero;
- else
- {
- Rd.udw = ((int64_t)((YValue << 32) | Rs1.sdw<31:0>)) / Rs2_or_imm13.sdw;
- if(Rd.udw<63:31> != 0)
- Rd.udw = 0x7FFFFFFF;
- else if(Rd.udw<63:> && Rd.udw<62:31> != 0xFFFFFFFF)
- Rd.udw = 0xFFFFFFFF80000000ULL;
- }
- }});
- }
- format IntOpCc {
- 0x10: addcc({{
- int64_t resTemp, val2 = Rs2_or_imm13;
- Rd = resTemp = Rs1 + val2;}},
- {{(Rs1<31:0> + val2<31:0>)<32:>}},
- {{Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>}},
- {{(Rs1<63:1> + val2<63:1> + (Rs1 & val2)<0:>)<63:>}},
- {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}}
- );
- 0x11: IntOpCcRes::andcc({{Rd = Rs1 & Rs2_or_imm13;}});
- 0x12: IntOpCcRes::orcc({{Rd = Rs1 | Rs2_or_imm13;}});
- 0x13: IntOpCcRes::xorcc({{Rd = Rs1 ^ Rs2_or_imm13;}});
- 0x14: subcc({{
- int64_t val2 = Rs2_or_imm13;
- Rd = Rs1 - val2;}},
- {{(~(Rs1<31:0> + (~val2)<31:0> + 1))<32:>}},
- {{(Rs1<31:> != val2<31:>) && (Rs1<31:> != Rd<31:>)}},
- {{(~(Rs1<63:1> + (~val2)<63:1> +
- (Rs1 | ~val2)<0:>))<63:>}},
- {{Rs1<63:> != val2<63:> && Rs1<63:> != Rd<63:>}}
- );
- 0x15: IntOpCcRes::andncc({{Rd = Rs1 & ~Rs2_or_imm13;}});
- 0x16: IntOpCcRes::orncc({{Rd = Rs1 | ~Rs2_or_imm13;}});
- 0x17: IntOpCcRes::xnorcc({{Rd = ~(Rs1 ^ Rs2_or_imm13);}});
- 0x18: addccc({{
- int64_t resTemp, val2 = Rs2_or_imm13;
- int64_t carryin = CcrIccC;
- Rd = resTemp = Rs1 + val2 + carryin;}},
- {{(Rs1<31:0> + val2<31:0> + carryin)<32:>}},
- {{Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>}},
- {{(Rs1<63:1> + val2<63:1> +
- ((Rs1 & val2) | (carryin & (Rs1 | val2)))<0:>)<63:>}},
- {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}}
- );
- 0x1A: umulcc({{
- uint64_t resTemp;
- Rd = resTemp = Rs1.udw<31:0> * Rs2_or_imm13.udw<31:0>;
- YValue = resTemp<63:32>;}},
- {{0}},{{0}},{{0}},{{0}});
- 0x1B: smulcc({{
- int64_t resTemp;
- Rd = resTemp = Rs1.sdw<31:0> * Rs2_or_imm13.sdw<31:0>;
- YValue = resTemp<63:32>;}},
- {{0}},{{0}},{{0}},{{0}});
- 0x1C: subccc({{
- int64_t resTemp, val2 = Rs2_or_imm13;
- int64_t carryin = CcrIccC;
- Rd = resTemp = Rs1 + ~(val2 + carryin) + 1;}},
- {{(~((Rs1<31:0> + (~(val2 + carryin))<31:0> + 1))<32:>)}},
- {{Rs1<31:> != val2<31:> && Rs1<31:> != resTemp<31:>}},
- {{(~((Rs1<63:1> + (~(val2 + carryin))<63:1>) + (Rs1<0:> + (~(val2+carryin))<0:> + 1)<63:1>))<63:>}},
- {{Rs1<63:> != val2<63:> && Rs1<63:> != resTemp<63:>}}
- );
- 0x1D: udivxcc({{
- if(Rs2_or_imm13.udw == 0) fault = new DivisionByZero;
- else Rd = Rs1.udw / Rs2_or_imm13.udw;}}
- ,{{0}},{{0}},{{0}},{{0}});
- 0x1E: udivcc({{
- uint32_t resTemp, val2 = Rs2_or_imm13.udw;
- int32_t overflow;
- if(val2 == 0) fault = new DivisionByZero;
- else
- {
- resTemp = (uint64_t)((YValue << 32) | Rs1.udw<31:0>) / val2;
- overflow = (resTemp<63:32> != 0);
- if(overflow) Rd = resTemp = 0xFFFFFFFF;
- else Rd = resTemp;
- } }},
- {{0}},
- {{overflow}},
- {{0}},
- {{0}}
- );
- 0x1F: sdivcc({{
- int32_t resTemp, val2 = Rs2_or_imm13.sdw;
- int32_t overflow, underflow;
- if(val2 == 0) fault = new DivisionByZero;
- else
- {
- Rd = resTemp = (int64_t)((YValue << 32) | Rs1.sdw<31:0>) / val2;
- overflow = (resTemp<63:31> != 0);
- underflow = (resTemp<63:> && resTemp<62:31> != 0xFFFFFFFF);
- if(overflow) Rd = resTemp = 0x7FFFFFFF;
- else if(underflow) Rd = resTemp = 0xFFFFFFFF80000000ULL;
- else Rd = resTemp;
- } }},
- {{0}},
- {{overflow || underflow}},
- {{0}},
- {{0}}
- );
- 0x20: taddcc({{
- int64_t resTemp, val2 = Rs2_or_imm13;
- Rd = resTemp = Rs1 + val2;
- int32_t overflow = Rs1<1:0> || val2<1:0> || (Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>);}},
- {{((Rs1 & 0xFFFFFFFF + val2 & 0xFFFFFFFF) >> 31)}},
- {{overflow}},
- {{((Rs1 >> 1) + (val2 >> 1) + (Rs1 & val2 & 0x1))<63:>}},
- {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}}
- );
- 0x21: tsubcc({{
- int64_t resTemp, val2 = Rs2_or_imm13;
- Rd = resTemp = Rs1 + val2;
- int32_t overflow = Rs1<1:0> || val2<1:0> || (Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>);}},
- {{(Rs1 & 0xFFFFFFFF + val2 & 0xFFFFFFFF) >> 31}},
- {{overflow}},
- {{((Rs1 >> 1) + (val2 >> 1) + (Rs1 & val2 & 0x1))<63:>}},
- {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}}
- );
- 0x22: taddcctv({{
- int64_t resTemp, val2 = Rs2_or_imm13;
- Rd = resTemp = Rs1 + val2;
- int32_t overflow = Rs1<1:0> || val2<1:0> || (Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>);
- if(overflow) fault = new TagOverflow;}},
- {{((Rs1 & 0xFFFFFFFF + val2 & 0xFFFFFFFF) >> 31)}},
- {{overflow}},
- {{((Rs1 >> 1) + (val2 >> 1) + (Rs1 & val2 & 0x1))<63:>}},
- {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}}
- );
- 0x23: tsubcctv({{
- int64_t resTemp, val2 = Rs2_or_imm13;
- Rd = resTemp = Rs1 + val2;
- int32_t overflow = Rs1<1:0> || val2<1:0> || (Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>);
- if(overflow) fault = new TagOverflow;}},
- {{((Rs1 & 0xFFFFFFFF + val2 & 0xFFFFFFFF) >> 31)}},
- {{overflow}},
- {{((Rs1 >> 1) + (val2 >> 1) + (Rs1 & val2 & 0x1))<63:>}},
- {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}}
- );
- 0x24: mulscc({{
- int64_t resTemp, multiplicand = Rs2_or_imm13;
- int32_t multiplier = Rs1<31:0>;
- int32_t savedLSB = Rs1<0:>;
- multiplier = multiplier<31:1> |
- ((CcrIccN
- ^ CcrIccV) << 32);
- if(!YValue<0:>)
- multiplicand = 0;
- Rd = resTemp = multiplicand + multiplier;
- YValue = YValue<31:1> | (savedLSB << 31);}},
- {{((multiplicand & 0xFFFFFFFF + multiplier & 0xFFFFFFFF) >> 31)}},
- {{multiplicand<31:> == multiplier<31:> && multiplier<31:> != resTemp<31:>}},
- {{((multiplicand >> 1) + (multiplier >> 1) + (multiplicand & multiplier & 0x1))<63:>}},
- {{multiplicand<63:> == multiplier<63:> && multiplier<63:> != resTemp<63:>}}
- );
- }
- format IntOp
- {
- 0x25: decode X {
- 0x0: sll({{Rd = Rs1 << (I ? SHCNT32 : Rs2<4:0>);}});
- 0x1: sllx({{Rd = Rs1 << (I ? SHCNT64 : Rs2<5:0>);}});
- }
- 0x26: decode X {
- 0x0: srl({{Rd = Rs1.uw >> (I ? SHCNT32 : Rs2<4:0>);}});
- 0x1: srlx({{Rd = Rs1.udw >> (I ? SHCNT64 : Rs2<5:0>);}});
- }
- 0x27: decode X {
- 0x0: sra({{Rd = Rs1.sw >> (I ? SHCNT32 : Rs2<4:0>);}});
- 0x1: srax({{Rd = Rs1.sdw >> (I ? SHCNT64 : Rs2<5:0>);}});
- }
- 0x28: decode RS1 {
- 0x0: rdy({{Rd = YValue;}});
- 0x2: rdccr({{Rd = Ccr;}});
- 0x3: rdasi({{Rd = Asi;}});
- 0x4: PrivTick::rdtick({{Rd = Tick;}});
- 0x5: rdpc({{Rd = xc->readPC();}});
- 0x6: rdfprs({{Rd = Fprs;}});
- 0xF: decode I {
- 0x0: Nop::membar({{/*Membar isn't needed yet*/}});
- 0x1: Nop::stbar({{/*Stbar isn't needed yet*/}});
- }
- }
- 0x2A: decode RS1 {
- format Priv
- {
- 0x0: rdprtpc({{
- Rd = xc->readMiscReg(MISCREG_TPC_BASE + Tl);
- }});
- 0x1: rdprtnpc({{
- Rd = xc->readMiscReg(MISCREG_TNPC_BASE + Tl);
- }});
- 0x2: rdprtstate({{
- Rd = xc->readMiscReg(MISCREG_TSTATE_BASE + Tl);
- }});
- 0x3: rdprtt({{
- Rd = xc->readMiscReg(MISCREG_TT_BASE + Tl);
- }});
- 0x4: rdprtick({{Rd = Tick;}});
- 0x5: rdprtba({{Rd = Tba;}});
- 0x6: rdprpstate({{Rd = Pstate;}});
- 0x7: rdprtl({{Rd = Tl;}});
- 0x8: rdprpil({{Rd = Pil;}});
- 0x9: rdprcwp({{Rd = Cwp;}});
- 0xA: rdprcansave({{Rd = Cansave;}});
- 0xB: rdprcanrestore({{Rd = Canrestore;}});
- 0xC: rdprcleanwin({{Rd = Cleanwin;}});
- 0xD: rdprotherwin({{Rd = Otherwin;}});
- 0xE: rdprwstate({{Rd = Wstate;}});
- }
- //The floating point queue isn't implemented right now.
- 0xF: Trap::rdprfq({{fault = new IllegalInstruction;}});
- 0x1F: Priv::rdprver({{Rd = Ver;}});
- }
- 0x2B: BasicOperate::flushw({{
- if(NWindows - 2 - Cansave == 0)
- {
- if(Otherwin)
- fault = new SpillNOther(WstateOther);
- else
- fault = new SpillNNormal(WstateNormal);
- }
- }});
- 0x2C: decode MOVCC3
- {
- 0x0: Trap::movccfcc({{fault = new FpDisabled;}});
- 0x1: decode CC
- {
- 0x0: movcci({{
- if(passesCondition(CcrIcc, COND4))
- Rd = Rs2_or_imm11;
- else
- Rd = Rd;
- }});
- 0x2: movccx({{
- if(passesCondition(CcrXcc, COND4))
- Rd = Rs2_or_imm11;
- else
- Rd = Rd;
- }});
- }
- }
- 0x2D: sdivx({{
- if(Rs2_or_imm13.sdw == 0) fault = new DivisionByZero;
- else Rd.sdw = Rs1.sdw / Rs2_or_imm13.sdw;
- }});
- 0x2E: decode RS1 {
- 0x0: IntOp::popc({{
- int64_t count = 0;
- uint64_t temp = Rs2_or_imm13;
- //Count the 1s in the front 4bits until none are left
- uint8_t oneBits[] = {0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4};
- while(temp)
- {
- count += oneBits[temp & 0xF];
- temp = temp >> 4;
- }
- Rd = count;
- }});
- }
- 0x2F: decode RCOND3
- {
- 0x1: movreq({{Rd = (Rs1.sdw == 0) ? Rs2_or_imm10 : Rd;}});
- 0x2: movrle({{Rd = (Rs1.sdw <= 0) ? Rs2_or_imm10 : Rd;}});
- 0x3: movrl({{Rd = (Rs1.sdw < 0) ? Rs2_or_imm10 : Rd;}});
- 0x5: movrne({{Rd = (Rs1.sdw != 0) ? Rs2_or_imm10 : Rd;}});
- 0x6: movrg({{Rd = (Rs1.sdw > 0) ? Rs2_or_imm10 : Rd;}});
- 0x7: movrge({{Rd = (Rs1.sdw >= 0) ? Rs2_or_imm10 : Rd;}});
- }
- 0x30: decode RD {
- 0x0: wry({{Y = Rs1 ^ Rs2_or_imm13;}});
- 0x2: wrccr({{Ccr = Rs1 ^ Rs2_or_imm13;}});
- 0x3: wrasi({{Asi = Rs1 ^ Rs2_or_imm13;}});
- 0x6: wrfprs({{Asi = Rs1 ^ Rs2_or_imm13;}});
- 0xF: Trap::sir({{fault = new SoftwareInitiatedReset;}});
- }
- 0x31: decode FCN {
- 0x0: BasicOperate::saved({{/*Boogy Boogy*/}});
- 0x1: BasicOperate::restored({{/*Boogy Boogy*/}});
- }
- 0x32: decode RD {
- format Priv
- {
- 0x0: wrprtpc({{
- xc->setMiscReg(MISCREG_TPC_BASE + Tl,
- Rs1 ^ Rs2_or_imm13);
- }});
- 0x1: wrprtnpc({{
- xc->setMiscReg(MISCREG_TNPC_BASE + Tl,
- Rs1 ^ Rs2_or_imm13);
- }});
- 0x2: wrprtstate({{
- xc->setMiscReg(MISCREG_TSTATE_BASE + Tl,
- Rs1 ^ Rs2_or_imm13);
- }});
- 0x3: wrprtt({{
- xc->setMiscReg(MISCREG_TT_BASE + Tl,
- Rs1 ^ Rs2_or_imm13);
- }});
- 0x4: wrprtick({{Tick = Rs1 ^ Rs2_or_imm13;}});
- 0x5: wrprtba({{Tba = Rs1 ^ Rs2_or_imm13;}});
- 0x6: wrprpstate({{Pstate = Rs1 ^ Rs2_or_imm13;}});
- 0x7: wrprtl({{Tl = Rs1 ^ Rs2_or_imm13;}});
- 0x8: wrprpil({{Pil = Rs1 ^ Rs2_or_imm13;}});
- 0x9: wrprcwp({{Cwp = Rs1 ^ Rs2_or_imm13;}});
- 0xA: wrprcansave({{Cansave = Rs1 ^ Rs2_or_imm13;}});
- 0xB: wrprcanrestore({{Canrestore = Rs1 ^ Rs2_or_imm13;}});
- 0xC: wrprcleanwin({{Cleanwin = Rs1 ^ Rs2_or_imm13;}});
- 0xD: wrprotherwin({{Otherwin = Rs1 ^ Rs2_or_imm13;}});
- 0xE: wrprwstate({{Wstate = Rs1 ^ Rs2_or_imm13;}});
- }
- }
- 0x34: Trap::fpop1({{fault = new FpDisabled;}});
- 0x35: Trap::fpop2({{fault = new FpDisabled;}});
- 0x38: Branch::jmpl({{
- Addr target = Rs1 + Rs2_or_imm13;
- if(target & 0x3)
- fault = new MemAddressNotAligned;
- else
- {
- Rd = xc->readPC();
- NNPC = target;
- }
- }});
- 0x39: Branch::return({{
- //If both MemAddressNotAligned and
- //a fill trap happen, it's not clear
- //which one should be returned.
- Addr target = Rs1 + Rs2_or_imm13;
- if(target & 0x3)
- fault = new MemAddressNotAligned;
- else
- NNPC = target;
- if(fault == NoFault)
- {
- //CWP should be set directly so that it always happens
- //Also, this will allow writing to the new window and
- //reading from the old one
- Cwp = (Cwp - 1 + NWindows) % NWindows;
- if(Canrestore == 0)
- {
- if(Otherwin)
- fault = new FillNOther(WstateOther);
- else
- fault = new FillNNormal(WstateNormal);
- }
- else
- {
- Rd = Rs1 + Rs2_or_imm13;
- Cansave = Cansave + 1;
- Canrestore = Canrestore - 1;
- }
- //This is here to make sure the CWP is written
- //no matter what. This ensures that the results
- //are written in the new window as well.
- xc->setMiscRegWithEffect(MISCREG_CWP, Cwp);
- }
- }});
- 0x3A: decode CC
- {
- 0x0: Trap::tcci({{
- if(passesCondition(CcrIcc, COND2))
- {
- int lTrapNum = I ? (Rs1 + SW_TRAP) : (Rs1 + Rs2);
- DPRINTF(Sparc, "The trap number is %d\n", lTrapNum);
-#if FULL_SYSTEM
- fault = new TrapInstruction(lTrapNum);
-#else
- DPRINTF(Sparc, "The syscall number is %d\n", R1);
- xc->syscall(R1);
-#endif
- }
- }});
- 0x2: Trap::tccx({{
- if(passesCondition(CcrXcc, COND2))
- {
- int lTrapNum = I ? (Rs1 + SW_TRAP) : (Rs1 + Rs2);
- DPRINTF(Sparc, "The trap number is %d\n", lTrapNum);
-#if FULL_SYSTEM
- fault = new TrapInstruction(lTrapNum);
-#else
- DPRINTF(Sparc, "The syscall number is %d\n", R1);
- xc->syscall(R1);
-#endif
- }
- }});
- }
- 0x3B: Nop::flush({{/*Instruction memory flush*/}});
- 0x3C: save({{
- //CWP should be set directly so that it always happens
- //Also, this will allow writing to the new window and
- //reading from the old one
- if(Cansave == 0)
- {
- if(Otherwin)
- fault = new SpillNOther(WstateOther);
- else
- fault = new SpillNNormal(WstateNormal);
- Cwp = (Cwp + 2) % NWindows;
- }
- else if(Cleanwin - Canrestore == 0)
- {
- Cwp = (Cwp + 1) % NWindows;
- fault = new CleanWindow;
- }
- else
- {
- Cwp = (Cwp + 1) % NWindows;
- Rd = Rs1 + Rs2_or_imm13;
- Cansave = Cansave - 1;
- Canrestore = Canrestore + 1;
- }
- //This is here to make sure the CWP is written
- //no matter what. This ensures that the results
- //are written in the new window as well.
- xc->setMiscRegWithEffect(MISCREG_CWP, Cwp);
- }});
- 0x3D: restore({{
- //CWP should be set directly so that it always happens
- //Also, this will allow writing to the new window and
- //reading from the old one
- Cwp = (Cwp - 1 + NWindows) % NWindows;
- if(Canrestore == 0)
- {
- if(Otherwin)
- fault = new FillNOther(WstateOther);
- else
- fault = new FillNNormal(WstateNormal);
- }
- else
- {
- Rd = Rs1 + Rs2_or_imm13;
- Cansave = Cansave + 1;
- Canrestore = Canrestore - 1;
- }
- //This is here to make sure the CWP is written
- //no matter what. This ensures that the results
- //are written in the new window as well.
- xc->setMiscRegWithEffect(MISCREG_CWP, Cwp);
- }});
- 0x3E: decode FCN {
- 0x0: Priv::done({{
- if(Tl == 0)
- return new IllegalInstruction;
- Cwp = xc->readMiscReg(MISCREG_TSTATE_CWP_BASE + Tl);
- Asi = xc->readMiscReg(MISCREG_TSTATE_ASI_BASE + Tl);
- Ccr = xc->readMiscReg(MISCREG_TSTATE_CCR_BASE + Tl);
- Pstate = xc->readMiscReg(MISCREG_TSTATE_PSTATE_BASE + Tl);
- NPC = xc->readMiscReg(MISCREG_TNPC_BASE + Tl);
- NNPC = NPC + 4;
- Tl = Tl - 1;
- }});
- 0x1: BasicOperate::retry({{
- if(Tl == 0)
- return new IllegalInstruction;
- Cwp = xc->readMiscReg(MISCREG_TSTATE_CWP_BASE + Tl);
- Asi = xc->readMiscReg(MISCREG_TSTATE_ASI_BASE + Tl);
- Ccr = xc->readMiscReg(MISCREG_TSTATE_CCR_BASE + Tl);
- Pstate = xc->readMiscReg(MISCREG_TSTATE_PSTATE_BASE + Tl);
- NPC = xc->readMiscReg(MISCREG_TPC_BASE + Tl);
- NNPC = xc->readMiscReg(MISCREG_TNPC_BASE + Tl);
- Tl = Tl - 1;
- }});
- }
- }
- }
- 0x3: decode OP3 {
- format Load {
- 0x00: lduw({{Rd = Mem;}}, {{32}});
- 0x01: ldub({{Rd = Mem;}}, {{8}});
- 0x02: lduh({{Rd = Mem;}}, {{16}});
- 0x03: ldd({{
- uint64_t val = Mem;
- RdLow = val<31:0>;
- RdHigh = val<63:32>;
- }}, {{64}});
- }
- format Store {
- 0x04: stw({{Mem = Rd.sw;}}, {{32}});
- 0x05: stb({{Mem = Rd.sb;}}, {{8}});
- 0x06: sth({{Mem = Rd.shw;}}, {{16}});
- 0x07: std({{Mem = RdLow<31:0> | RdHigh<31:0> << 32;}}, {{64}});
- }
- format Load {
- 0x08: ldsw({{Rd = (int32_t)Mem;}}, {{32}});
- 0x09: ldsb({{Rd = (int8_t)Mem;}}, {{8}});
- 0x0A: ldsh({{Rd = (int16_t)Mem;}}, {{16}});
- 0x0B: ldx({{Rd = (int64_t)Mem;}}, {{64}});
- 0x0D: ldstub({{
- Rd = Mem;
- Mem = 0xFF;
- }}, {{8}});
- }
- 0x0E: Store::stx({{Mem = Rd}}, {{64}});
- 0x0F: LoadStore::swap({{
- uint32_t temp = Rd;
- Rd = Mem;
- Mem = temp;
- }}, {{32}});
- format Load {
- 0x10: lduwa({{Rd = Mem;}}, {{32}});
- 0x11: lduba({{Rd = Mem;}}, {{8}});
- 0x12: lduha({{Rd = Mem;}}, {{16}});
- 0x13: ldda({{
- uint64_t val = Mem;
- RdLow = val<31:0>;
- RdHigh = val<63:32>;
- }}, {{64}});
- }
- format Store {
- 0x14: stwa({{Mem = Rd;}}, {{32}});
- 0x15: stba({{Mem = Rd;}}, {{8}});
- 0x16: stha({{Mem = Rd;}}, {{16}});
- 0x17: stda({{Mem = RdLow<31:0> | RdHigh<31:0> << 32;}}, {{64}});
- }
- format Load {
- 0x18: ldswa({{Rd = (int32_t)Mem;}}, {{32}});
- 0x19: ldsba({{Rd = (int8_t)Mem;}}, {{8}});
- 0x1A: ldsha({{Rd = (int16_t)Mem;}}, {{16}});
- 0x1B: ldxa({{Rd = (int64_t)Mem;}}, {{64}});
- }
- 0x1D: LoadStore::ldstuba({{
- Rd = Mem;
- Mem = 0xFF;
- }}, {{8}});
- 0x1E: Store::stxa({{Mem = Rd}}, {{64}});
- 0x1F: LoadStore::swapa({{
- uint32_t temp = Rd;
- Rd = Mem;
- Mem = temp;
- }}, {{32}});
- format Trap {
- 0x20: ldf({{fault = new FpDisabled;}});
- 0x21: decode X {
- 0x0: Load::ldfsr({{Fsr = Mem<31:0> | Fsr<63:32>;}}, {{32}});
- 0x1: Load::ldxfsr({{Fsr = Mem;}}, {{64}});
- }
- 0x22: ldqf({{fault = new FpDisabled;}});
- 0x23: lddf({{fault = new FpDisabled;}});
- 0x24: stf({{fault = new FpDisabled;}});
- 0x25: decode X {
- 0x0: Store::stfsr({{Mem = Fsr<31:0>;}}, {{32}});
- 0x1: Store::stxfsr({{Mem = Fsr;}}, {{64}});
- }
- 0x26: stqf({{fault = new FpDisabled;}});
- 0x27: stdf({{fault = new FpDisabled;}});
- 0x2D: Nop::prefetch({{ }});
- 0x30: ldfa({{return new FpDisabled;}});
- 0x32: ldqfa({{fault = new FpDisabled;}});
- 0x33: lddfa({{fault = new FpDisabled;}});
- 0x34: stfa({{fault = new FpDisabled;}});
- 0x35: stqfa({{fault = new FpDisabled;}});
- 0x36: stdfa({{fault = new FpDisabled;}});
- 0x3C: Cas::casa({{
- uint64_t val = Mem.uw;
- if(Rs2.uw == val)
- Mem.uw = Rd.uw;
- Rd.uw = val;
- }});
- 0x3D: Nop::prefetcha({{ }});
- 0x3E: Cas::casxa({{
- uint64_t val = Mem.udw;
- if(Rs2 == val)
- Mem.udw = Rd;
- Rd = val;
- }});
- }
- }
-}
diff --git a/arch/sparc/isa/formats.isa b/arch/sparc/isa/formats.isa
deleted file mode 100644
index 17d68061b..000000000
--- a/arch/sparc/isa/formats.isa
+++ /dev/null
@@ -1,28 +0,0 @@
-//Include the basic format
-//Templates from this format are used later
-##include "formats/basic.isa"
-
-//Include the noop format
-##include "formats/nop.isa"
-
-//Include the integerOp and integerOpCc format
-##include "formats/integerop.isa"
-
-//Include the memory format
-##include "formats/mem.isa"
-
-//Include the compare and swap format
-##include "formats/cas.isa"
-
-//Include the trap format
-##include "formats/trap.isa"
-
-//Include the "unknown" format
-##include "formats/unknown.isa"
-
-//Include the priveleged mode format
-##include "formats/priv.isa"
-
-//Include the branch format
-##include "formats/branch.isa"
-
diff --git a/arch/sparc/isa/formats/basic.isa b/arch/sparc/isa/formats/basic.isa
deleted file mode 100644
index 73df7617d..000000000
--- a/arch/sparc/isa/formats/basic.isa
+++ /dev/null
@@ -1,68 +0,0 @@
-
-// Declarations for execute() methods.
-def template BasicExecDeclare {{
- Fault execute(%(CPU_exec_context)s *, Trace::InstRecord *) const;
-}};
-
-// Basic instruction class declaration template.
-def template BasicDeclare {{
- /**
- * Static instruction class for "%(mnemonic)s".
- */
- class %(class_name)s : public %(base_class)s
- {
- public:
- // Constructor.
- %(class_name)s(MachInst machInst);
- %(BasicExecDeclare)s
- };
-}};
-
-// Basic instruction class constructor template.
-def template BasicConstructor {{
- inline %(class_name)s::%(class_name)s(MachInst machInst)
- : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s)
- {
- %(constructor)s;
- }
-}};
-
-// Basic instruction class execute method template.
-def template BasicExecute {{
- Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
- Trace::InstRecord *traceData) const
- {
- Fault fault = NoFault;
-
- %(fp_enable_check)s;
- %(op_decl)s;
- %(op_rd)s;
- %(code)s;
-
- if(fault == NoFault)
- {
- %(op_wb)s;
- }
- return fault;
- }
-}};
-
-// Basic decode template.
-def template BasicDecode {{
- return new %(class_name)s(machInst);
-}};
-
-// Basic decode template, passing mnemonic in as string arg to constructor.
-def template BasicDecodeWithMnemonic {{
- return new %(class_name)s("%(mnemonic)s", machInst);
-}};
-
-// The most basic instruction format... used only for a few misc. insts
-def format BasicOperate(code, *flags) {{
- iop = InstObjParams(name, Name, 'SparcStaticInst',
- CodeBlock(code), flags)
- header_output = BasicDeclare.subst(iop)
- decoder_output = BasicConstructor.subst(iop)
- decode_block = BasicDecode.subst(iop)
- exec_output = BasicExecute.subst(iop)
-}};
diff --git a/arch/sparc/isa/formats/branch.isa b/arch/sparc/isa/formats/branch.isa
deleted file mode 100644
index 37bdb9402..000000000
--- a/arch/sparc/isa/formats/branch.isa
+++ /dev/null
@@ -1,308 +0,0 @@
-////////////////////////////////////////////////////////////////////
-//
-// Branch instructions
-//
-
-output header {{
- /**
- * Base class for branch operations.
- */
- class Branch : public SparcStaticInst
- {
- protected:
- // Constructor
- Branch(const char *mnem, MachInst _machInst, OpClass __opClass) :
- SparcStaticInst(mnem, _machInst, __opClass)
- {
- }
-
- std::string generateDisassembly(Addr pc,
- const SymbolTable *symtab) const;
- };
-
- /**
- * Base class for branch operations with an immediate displacement.
- */
- class BranchDisp : public Branch
- {
- protected:
- // Constructor
- BranchDisp(const char *mnem, MachInst _machInst,
- OpClass __opClass) :
- Branch(mnem, _machInst, __opClass)
- {
- }
-
- std::string generateDisassembly(Addr pc,
- const SymbolTable *symtab) const;
-
- int32_t disp;
- };
-
- /**
- * Base class for branches with 19 bit displacements.
- */
- class Branch19 : public BranchDisp
- {
- protected:
- // Constructor
- Branch19(const char *mnem, MachInst _machInst,
- OpClass __opClass) :
- BranchDisp(mnem, _machInst, __opClass)
- {
- disp = sign_ext(DISP19 << 2, 21);
- }
- };
-
- /**
- * Base class for branches with 22 bit displacements.
- */
- class Branch22 : public BranchDisp
- {
- protected:
- // Constructor
- Branch22(const char *mnem, MachInst _machInst,
- OpClass __opClass) :
- BranchDisp(mnem, _machInst, __opClass)
- {
- disp = sign_ext(DISP22 << 2, 24);
- }
- };
-
- /**
- * Base class for branches with 30 bit displacements.
- */
- class Branch30 : public BranchDisp
- {
- protected:
- // Constructor
- Branch30(const char *mnem, MachInst _machInst,
- OpClass __opClass) :
- BranchDisp(mnem, _machInst, __opClass)
- {
- disp = sign_ext(DISP30 << 2, 32);
- }
- };
-
- /**
- * Base class for 16bit split displacements.
- */
- class BranchSplit : public BranchDisp
- {
- protected:
- // Constructor
- BranchSplit(const char *mnem, MachInst _machInst,
- OpClass __opClass) :
- BranchDisp(mnem, _machInst, __opClass)
- {
- disp = sign_ext((D16HI << 16) | (D16LO << 2), 18);
- }
- };
-
- /**
- * Base class for branches that use an immediate and a register to
- * compute their displacements.
- */
- class BranchImm13 : public Branch
- {
- protected:
- // Constructor
- BranchImm13(const char *mnem, MachInst _machInst, OpClass __opClass) :
- Branch(mnem, _machInst, __opClass), imm(sign_ext(SIMM13, 13))
- {
- }
-
- std::string generateDisassembly(Addr pc,
- const SymbolTable *symtab) const;
-
- int32_t imm;
- };
-}};
-
-output decoder {{
- std::string Branch::generateDisassembly(Addr pc,
- const SymbolTable *symtab) const
- {
- std::stringstream response;
-
- printMnemonic(response, mnemonic);
-
- if (_numSrcRegs > 0)
- {
- printReg(response, _srcRegIdx[0]);
- for(int x = 1; x < _numSrcRegs; x++)
- {
- response << ", ";
- printReg(response, _srcRegIdx[x]);
- }
- }
-
- if (_numDestRegs > 0)
- {
- if(_numSrcRegs > 0)
- response << ", ";
- printReg(response, _destRegIdx[0]);
- }
-
- return response.str();
- }
-
- std::string BranchImm13::generateDisassembly(Addr pc,
- const SymbolTable *symtab) const
- {
- std::stringstream response;
-
- printMnemonic(response, mnemonic);
-
- if (_numSrcRegs > 0)
- {
- printReg(response, _srcRegIdx[0]);
- for(int x = 1; x < _numSrcRegs; x++)
- {
- response << ", ";
- printReg(response, _srcRegIdx[x]);
- }
- }
-
- if(_numSrcRegs > 0)
- response << ", ";
-
- ccprintf(response, "0x%x", imm);
-
- if (_numDestRegs > 0)
- {
- response << ", ";
- printReg(response, _destRegIdx[0]);
- }
-
- return response.str();
- }
-
- std::string BranchDisp::generateDisassembly(Addr pc,
- const SymbolTable *symtab) const
- {
- std::stringstream response;
- std::string symbol;
- Addr symbolAddr;
-
- Addr target = disp + pc;
-
- printMnemonic(response, mnemonic);
- ccprintf(response, "0x%x", target);
-
- if(symtab->findNearestSymbol(target, symbol, symbolAddr))
- {
- ccprintf(response, " <%s", symbol);
- if(symbolAddr != target)
- ccprintf(response, "+%d>", target - symbolAddr);
- else
- ccprintf(response, ">");
- }
-
- return response.str();
- }
-}};
-
-def template BranchExecute {{
- Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
- Trace::InstRecord *traceData) const
- {
- //Attempt to execute the instruction
- Fault fault = NoFault;
-
- %(op_decl)s;
- %(op_rd)s;
-
- NNPC = xc->readNextNPC();
- %(code)s;
-
- if(fault == NoFault)
- {
- //Write the resulting state to the execution context
- %(op_wb)s;
- }
-
- return fault;
- }
-}};
-
-let {{
- handle_annul = '''
- {
- if(A)
- {
- NPC = xc->readNextNPC();
- NNPC = NPC + 4;
- }
- else
- {
- NPC = xc->readNextPC();
- NNPC = xc->readNextNPC();
- }
- }'''
-}};
-
-// Primary format for branch instructions:
-def format Branch(code, *opt_flags) {{
- code = re.sub(r'handle_annul', handle_annul, code)
- (usesImm, code, immCode,
- rString, iString) = splitOutImm(code)
- iop = InstObjParams(name, Name, 'Branch', code, opt_flags)
- header_output = BasicDeclare.subst(iop)
- decoder_output = BasicConstructor.subst(iop)
- exec_output = BranchExecute.subst(iop)
- if usesImm:
- imm_iop = InstObjParams(name, Name + 'Imm', 'BranchImm' + iString,
- immCode, opt_flags)
- header_output += BasicDeclare.subst(imm_iop)
- decoder_output += BasicConstructor.subst(imm_iop)
- exec_output += BranchExecute.subst(imm_iop)
- decode_block = ROrImmDecode.subst(iop)
- else:
- decode_block = BasicDecode.subst(iop)
-}};
-
-// Primary format for branch instructions:
-def format Branch19(code, *opt_flags) {{
- code = re.sub(r'handle_annul', handle_annul, code)
- codeBlk = CodeBlock(code)
- iop = InstObjParams(name, Name, 'Branch19', codeBlk, opt_flags)
- header_output = BasicDeclare.subst(iop)
- decoder_output = BasicConstructor.subst(iop)
- exec_output = BranchExecute.subst(iop)
- decode_block = BasicDecode.subst(iop)
-}};
-
-// Primary format for branch instructions:
-def format Branch22(code, *opt_flags) {{
- code = re.sub(r'handle_annul', handle_annul, code)
- codeBlk = CodeBlock(code)
- iop = InstObjParams(name, Name, 'Branch22', codeBlk, opt_flags)
- header_output = BasicDeclare.subst(iop)
- decoder_output = BasicConstructor.subst(iop)
- exec_output = BranchExecute.subst(iop)
- decode_block = BasicDecode.subst(iop)
-}};
-
-// Primary format for branch instructions:
-def format Branch30(code, *opt_flags) {{
- code = re.sub(r'handle_annul', handle_annul, code)
- codeBlk = CodeBlock(code)
- iop = InstObjParams(name, Name, 'Branch30', codeBlk, opt_flags)
- header_output = BasicDeclare.subst(iop)
- decoder_output = BasicConstructor.subst(iop)
- exec_output = BranchExecute.subst(iop)
- decode_block = BasicDecode.subst(iop)
-}};
-
-// Primary format for branch instructions:
-def format BranchSplit(code, *opt_flags) {{
- code = re.sub(r'handle_annul', handle_annul, code)
- codeBlk = CodeBlock(code)
- iop = InstObjParams(name, Name, 'BranchSplit', codeBlk, opt_flags)
- header_output = BasicDeclare.subst(iop)
- decoder_output = BasicConstructor.subst(iop)
- exec_output = BranchExecute.subst(iop)
- decode_block = BasicDecode.subst(iop)
-}};
-
diff --git a/arch/sparc/isa/formats/integerop.isa b/arch/sparc/isa/formats/integerop.isa
deleted file mode 100644
index 881154b67..000000000
--- a/arch/sparc/isa/formats/integerop.isa
+++ /dev/null
@@ -1,349 +0,0 @@
-////////////////////////////////////////////////////////////////////
-//
-// Integer operate instructions
-//
-
-output header {{
- /**
- * Base class for integer operations.
- */
- class IntOp : public SparcStaticInst
- {
- protected:
- // Constructor
- IntOp(const char *mnem, ExtMachInst _machInst,
- OpClass __opClass) :
- SparcStaticInst(mnem, _machInst, __opClass)
- {
- }
-
- std::string generateDisassembly(Addr pc,
- const SymbolTable *symtab) const;
-
- virtual bool printPseudoOps(std::ostream &os, Addr pc,
- const SymbolTable *symtab) const;
- };
-
- /**
- * Base class for immediate integer operations.
- */
- class IntOpImm : public IntOp
- {
- protected:
- // Constructor
- IntOpImm(const char *mnem, ExtMachInst _machInst,
- OpClass __opClass) :
- IntOp(mnem, _machInst, __opClass)
- {
- }
-
- int32_t imm;
-
- std::string generateDisassembly(Addr pc,
- const SymbolTable *symtab) const;
-
- virtual bool printPseudoOps(std::ostream &os, Addr pc,
- const SymbolTable *symtab) const;
- };
-
- /**
- * Base class for 10 bit immediate integer operations.
- */
- class IntOpImm10 : public IntOpImm
- {
- protected:
- // Constructor
- IntOpImm10(const char *mnem, ExtMachInst _machInst,
- OpClass __opClass) :
- IntOpImm(mnem, _machInst, __opClass)
- {
- imm = sign_ext(SIMM10, 10);
- }
- };
-
- /**
- * Base class for 11 bit immediate integer operations.
- */
- class IntOpImm11 : public IntOpImm
- {
- protected:
- // Constructor
- IntOpImm11(const char *mnem, ExtMachInst _machInst,
- OpClass __opClass) :
- IntOpImm(mnem, _machInst, __opClass)
- {
- imm = sign_ext(SIMM11, 11);
- }
- };
-
- /**
- * Base class for 13 bit immediate integer operations.
- */
- class IntOpImm13 : public IntOpImm
- {
- protected:
- // Constructor
- IntOpImm13(const char *mnem, ExtMachInst _machInst,
- OpClass __opClass) :
- IntOpImm(mnem, _machInst, __opClass)
- {
- imm = sign_ext(SIMM13, 13);
- }
- };
-
- /**
- * Base class for sethi.
- */
- class SetHi : public IntOpImm
- {
- protected:
- // Constructor
- SetHi(const char *mnem, ExtMachInst _machInst,
- OpClass __opClass) :
- IntOpImm(mnem, _machInst, __opClass)
- {
- imm = (IMM22 << 10) & 0xFFFFFC00;
- }
-
- std::string generateDisassembly(Addr pc,
- const SymbolTable *symtab) const;
- };
-}};
-
-def template SetHiDecode {{
- {
- if(RD == 0 && IMM22 == 0)
- return (SparcStaticInst *)(new Nop("nop", machInst, No_OpClass));
- else
- return (SparcStaticInst *)(new %(class_name)s(machInst));
- }
-}};
-
-output decoder {{
-
- bool IntOp::printPseudoOps(std::ostream &os, Addr pc,
- const SymbolTable *symbab) const
- {
- if(!strcmp(mnemonic, "or") && _srcRegIdx[0] == 0)
- {
- printMnemonic(os, "mov");
- if(_numSrcRegs > 0)
- printReg(os, _srcRegIdx[1]);
- ccprintf(os, ", ");
- if(_numDestRegs > 0)
- printReg(os, _destRegIdx[0]);
-
- return true;
- }
- return false;
- }
-
- bool IntOpImm::printPseudoOps(std::ostream &os, Addr pc,
- const SymbolTable *symbab) const
- {
- if(!strcmp(mnemonic, "or"))
- {
- if(_srcRegIdx[0] == 0)
- {
- if(imm == 0)
- {
- printMnemonic(os, "clr");
- if(_numDestRegs > 0)
- printReg(os, _destRegIdx[0]);
- return true;
- }
- else
- {
- printMnemonic(os, "mov");
- ccprintf(os, ", 0x%x, ", imm);
- if(_numDestRegs > 0)
- printReg(os, _destRegIdx[0]);
- return true;
- }
- }
- else if(imm == 0)
- {
- printMnemonic(os, "mov");
- if(_numSrcRegs > 0)
- printReg(os, _srcRegIdx[0]);
- ccprintf(os, ", ");
- if(_numDestRegs > 0)
- printReg(os, _destRegIdx[0]);
- return true;
- }
- }
- return false;
- }
-
- std::string IntOp::generateDisassembly(Addr pc,
- const SymbolTable *symtab) const
- {
- std::stringstream response;
-
- if(!printPseudoOps(response, pc, symtab))
- {
- printMnemonic(response, mnemonic);
- if (_numSrcRegs > 0)
- {
- printReg(response, _srcRegIdx[0]);
- for(int x = 1; x < _numSrcRegs; x++)
- {
- response << ", ";
- printReg(response, _srcRegIdx[x]);
- }
- }
- if (_numDestRegs > 0)
- {
- if(_numSrcRegs > 0)
- response << ", ";
- printReg(response, _destRegIdx[0]);
- }
- }
- return response.str();
- }
-
- std::string IntOpImm::generateDisassembly(Addr pc,
- const SymbolTable *symtab) const
- {
- std::stringstream response;
-
- if(!printPseudoOps(response, pc, symtab))
- {
- printMnemonic(response, mnemonic);
- if (_numSrcRegs > 0)
- {
- printReg(response, _srcRegIdx[0]);
- for(int x = 1; x < _numSrcRegs - 1; x++)
- {
- response << ", ";
- printReg(response, _srcRegIdx[x]);
- }
- }
- if(_numSrcRegs > 0)
- response << ", ";
- ccprintf(response, "0x%x", imm);
- if (_numDestRegs > 0)
- {
- response << ", ";
- printReg(response, _destRegIdx[0]);
- }
- }
- return response.str();
- }
-
- std::string SetHi::generateDisassembly(Addr pc,
- const SymbolTable *symtab) const
- {
- std::stringstream response;
-
- printMnemonic(response, mnemonic);
- if(_numSrcRegs > 0)
- response << ", ";
- ccprintf(response, "%%hi(0x%x), ", imm);
- printReg(response, _destRegIdx[0]);
- return response.str();
- }
-}};
-
-def template IntOpExecute {{
- Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
- Trace::InstRecord *traceData) const
- {
- Fault fault = NoFault;
-
- %(op_decl)s;
- %(op_rd)s;
- %(code)s;
-
- //Write the resulting state to the execution context
- if(fault == NoFault)
- {
- %(cc_code)s;
- %(op_wb)s;
- }
- return fault;
- }
-}};
-
-let {{
- def doIntFormat(code, ccCode, name, Name, opt_flags):
- (usesImm, code, immCode,
- rString, iString) = splitOutImm(code)
- iop = InstObjParams(name, Name, 'IntOp', code,
- opt_flags, ("cc_code", ccCode))
- header_output = BasicDeclare.subst(iop)
- decoder_output = BasicConstructor.subst(iop)
- exec_output = IntOpExecute.subst(iop)
- if usesImm:
- imm_iop = InstObjParams(name, Name + 'Imm', 'IntOpImm' + iString,
- immCode, opt_flags, ("cc_code", ccCode))
- header_output += BasicDeclare.subst(imm_iop)
- decoder_output += BasicConstructor.subst(imm_iop)
- exec_output += IntOpExecute.subst(imm_iop)
- decode_block = ROrImmDecode.subst(iop)
- else:
- decode_block = BasicDecode.subst(iop)
- return (header_output, decoder_output, exec_output, decode_block)
-
- calcCcCode = '''
- CcrIccN = (Rd >> 31) & 1;
- CcrIccZ = ((Rd & 0xFFFFFFFF) == 0);
- CcrXccN = (Rd >> 63) & 1;
- CcrXccZ = (Rd == 0);
- CcrIccV = %(ivValue)s;
- CcrIccC = %(icValue)s;
- CcrXccV = %(xvValue)s;
- CcrXccC = %(xcValue)s;
- DPRINTF(Sparc, "in = %%d\\n", CcrIccN);
- DPRINTF(Sparc, "iz = %%d\\n", CcrIccZ);
- DPRINTF(Sparc, "xn = %%d\\n", CcrXccN);
- DPRINTF(Sparc, "xz = %%d\\n", CcrXccZ);
- DPRINTF(Sparc, "iv = %%d\\n", CcrIccV);
- DPRINTF(Sparc, "ic = %%d\\n", CcrIccC);
- DPRINTF(Sparc, "xv = %%d\\n", CcrXccV);
- DPRINTF(Sparc, "xc = %%d\\n", CcrXccC);
- '''
-}};
-
-// Primary format for integer operate instructions:
-def format IntOp(code, *opt_flags) {{
- ccCode = ''
- (header_output,
- decoder_output,
- exec_output,
- decode_block) = doIntFormat(code, ccCode,
- name, Name, opt_flags)
-}};
-
-// Primary format for integer operate instructions:
-def format IntOpCc(code, icValue, ivValue, xcValue, xvValue, *opt_flags) {{
- ccCode = calcCcCode % vars()
- (header_output,
- decoder_output,
- exec_output,
- decode_block) = doIntFormat(code, ccCode,
- name, Name, opt_flags)
-}};
-
-// Primary format for integer operate instructions:
-def format IntOpCcRes(code, *opt_flags) {{
- ccCode = calcCcCode % {"icValue":"0",
- "ivValue":"0",
- "xcValue":"0",
- "xvValue":"0"}
- (header_output,
- decoder_output,
- exec_output,
- decode_block) = doIntFormat(code, ccCode,
- name, Name, opt_flags)
-}};
-
-def format SetHi(code, *opt_flags) {{
- iop = InstObjParams(name, Name, 'SetHi',
- code, opt_flags, ("cc_code", ''))
- header_output = BasicDeclare.subst(iop)
- decoder_output = BasicConstructor.subst(iop)
- exec_output = IntOpExecute.subst(iop)
- decode_block = SetHiDecode.subst(iop)
-}};
-
diff --git a/arch/sparc/isa/formats/mem.isa b/arch/sparc/isa/formats/mem.isa
deleted file mode 100644
index 12dae57e5..000000000
--- a/arch/sparc/isa/formats/mem.isa
+++ /dev/null
@@ -1,171 +0,0 @@
-////////////////////////////////////////////////////////////////////
-//
-// Mem instructions
-//
-
-output header {{
- /**
- * Base class for memory operations.
- */
- class Mem : public SparcStaticInst
- {
- protected:
-
- // Constructor
- Mem(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
- SparcStaticInst(mnem, _machInst, __opClass)
- {
- }
-
- std::string generateDisassembly(Addr pc,
- const SymbolTable *symtab) const;
- };
-
- /**
- * Class for memory operations which use an immediate offset.
- */
- class MemImm : public Mem
- {
- protected:
-
- // Constructor
- MemImm(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
- Mem(mnem, _machInst, __opClass)
- {
- imm = sign_ext(SIMM13, 13);
- }
-
- std::string generateDisassembly(Addr pc,
- const SymbolTable *symtab) const;
-
- int32_t imm;
- };
-}};
-
-output decoder {{
- std::string Mem::generateDisassembly(Addr pc,
- const SymbolTable *symtab) const
- {
- std::stringstream response;
- bool load = flags[IsLoad];
- bool save = flags[IsStore];
-
- printMnemonic(response, mnemonic);
- if(save)
- {
- printReg(response, _srcRegIdx[0]);
- ccprintf(response, ", ");
- }
- ccprintf(response, "[ ");
- printReg(response, _srcRegIdx[!save ? 0 : 1]);
- ccprintf(response, " + ");
- printReg(response, _srcRegIdx[!save ? 1 : 2]);
- ccprintf(response, " ]");
- if(load)
- {
- ccprintf(response, ", ");
- printReg(response, _destRegIdx[0]);
- }
-
- return response.str();
- }
-
- std::string MemImm::generateDisassembly(Addr pc,
- const SymbolTable *symtab) const
- {
- std::stringstream response;
- bool load = flags[IsLoad];
- bool save = flags[IsStore];
-
- printMnemonic(response, mnemonic);
- if(save)
- {
- printReg(response, _srcRegIdx[0]);
- ccprintf(response, ", ");
- }
- ccprintf(response, "[ ");
- printReg(response, _srcRegIdx[!save ? 0 : 1]);
- if(imm >= 0)
- ccprintf(response, " + 0x%x ]", imm);
- else
- ccprintf(response, " + -0x%x ]", -imm);
- if(load)
- {
- ccprintf(response, ", ");
- printReg(response, _destRegIdx[0]);
- }
-
- return response.str();
- }
-}};
-
-def template MemExecute {{
- Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
- Trace::InstRecord *traceData) const
- {
- Fault fault = NoFault;
- Addr EA;
- %(op_decl)s;
- %(op_rd)s;
- %(ea_code)s;
- DPRINTF(Sparc, "The address is 0x%x\n", EA);
- %(load)s;
- %(code)s;
- %(store)s;
-
- if(fault == NoFault)
- {
- //Write the resulting state to the execution context
- %(op_wb)s;
- }
-
- return fault;
- }
-}};
-
-let {{
- # Leave memAccessFlags at 0 for now
- loadString = "xc->read(EA, (uint%(width)s_t&)Mem, 0);"
- storeString = "uint64_t write_result = 0; \
- xc->write((uint%(width)s_t)Mem, EA, 0, &write_result);"
-
- def doMemFormat(code, load, store, name, Name, opt_flags):
- addrCalcReg = 'EA = Rs1 + Rs2;'
- addrCalcImm = 'EA = Rs1 + imm;'
- iop = InstObjParams(name, Name, 'Mem', code,
- opt_flags, ("ea_code", addrCalcReg),
- ("load", load), ("store", store))
- iop_imm = InstObjParams(name, Name + 'Imm', 'MemImm', code,
- opt_flags, ("ea_code", addrCalcImm),
- ("load", load), ("store", store))
- header_output = BasicDeclare.subst(iop) + BasicDeclare.subst(iop_imm)
- decoder_output = BasicConstructor.subst(iop) + BasicConstructor.subst(iop_imm)
- decode_block = ROrImmDecode.subst(iop)
- exec_output = MemExecute.subst(iop) + MemExecute.subst(iop_imm)
- return (header_output, decoder_output, exec_output, decode_block)
-}};
-
-def format Load(code, width, *opt_flags) {{
- (header_output,
- decoder_output,
- exec_output,
- decode_block) = doMemFormat(code,
- loadString % {"width":width}, '', name, Name, opt_flags)
-}};
-
-def format Store(code, width, *opt_flags) {{
- (header_output,
- decoder_output,
- exec_output,
- decode_block) = doMemFormat(code, '',
- storeString % {"width":width}, name, Name, opt_flags)
-}};
-
-def format LoadStore(code, width, *opt_flags) {{
- (header_output,
- decoder_output,
- exec_output,
- decode_block) = doMemFormat(code,
- loadString % {"width":width}, storeString % {"width":width},
- name, Name, opt_flags)
-}};
diff --git a/arch/sparc/isa/formats/nop.isa b/arch/sparc/isa/formats/nop.isa
deleted file mode 100644
index df7503eee..000000000
--- a/arch/sparc/isa/formats/nop.isa
+++ /dev/null
@@ -1,62 +0,0 @@
-////////////////////////////////////////////////////////////////////
-//
-// Nop instruction
-//
-
-output header {{
- /**
- * Nop class.
- */
- class Nop : public SparcStaticInst
- {
- public:
- // Constructor
- Nop(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
- SparcStaticInst(mnem, _machInst, __opClass)
- {
- }
-
- // All Nop instructions do the same thing, so this can be
- // defined here. Nops can be defined directly, so there needs
- // to be a default implementation
- Fault execute(%(CPU_exec_context)s *xc,
- Trace::InstRecord *traceData) const
- {
- //Nothing to see here, move along
- return NoFault;
- }
-
- std::string generateDisassembly(Addr pc,
- const SymbolTable *symtab) const;
- };
-}};
-
-output decoder {{
- std::string Nop::generateDisassembly(Addr pc,
- const SymbolTable *symtab) const
- {
- std::stringstream response;
- printMnemonic(response, mnemonic);
- return response.str();
- }
-}};
-
-def template NopExecute {{
- Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
- Trace::InstRecord *traceData) const
- {
- //Nothing to see here, move along
- return NoFault;
- }
-}};
-
-// Primary format for integer operate instructions:
-def format Nop(code, *opt_flags) {{
- orig_code = code
- cblk = CodeBlock(code)
- iop = InstObjParams(name, Name, 'Nop', cblk, opt_flags)
- header_output = BasicDeclare.subst(iop)
- decoder_output = BasicConstructor.subst(iop)
- decode_block = BasicDecode.subst(iop)
- exec_output = NopExecute.subst(iop)
-}};
diff --git a/arch/sparc/isa/formats/priv.isa b/arch/sparc/isa/formats/priv.isa
deleted file mode 100644
index f9fea01f2..000000000
--- a/arch/sparc/isa/formats/priv.isa
+++ /dev/null
@@ -1,139 +0,0 @@
-////////////////////////////////////////////////////////////////////
-//
-// Privilege mode instructions
-//
-
-output header {{
- /**
- * Base class for privelege mode operations.
- */
- class Priv : public SparcStaticInst
- {
- protected:
- // Constructor
- Priv(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
- SparcStaticInst(mnem, _machInst, __opClass)
- {
- }
-
- std::string generateDisassembly(Addr pc,
- const SymbolTable *symtab) const;
- };
-
- /**
- * Base class for user mode "tick" access.
- */
- class PrivTick : public SparcStaticInst
- {
- protected:
- // Constructor
- PrivTick(const char *mnem, ExtMachInst _machInst,
- OpClass __opClass) :
- SparcStaticInst(mnem, _machInst, __opClass)
- {
- }
-
- std::string generateDisassembly(Addr pc,
- const SymbolTable *symtab) const;
- };
-
- /**
- * Base class for privelege mode operations with immediates.
- */
- class PrivImm : public Priv
- {
- protected:
- // Constructor
- PrivImm(const char *mnem, ExtMachInst _machInst,
- OpClass __opClass) :
- Priv(mnem, _machInst, __opClass), imm(SIMM13)
- {
- }
-
- int32_t imm;
- };
-
- /**
- * Base class for user mode "tick" access with immediates.
- */
- class PrivTickImm : public PrivTick
- {
- protected:
- // Constructor
- PrivTickImm(const char *mnem, ExtMachInst _machInst,
- OpClass __opClass) :
- PrivTick(mnem, _machInst, __opClass), imm(SIMM13)
- {
- }
-
- int32_t imm;
- };
-}};
-
-output decoder {{
- std::string Priv::generateDisassembly(Addr pc,
- const SymbolTable *symtab) const
- {
- return "Privileged Instruction";
- }
-
- std::string PrivTick::generateDisassembly(Addr pc,
- const SymbolTable *symtab) const
- {
- return "Regular access to Tick";
- }
-}};
-
-def template PrivExecute {{
- Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
- Trace::InstRecord *traceData) const
- {
- %(op_decl)s;
- %(op_rd)s;
-
- //If the processor isn't in privileged mode, fault out right away
- if(%(check)s)
- return new PrivilegedAction;
-
- %(code)s;
- %(op_wb)s;
- return NoFault;
- }
-}};
-
-let {{
- def doPrivFormat(code, checkCode, name, Name, opt_flags):
- (usesImm, code, immCode,
- rString, iString) = splitOutImm(code)
- iop = InstObjParams(name, Name, 'Priv', code,
- opt_flags, ("check", checkCode))
- header_output = BasicDeclare.subst(iop)
- decoder_output = BasicConstructor.subst(iop)
- exec_output = PrivExecute.subst(iop)
- if usesImm:
- imm_iop = InstObjParams(name, Name + 'Imm', 'PrivImm',
- immCode, opt_flags, ("check", checkCode))
- header_output += BasicDeclare.subst(imm_iop)
- decoder_output += BasicConstructor.subst(imm_iop)
- exec_output += PrivExecute.subst(imm_iop)
- decode_block = ROrImmDecode.subst(iop)
- else:
- decode_block = BasicDecode.subst(iop)
- return (header_output, decoder_output, exec_output, decode_block)
-}};
-
-// Primary format for integer operate instructions:
-def format Priv(code, *opt_flags) {{
- checkCode = "(!PstatePriv)"
- (header_output, decoder_output,
- exec_output, decode_block) = doPrivFormat(code,
- checkCode, name, Name, opt_flags)
-}};
-
-// Primary format for integer operate instructions:
-def format PrivTick(code, *opt_flags) {{
- checkCode = "(!PstatePriv && TickNpt)"
- (header_output, decoder_output,
- exec_output, decode_block) = doPrivFormat(code,
- checkCode, name, Name, opt_flags)
-}};
diff --git a/arch/sparc/isa/formats/trap.isa b/arch/sparc/isa/formats/trap.isa
deleted file mode 100644
index f6a45ca48..000000000
--- a/arch/sparc/isa/formats/trap.isa
+++ /dev/null
@@ -1,64 +0,0 @@
-////////////////////////////////////////////////////////////////////
-//
-// Trap instructions
-//
-
-output header {{
- /**
- * Base class for trap instructions,
- * or instructions that always fault.
- */
- class Trap : public SparcStaticInst
- {
- protected:
-
- // Constructor
- Trap(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
- SparcStaticInst(mnem, _machInst, __opClass), trapNum(SW_TRAP)
- {
- }
-
- std::string generateDisassembly(Addr pc,
- const SymbolTable *symtab) const;
-
- int trapNum;
- };
-}};
-
-output decoder {{
- std::string Trap::generateDisassembly(Addr pc,
- const SymbolTable *symtab) const
- {
- std::stringstream response;
-
- printMnemonic(response, mnemonic);
- ccprintf(response, " ");
- printReg(response, _srcRegIdx[0]);
- ccprintf(response, ", 0x%x", trapNum);
- ccprintf(response, ", or ");
- printReg(response, _srcRegIdx[1]);
- return response.str();
- }
-}};
-
-def template TrapExecute {{
- Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
- Trace::InstRecord *traceData) const
- {
- Fault fault = NoFault;
- %(op_decl)s;
- %(op_rd)s;
- %(code)s
- return fault;
- }
-}};
-
-def format Trap(code, *opt_flags) {{
- orig_code = code
- cblk = CodeBlock(code)
- iop = InstObjParams(name, Name, 'Trap', cblk, opt_flags)
- header_output = BasicDeclare.subst(iop)
- decoder_output = BasicConstructor.subst(iop)
- decode_block = BasicDecode.subst(iop)
- exec_output = TrapExecute.subst(iop)
-}};
diff --git a/arch/sparc/isa/formats/unknown.isa b/arch/sparc/isa/formats/unknown.isa
deleted file mode 100644
index 223111905..000000000
--- a/arch/sparc/isa/formats/unknown.isa
+++ /dev/null
@@ -1,46 +0,0 @@
-////////////////////////////////////////////////////////////////////
-//
-// Unknown instructions
-//
-
-output header {{
- /**
- * Class for Unknown/Illegal instructions
- */
- class Unknown : public SparcStaticInst
- {
- public:
-
- // Constructor
- Unknown(ExtMachInst _machInst) :
- SparcStaticInst("unknown", _machInst, No_OpClass)
- {
- }
-
- %(BasicExecDeclare)s
-
- std::string generateDisassembly(Addr pc,
- const SymbolTable *symtab) const;
-
- };
-}};
-
-output decoder {{
- std::string Unknown::generateDisassembly(Addr pc,
- const SymbolTable *symtab) const
- {
- return "Unknown instruction";
- }
-}};
-
-output exec {{
- Fault Unknown::execute(%(CPU_exec_context)s *xc,
- Trace::InstRecord *traceData) const
- {
- return new IllegalInstruction;
- }
-}};
-
-def format Unknown() {{
- decode_block = 'return new Unknown(machInst);\n'
-}};
diff --git a/arch/sparc/isa/includes.isa b/arch/sparc/isa/includes.isa
deleted file mode 100644
index ff4174899..000000000
--- a/arch/sparc/isa/includes.isa
+++ /dev/null
@@ -1,46 +0,0 @@
-////////////////////////////////////////////////////////////////////
-//
-// Output include file directives.
-//
-
-output header {{
-#include <sstream>
-#include <iostream>
-#include <iomanip>
-
-#include "cpu/static_inst.hh"
-#include "arch/sparc/faults.hh"
-#include "mem/request.hh" // some constructors use MemReq flags
-#include "arch/sparc/isa_traits.hh"
-#include "arch/sparc/regfile.hh"
-}};
-
-output decoder {{
-#include "base/cprintf.hh"
-#include "base/loader/symtab.hh"
-#include "cpu/exec_context.hh" // for Jump::branchTarget()
-
-#include <math.h>
-#if defined(linux)
-#include <fenv.h>
-#endif
-
-using namespace SparcISA;
-}};
-
-output exec {{
-#include <math.h>
-#if defined(linux)
-#include <fenv.h>
-#endif
-
-#ifdef FULL_SYSTEM
-//#include "sim/pseudo_inst.hh"
-#endif
-#include "cpu/base.hh"
-#include "cpu/exetrace.hh"
-#include "sim/sim_exit.hh"
-
-using namespace SparcISA;
-}};
-
diff --git a/arch/sparc/isa/main.isa b/arch/sparc/isa/main.isa
deleted file mode 100644
index 35167d6b7..000000000
--- a/arch/sparc/isa/main.isa
+++ /dev/null
@@ -1,52 +0,0 @@
-// -*- mode:c++ -*-
-
-// Copyright (c) 2003-2005 The Regents of The University of Michigan
-// All rights reserved.
-//
-// Redistribution and use in source and binary forms, with or without
-// modification, are permitted provided that the following conditions are
-// met: redistributions of source code must retain the above copyright
-// notice, this list of conditions and the following disclaimer;
-// redistributions in binary form must reproduce the above copyright
-// notice, this list of conditions and the following disclaimer in the
-// documentation and/or other materials provided with the distribution;
-// neither the name of the copyright holders nor the names of its
-// contributors may be used to endorse or promote products derived from
-// this software without specific prior written permission.
-//
-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
-##include "includes.isa"
-
-////////////////////////////////////////////////////////////////////
-//
-// Namespace statement. Everything below this line will be in the
-// SparcISAInst namespace.
-//
-
-namespace SparcISA;
-
-//Include the bitfield definitions
-##include "bitfields.isa"
-
-//Include the operand_types and operand definitions
-##include "operands.isa"
-
-//Include the base class for sparc instructions, and some support code
-##include "base.isa"
-
-//Include the definitions for the instruction formats
-##include "formats.isa"
-
-//Include the decoder definition
-##include "decoder.isa"
diff --git a/arch/sparc/isa/operands.isa b/arch/sparc/isa/operands.isa
deleted file mode 100644
index 64a032eea..000000000
--- a/arch/sparc/isa/operands.isa
+++ /dev/null
@@ -1,115 +0,0 @@
-def operand_types {{
- 'sb' : ('signed int', 8),
- 'ub' : ('unsigned int', 8),
- 'shw' : ('signed int', 16),
- 'uhw' : ('unsigned int', 16),
- 'sw' : ('signed int', 32),
- 'uw' : ('unsigned int', 32),
- 'sdw' : ('signed int', 64),
- 'udw' : ('unsigned int', 64),
- 'sf' : ('float', 32),
- 'df' : ('float', 64),
- 'qf' : ('float', 128)
-}};
-
-def operands {{
- # Int regs default to unsigned, but code should not count on this.
- # For clarity, descriptions that depend on unsigned behavior should
- # explicitly specify '.uq'.
- 'Rd': ('IntReg', 'udw', 'RD', 'IsInteger', 1),
- 'RdLow': ('IntReg', 'udw', 'RD & (~1)', 'IsInteger', 2),
- 'RdHigh': ('IntReg', 'udw', 'RD | 1', 'IsInteger', 3),
- 'Rs1': ('IntReg', 'udw', 'RS1', 'IsInteger', 4),
- 'Rs2': ('IntReg', 'udw', 'RS2', 'IsInteger', 5),
- #'Fa': ('FloatReg', 'df', 'FA', 'IsFloating', 1),
- #'Fb': ('FloatReg', 'df', 'FB', 'IsFloating', 2),
- #'Fc': ('FloatReg', 'df', 'FC', 'IsFloating', 3),
- 'Mem': ('Mem', 'udw', None, ('IsMemRef', 'IsLoad', 'IsStore'), 4),
- 'NPC': ('NPC', 'udw', None, ( None, None, 'IsControl' ), 4),
- 'NNPC': ('NNPC', 'udw', None, (None, None, 'IsControl' ), 4),
- #'Runiq': ('ControlReg', 'uq', 'Uniq', None, 1),
- #'FPCR': ('ControlReg', 'uq', 'Fpcr', None, 1),
- 'R0': ('IntReg', 'udw', '0', None, 6),
- 'R1': ('IntReg', 'udw', '1', None, 7),
- 'R15': ('IntReg', 'udw', '15', 'IsInteger', 8),
- 'R16': ('IntReg', 'udw', '16', None, 9),
- # Control registers
- 'Pstate': ('ControlReg', 'udw', 'MISCREG_PSTATE', None, 1),
- 'PstateAg': ('ControlReg', 'udw', 'MISCREG_PSTATE_AG', None, 2),
- 'PstateIe': ('ControlReg', 'udw', 'MISCREG_PSTATE_IE', None, 3),
- 'PstatePriv': ('ControlReg', 'udw', 'MISCREG_PSTATE_PRIV', None, 4),
- 'PstateAm': ('ControlReg', 'udw', 'MISCREG_PSTATE_AM', None, 5),
- 'PstatePef': ('ControlReg', 'udw', 'MISCREG_PSTATE_PEF', None, 6),
- 'PstateRed': ('ControlReg', 'udw', 'MISCREG_PSTATE_RED', None, 7),
- 'PstateMm': ('ControlReg', 'udw', 'MISCREG_PSTATE_MM', None, 8),
- 'PstateTle': ('ControlReg', 'udw', 'MISCREG_PSTATE_TLE', None, 9),
- 'PstateCle': ('ControlReg', 'udw', 'MISCREG_PSTATE_CLE', None, 10),
- 'Tba': ('ControlReg', 'udw', 'MISCREG_TBA', None, 11),
- 'Y': ('ControlReg', 'udw', 'MISCREG_Y', None, 12),
- 'YValue': ('ControlReg', 'udw', 'MISCREG_Y_VALUE', None, 13),
- 'Pil': ('ControlReg', 'udw', 'MISCREG_PIL', None, 14),
- 'Cwp': ('ControlReg', 'udw', 'MISCREG_CWP', None, 15),
- #'Tt': ('ControlReg', 'udw', 'MISCREG_TT_BASE + tl', None, 16),
- 'Ccr': ('ControlReg', 'udw', 'MISCREG_CCR', None, 17),
- 'CcrIcc': ('ControlReg', 'udw', 'MISCREG_CCR_ICC', None, 18),
- 'CcrIccC': ('ControlReg', 'udw', 'MISCREG_CCR_ICC_C', None, 19),
- 'CcrIccV': ('ControlReg', 'udw', 'MISCREG_CCR_ICC_V', None, 20),
- 'CcrIccZ': ('ControlReg', 'udw', 'MISCREG_CCR_ICC_Z', None, 21),
- 'CcrIccN': ('ControlReg', 'udw', 'MISCREG_CCR_ICC_N', None, 22),
- 'CcrXcc': ('ControlReg', 'udw', 'MISCREG_CCR_XCC', None, 23),
- 'CcrXccC': ('ControlReg', 'udw', 'MISCREG_CCR_XCC_C', None, 22),
- 'CcrXccV': ('ControlReg', 'udw', 'MISCREG_CCR_XCC_V', None, 23),
- 'CcrXccZ': ('ControlReg', 'udw', 'MISCREG_CCR_XCC_Z', None, 24),
- 'CcrXccN': ('ControlReg', 'udw', 'MISCREG_CCR_XCC_N', None, 25),
- 'Asi': ('ControlReg', 'udw', 'MISCREG_ASI', None, 26),
- 'Tl': ('ControlReg', 'udw', 'MISCREG_TL', None, 27),
- #'Tpc': ('ControlReg', 'udw', 'MISCREG_TPC', None, 28),
- 'Tick': ('ControlReg', 'udw', 'MISCREG_TICK', None, 29),
- 'TickCounter': ('ControlReg', 'udw', 'MISCREG_TICK_COUNTER', None, 32),
- 'TickNpt': ('ControlReg', 'udw', 'MISCREG_TICK_NPT', None, 33),
- 'Cansave': ('ControlReg', 'udw', 'MISCREG_CANSAVE', None, 34),
- 'Canrestore': ('ControlReg', 'udw', 'MISCREG_CANRESTORE', None, 35),
- 'Otherwin': ('ControlReg', 'udw', 'MISCREG_OTHERWIN', None, 36),
- 'Cleanwin': ('ControlReg', 'udw', 'MISCREG_CLEANWIN', None, 37),
- 'Wstate': ('ControlReg', 'udw', 'MISCREG_WSTATE', None, 38),
- 'WstateNormal': ('ControlReg', 'udw', 'MISCREG_WSTATE_NORMAL', None,39),
- 'WstateOther': ('ControlReg', 'udw', 'MISCREG_WSTATE_OTHER', None, 40),
- 'Ver': ('ControlReg', 'udw', 'MISCREG_VER', None, 41),
- 'VerMaxwin': ('ControlReg', 'udw', 'MISCREG_VER_MAXWIN', None, 42),
- 'VerMaxtl': ('ControlReg', 'udw', 'MISCREG_VER_MAXTL', None, 43),
- 'VerMask': ('ControlReg', 'udw', 'MISCREG_VER_MASK', None, 44),
- 'VerImpl': ('ControlReg', 'udw', 'MISCREG_VER_MASK', None, 45),
- 'VerManuf': ('ControlReg', 'udw', 'MISCREG_VER_MANUF', None, 46),
- 'Fsr': ('ControlReg', 'udw', 'MISCREG_FSR', None, 47),
- 'FsrCexc': ('ControlReg', 'udw', 'MISCREG_FSR_CEXC', None, 48),
- 'FsrCexcNxc': ('ControlReg', 'udw', 'MISCREG_FSR_CEXC_NXC', None, 49),
- 'FsrCexcDzc': ('ControlReg', 'udw', 'MISCREG_FSR_CEXC_DZC', None, 50),
- 'FsrCexcUfc': ('ControlReg', 'udw', 'MISCREG_FSR_CEXC_UFC', None, 51),
- 'FsrCexcOfc': ('ControlReg', 'udw', 'MISCREG_FSR_CEXC_OFC', None, 52),
- 'FsrCexcNvc': ('ControlReg', 'udw', 'MISCREG_FSR_CEXC_NVC', None, 53),
- 'FsrAexc': ('ControlReg', 'udw', 'MISCREG_FSR_AEXC', None, 54),
- 'FsrAexcNxc': ('ControlReg', 'udw', 'MISCREG_FSR_AEXC_NXC', None, 55),
- 'FsrAexcDzc': ('ControlReg', 'udw', 'MISCREG_FSR_AEXC_DZC', None, 56),
- 'FsrAexcUfc': ('ControlReg', 'udw', 'MISCREG_FSR_AEXC_UFC', None, 57),
- 'FsrAexcOfc': ('ControlReg', 'udw', 'MISCREG_FSR_AEXC_OFC', None, 58),
- 'FsrAexcNvc': ('ControlReg', 'udw', 'MISCREC_FSR_AEXC_NVC', None, 59),
- 'FsrFcc0': ('ControlReg', 'udw', 'MISCREG_FSR_FCC0', None, 60),
- 'FsrQne': ('ControlReg', 'udw', 'MISCREG_FSR_QNE', None, 61),
- 'FsrFtt': ('ControlReg', 'udw', 'MISCREG_FSR_FTT', None, 62),
- 'FsrVer': ('ControlReg', 'udw', 'MISCREG_FSR_VER', None, 63),
- 'FsrNs': ('ControlReg', 'udw', 'MISCREG_FSR_NS', None, 64),
- 'FsrTem': ('ControlReg', 'udw', 'MISCREG_FSR_TEM', None, 65),
- 'FsrTemNxm': ('ControlReg', 'udw', 'MISCREG_FSR_TEM_NXM', None, 66),
- 'FsrTemDzm': ('ControlReg', 'udw', 'MISCREG_FSR_TEM_DZM', None, 67),
- 'FsrTemUfm': ('ControlReg', 'udw', 'MISCREG_FSR_TEM_UFM', None, 68),
- 'FsrTemOfm': ('ControlReg', 'udw', 'MISCREG_FSR_TEM_OFM', None, 69),
- 'FsrTemNvm': ('ControlReg', 'udw', 'MISCREG_FSR_TEM_NVM', None, 70),
- 'FsrRd': ('ControlReg', 'udw', 'MISCREG_FSR_RD', None, 71),
- 'FsrFcc1': ('ControlReg', 'udw', 'MISCREG_FSR_FCC1', None, 72),
- 'FsrFcc2': ('ControlReg', 'udw', 'MISCREG_FSR_FCC2', None, 73),
- 'FsrFcc3': ('ControlReg', 'udw', 'MISCREG_FSR_FCC3', None, 74),
- 'Fprs': ('ControlReg', 'udw', 'MISCREG_FPRS', None, 75),
- 'FprsDl': ('ControlReg', 'udw', 'MISCREG_FPRS_DL', None, 76),
- 'FprsDu': ('ControlReg', 'udw', 'MISCREG_FPRS_DU', None, 77),
- 'FprsFef': ('ControlReg', 'udw', 'MISCREG_FPRS_FEF', None, 78)
-}};
diff --git a/arch/sparc/isa_traits.hh b/arch/sparc/isa_traits.hh
deleted file mode 100644
index 453d14664..000000000
--- a/arch/sparc/isa_traits.hh
+++ /dev/null
@@ -1,187 +0,0 @@
-/*
- * Copyright (c) 2003-2005 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef __ARCH_SPARC_ISA_TRAITS_HH__
-#define __ARCH_SPARC_ISA_TRAITS_HH__
-
-#include "base/misc.hh"
-#include "config/full_system.hh"
-#include "sim/host.hh"
-
-class ExecContext;
-class FastCPU;
-//class FullCPU;
-class Checkpoint;
-
-class StaticInst;
-class StaticInstPtr;
-
-namespace BigEndianGuest {}
-
-#if !FULL_SYSTEM
-class SyscallReturn
-{
- public:
- template <class T>
- SyscallReturn(T v, bool s)
- {
- retval = (uint64_t)v;
- success = s;
- }
-
- template <class T>
- SyscallReturn(T v)
- {
- success = (v >= 0);
- retval = (uint64_t)v;
- }
-
- ~SyscallReturn() {}
-
- SyscallReturn& operator=(const SyscallReturn& s)
- {
- retval = s.retval;
- success = s.success;
- return *this;
- }
-
- bool successful() { return success; }
- uint64_t value() { return retval; }
-
- private:
- uint64_t retval;
- bool success;
-};
-
-#endif
-
-
-namespace SparcISA
-{
-
- // These enumerate all the registers for dependence tracking.
- enum DependenceTags {
- // 0..31 are the integer regs 0..31
- // 32..63 are the FP regs 0..31, i.e. use (reg + FP_Base_DepTag)
- FP_Base_DepTag = 32,
- Ctrl_Base_DepTag = 96,
- //XXX These are here solely to get compilation and won't work
- Fpcr_DepTag = 0,
- Uniq_DepTag = 0
- };
-
- //This makes sure the big endian versions of certain functions are used.
- using namespace BigEndianGuest;
-
- typedef uint32_t MachInst;
- typedef uint64_t ExtMachInst;
-
- const int NumIntRegs = 32;
- const int NumFloatRegs = 64;
- const int NumMiscRegs = 32;
-
- // semantically meaningful register indices
- const int ZeroReg = 0; // architecturally meaningful
- // the rest of these depend on the ABI
- const int StackPointerReg = 14;
- const int ReturnAddressReg = 31; // post call, precall is 15
- const int ReturnValueReg = 8; // Post return, 24 is pre-return.
- const int FramePointerReg = 30;
- const int ArgumentReg0 = 8;
- const int ArgumentReg1 = 9;
- const int ArgumentReg2 = 10;
- const int ArgumentReg3 = 11;
- const int ArgumentReg4 = 12;
- const int ArgumentReg5 = 13;
- // Some OS syscall use a second register (o1) to return a second value
- const int SyscallPseudoReturnReg = ArgumentReg1;
-
- //XXX These numbers are bogus
- const int MaxInstSrcRegs = 8;
- const int MaxInstDestRegs = 9;
-
- typedef uint64_t IntReg;
-
- // control register file contents
- typedef uint64_t MiscReg;
-
- typedef double FloatReg;
- typedef uint64_t FloatRegBits;
-
- //8K. This value is implmentation specific; and should probably
- //be somewhere else.
- const int LogVMPageSize = 13;
- const int VMPageSize = (1 << LogVMPageSize);
-
- //Why does both the previous set of constants and this one exist?
- const int PageShift = 13;
- const int PageBytes = ULL(1) << PageShift;
-
- const int BranchPredAddrShiftAmt = 2;
-
- const int MachineBytes = 8;
- const int WordBytes = 4;
- const int HalfwordBytes = 2;
- const int ByteBytes = 1;
-
- void serialize(std::ostream & os);
-
- void unserialize(Checkpoint *cp, const std::string &section);
-
- StaticInstPtr decodeInst(ExtMachInst);
-
- // return a no-op instruction... used for instruction fetch faults
- extern const MachInst NoopMachInst;
-}
-
-#include "arch/sparc/regfile.hh"
-
-namespace SparcISA
-{
-
-#if !FULL_SYSTEM
- static inline void setSyscallReturn(SyscallReturn return_value,
- RegFile *regs)
- {
- // check for error condition. SPARC syscall convention is to
- // indicate success/failure in reg the carry bit of the ccr
- // and put the return value itself in the standard return value reg ().
- if (return_value.successful()) {
- // no error
- regs->setMiscReg(MISCREG_CCR_XCC_C, 0);
- regs->setIntReg(ReturnValueReg, return_value.value());
- } else {
- // got an error, return details
- regs->setMiscReg(MISCREG_CCR_XCC_C, 1);
- regs->setIntReg(ReturnValueReg, return_value.value());
- }
- }
-#endif
-};
-
-#endif // __ARCH_SPARC_ISA_TRAITS_HH__
diff --git a/arch/sparc/linux/linux.cc b/arch/sparc/linux/linux.cc
deleted file mode 100644
index c7ed29358..000000000
--- a/arch/sparc/linux/linux.cc
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * Copyright (c) 2003-2005 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "arch/sparc/linux/linux.hh"
-
-// open(2) flags translation table
-OpenFlagTransTable SparcLinux::openFlagTable[] = {
-#ifdef _MSC_VER
- { SparcLinux::TGT_O_RDONLY, _O_RDONLY },
- { SparcLinux::TGT_O_WRONLY, _O_WRONLY },
- { SparcLinux::TGT_O_RDWR, _O_RDWR },
- { SparcLinux::TGT_O_APPEND, _O_APPEND },
- { SparcLinux::TGT_O_CREAT, _O_CREAT },
- { SparcLinux::TGT_O_TRUNC, _O_TRUNC },
- { SparcLinux::TGT_O_EXCL, _O_EXCL },
-#ifdef _O_NONBLOCK
- { SparcLinux::TGT_O_NONBLOCK, _O_NONBLOCK },
-#endif
-#ifdef _O_NOCTTY
- { SparcLinux::TGT_O_NOCTTY, _O_NOCTTY },
-#endif
-#ifdef _O_SYNC
- { SparcLinux::TGT_O_SYNC, _O_SYNC },
-#endif
-#else /* !_MSC_VER */
- { SparcLinux::TGT_O_RDONLY, O_RDONLY },
- { SparcLinux::TGT_O_WRONLY, O_WRONLY },
- { SparcLinux::TGT_O_RDWR, O_RDWR },
- { SparcLinux::TGT_O_APPEND, O_APPEND },
- { SparcLinux::TGT_O_CREAT, O_CREAT },
- { SparcLinux::TGT_O_TRUNC, O_TRUNC },
- { SparcLinux::TGT_O_EXCL, O_EXCL },
- { SparcLinux::TGT_O_NONBLOCK, O_NONBLOCK },
- { SparcLinux::TGT_O_NOCTTY, O_NOCTTY },
-#ifdef O_SYNC
- { SparcLinux::TGT_O_SYNC, O_SYNC },
-#endif
-#endif /* _MSC_VER */
-};
-
-const int SparcLinux::NUM_OPEN_FLAGS =
- (sizeof(SparcLinux::openFlagTable)/sizeof(SparcLinux::openFlagTable[0]));
-
diff --git a/arch/sparc/linux/linux.hh b/arch/sparc/linux/linux.hh
deleted file mode 100644
index 9cde5bb9c..000000000
--- a/arch/sparc/linux/linux.hh
+++ /dev/null
@@ -1,61 +0,0 @@
-/*
- * Copyright (c) 2003-2005 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef __ARCH_SPARC_LINUX_LINUX_HH__
-#define __ARCH_SPARC_LINUX_LINUX_HH__
-
-#include "kern/linux/linux.hh"
-
-class SparcLinux : public Linux
-{
- public:
-
- static OpenFlagTransTable openFlagTable[];
-
- static const int TGT_O_RDONLY = 0x00000000; //!< O_RDONLY
- static const int TGT_O_WRONLY = 0x00000001; //!< O_WRONLY
- static const int TGT_O_RDWR = 0x00000002; //!< O_RDWR
- static const int TGT_O_NONBLOCK = 0x00004000; //!< O_NONBLOCK
- static const int TGT_O_APPEND = 0x00000008; //!< O_APPEND
- static const int TGT_O_CREAT = 0x00000200; //!< O_CREAT
- static const int TGT_O_TRUNC = 0x00000400; //!< O_TRUNC
- static const int TGT_O_EXCL = 0x00000800; //!< O_EXCL
- static const int TGT_O_NOCTTY = 0x00008000; //!< O_NOCTTY
- static const int TGT_O_SYNC = 0x00002000; //!< O_SYNC
-// static const int TGT_O_DRD = 0x00010000; //!< O_DRD
-// static const int TGT_O_DIRECTIO = 0x00020000; //!< O_DIRECTIO
-// static const int TGT_O_CACHE = 0x00002000; //!< O_CACHE
-// static const int TGT_O_DSYNC = 0x00008000; //!< O_DSYNC
-// static const int TGT_O_RSYNC = 0x00040000; //!< O_RSYNC
-
- static const int NUM_OPEN_FLAGS;
-
- static const unsigned TGT_MAP_ANONYMOUS = 0x20;
-};
-
-#endif
diff --git a/arch/sparc/linux/process.cc b/arch/sparc/linux/process.cc
deleted file mode 100644
index 71be6a83a..000000000
--- a/arch/sparc/linux/process.cc
+++ /dev/null
@@ -1,407 +0,0 @@
-/*
- * Copyright (c) 2003-2005 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "arch/sparc/isa_traits.hh"
-#include "arch/sparc/linux/process.hh"
-#include "arch/sparc/regfile.hh"
-
-#include "base/trace.hh"
-#include "cpu/exec_context.hh"
-#include "kern/linux/linux.hh"
-
-#include "sim/process.hh"
-#include "sim/syscall_emul.hh"
-
-using namespace std;
-using namespace SparcISA;
-
-
-/// Target uname() handler.
-static SyscallReturn
-unameFunc(SyscallDesc *desc, int callnum, Process *process,
- ExecContext *xc)
-{
- TypedBufferArg<Linux::utsname> name(xc->getSyscallArg(0));
-
- strcpy(name->sysname, "Linux");
- strcpy(name->nodename, "m5.eecs.umich.edu");
- strcpy(name->release, "2.4.20");
- strcpy(name->version, "#1 Mon Aug 18 11:32:15 EDT 2003");
- strcpy(name->machine, "sparc");
-
- name.copyOut(xc->getMemPort());
-
- return 0;
-}
-
-
-SyscallReturn SparcISA::getresuidFunc(SyscallDesc *desc, int num,
- Process *p, ExecContext *xc)
-{
- const IntReg id = htog(100);
- Addr ruid = xc->getSyscallArg(0);
- Addr euid = xc->getSyscallArg(1);
- Addr suid = xc->getSyscallArg(2);
- //Handle the EFAULT case
- //Set the ruid
- if(ruid)
- {
- BufferArg ruidBuff(ruid, sizeof(IntReg));
- memcpy(ruidBuff.bufferPtr(), &id, sizeof(IntReg));
- ruidBuff.copyOut(xc->getMemPort());
- }
- //Set the euid
- if(euid)
- {
- BufferArg euidBuff(euid, sizeof(IntReg));
- memcpy(euidBuff.bufferPtr(), &id, sizeof(IntReg));
- euidBuff.copyOut(xc->getMemPort());
- }
- //Set the suid
- if(suid)
- {
- BufferArg suidBuff(suid, sizeof(IntReg));
- memcpy(suidBuff.bufferPtr(), &id, sizeof(IntReg));
- suidBuff.copyOut(xc->getMemPort());
- }
- return 0;
-}
-
-SyscallDesc SparcLinuxProcess::syscallDescs[] = {
- /* 0 */ SyscallDesc("restart_syscall", unimplementedFunc),
- /* 1 */ SyscallDesc("exit", exitFunc),
- /* 2 */ SyscallDesc("fork", unimplementedFunc),
- /* 3 */ SyscallDesc("read", readFunc),
- /* 4 */ SyscallDesc("write", writeFunc),
- /* 5 */ SyscallDesc("open", openFunc<SparcLinux>),
- /* 6 */ SyscallDesc("close", closeFunc),
- /* 7 */ SyscallDesc("wait4", unimplementedFunc),
- /* 8 */ SyscallDesc("creat", unimplementedFunc),
- /* 9 */ SyscallDesc("link", unimplementedFunc),
- /* 10 */ SyscallDesc("unlink", unlinkFunc),
- /* 11 */ SyscallDesc("execv", unimplementedFunc),
- /* 12 */ SyscallDesc("chdir", unimplementedFunc),
- /* 13 */ SyscallDesc("chown", chownFunc),
- /* 14 */ SyscallDesc("mknod", unimplementedFunc),
- /* 15 */ SyscallDesc("chmod", chmodFunc<Linux>),
- /* 16 */ SyscallDesc("lchown", unimplementedFunc),
- /* 17 */ SyscallDesc("brk", obreakFunc),
- /* 18 */ SyscallDesc("perfctr", unimplementedFunc),
- /* 19 */ SyscallDesc("lseek", lseekFunc),
- /* 20 */ SyscallDesc("getpid", getpidFunc),
- /* 21 */ SyscallDesc("capget", unimplementedFunc),
- /* 22 */ SyscallDesc("capset", unimplementedFunc),
- /* 23 */ SyscallDesc("setuid", setuidFunc),
- /* 24 */ SyscallDesc("getuid", getuidFunc),
- /* 25 */ SyscallDesc("time", unimplementedFunc),
- /* 26 */ SyscallDesc("ptrace", unimplementedFunc),
- /* 27 */ SyscallDesc("alarm", unimplementedFunc),
- /* 28 */ SyscallDesc("sigaltstack", unimplementedFunc),
- /* 29 */ SyscallDesc("pause", unimplementedFunc),
- /* 30 */ SyscallDesc("utime", unimplementedFunc),
- /* 31 */ SyscallDesc("lchown32", unimplementedFunc),
- /* 32 */ SyscallDesc("fchown32", unimplementedFunc),
- /* 33 */ SyscallDesc("access", unimplementedFunc),
- /* 34 */ SyscallDesc("nice", unimplementedFunc),
- /* 35 */ SyscallDesc("chown32", unimplementedFunc),
- /* 36 */ SyscallDesc("sync", unimplementedFunc),
- /* 37 */ SyscallDesc("kill", unimplementedFunc),
- /* 38 */ SyscallDesc("stat", unimplementedFunc),
- /* 39 */ SyscallDesc("sendfile", unimplementedFunc),
- /* 40 */ SyscallDesc("lstat", unimplementedFunc),
- /* 41 */ SyscallDesc("dup", unimplementedFunc),
- /* 42 */ SyscallDesc("pipe", pipePseudoFunc),
- /* 43 */ SyscallDesc("times", unimplementedFunc),
- /* 44 */ SyscallDesc("getuid32", unimplementedFunc),
- /* 45 */ SyscallDesc("umount2", unimplementedFunc),
- /* 46 */ SyscallDesc("setgid", unimplementedFunc),
- /* 47 */ SyscallDesc("getgid", getgidFunc),
- /* 48 */ SyscallDesc("signal", unimplementedFunc),
- /* 49 */ SyscallDesc("geteuid", geteuidFunc),
- /* 50 */ SyscallDesc("getegid", getegidFunc),
- /* 51 */ SyscallDesc("acct", unimplementedFunc),
- /* 52 */ SyscallDesc("memory_ordering", unimplementedFunc),
- /* 53 */ SyscallDesc("getgid32", unimplementedFunc),
- /* 54 */ SyscallDesc("ioctl", unimplementedFunc),
- /* 55 */ SyscallDesc("reboot", unimplementedFunc),
- /* 56 */ SyscallDesc("mmap2", unimplementedFunc),
- /* 57 */ SyscallDesc("symlink", unimplementedFunc),
- /* 58 */ SyscallDesc("readlink", unimplementedFunc),
- /* 59 */ SyscallDesc("execve", unimplementedFunc),
- /* 60 */ SyscallDesc("umask", unimplementedFunc),
- /* 61 */ SyscallDesc("chroot", unimplementedFunc),
- /* 62 */ SyscallDesc("fstat", fstatFunc<SparcLinux>),
- /* 63 */ SyscallDesc("fstat64", unimplementedFunc),
- /* 64 */ SyscallDesc("getpagesize", unimplementedFunc),
- /* 65 */ SyscallDesc("msync", unimplementedFunc),
- /* 66 */ SyscallDesc("vfork", unimplementedFunc),
- /* 67 */ SyscallDesc("pread64", unimplementedFunc),
- /* 68 */ SyscallDesc("pwrite64", unimplementedFunc),
- /* 69 */ SyscallDesc("geteuid32", unimplementedFunc),
- /* 70 */ SyscallDesc("getdgid32", unimplementedFunc),
- /* 71 */ SyscallDesc("mmap", mmapFunc<SparcLinux>),
- /* 72 */ SyscallDesc("setreuid32", unimplementedFunc),
- /* 73 */ SyscallDesc("munmap", munmapFunc),
- /* 74 */ SyscallDesc("mprotect", unimplementedFunc),
- /* 75 */ SyscallDesc("madvise", unimplementedFunc),
- /* 76 */ SyscallDesc("vhangup", unimplementedFunc),
- /* 77 */ SyscallDesc("truncate64", unimplementedFunc),
- /* 78 */ SyscallDesc("mincore", unimplementedFunc),
- /* 79 */ SyscallDesc("getgroups", unimplementedFunc),
- /* 80 */ SyscallDesc("setgroups", unimplementedFunc),
- /* 81 */ SyscallDesc("getpgrp", unimplementedFunc),
- /* 82 */ SyscallDesc("setgroups32", unimplementedFunc),
- /* 83 */ SyscallDesc("setitimer", unimplementedFunc),
- /* 84 */ SyscallDesc("ftruncate64", unimplementedFunc),
- /* 85 */ SyscallDesc("swapon", unimplementedFunc),
- /* 86 */ SyscallDesc("getitimer", unimplementedFunc),
- /* 87 */ SyscallDesc("setuid32", unimplementedFunc),
- /* 88 */ SyscallDesc("sethostname", unimplementedFunc),
- /* 89 */ SyscallDesc("setgid32", unimplementedFunc),
- /* 90 */ SyscallDesc("dup2", unimplementedFunc),
- /* 91 */ SyscallDesc("setfsuid32", unimplementedFunc),
- /* 92 */ SyscallDesc("fcntl", unimplementedFunc),
- /* 93 */ SyscallDesc("select", unimplementedFunc),
- /* 94 */ SyscallDesc("setfsgid32", unimplementedFunc),
- /* 95 */ SyscallDesc("fsync", unimplementedFunc),
- /* 96 */ SyscallDesc("setpriority", unimplementedFunc),
- /* 97 */ SyscallDesc("socket", unimplementedFunc),
- /* 98 */ SyscallDesc("connect", unimplementedFunc),
- /* 99 */ SyscallDesc("accept", unimplementedFunc),
- /* 100 */ SyscallDesc("getpriority", unimplementedFunc),
- /* 101 */ SyscallDesc("rt_sigreturn", unimplementedFunc),
- /* 102 */ SyscallDesc("rt_sigaction", unimplementedFunc),
- /* 103 */ SyscallDesc("rt_sigprocmask", unimplementedFunc),
- /* 104 */ SyscallDesc("rt_sigpending", unimplementedFunc),
- /* 105 */ SyscallDesc("rt_sigtimedwait", unimplementedFunc),
- /* 106 */ SyscallDesc("rt_sigqueueinfo", unimplementedFunc),
- /* 107 */ SyscallDesc("rt_sigsuspend", unimplementedFunc),
- /* 108 */ SyscallDesc("setresuid", unimplementedFunc),
- /* 109 */ SyscallDesc("getresuid", getresuidFunc),
- /* 110 */ SyscallDesc("setresgid", unimplementedFunc),
- /* 111 */ SyscallDesc("getresgid", unimplementedFunc),
- /* 112 */ SyscallDesc("setregid32", unimplementedFunc),
- /* 113 */ SyscallDesc("recvmsg", unimplementedFunc),
- /* 114 */ SyscallDesc("sendmsg", unimplementedFunc),
- /* 115 */ SyscallDesc("getgroups32", unimplementedFunc),
- /* 116 */ SyscallDesc("gettimeofday", unimplementedFunc),
- /* 117 */ SyscallDesc("getrusage", unimplementedFunc),
- /* 118 */ SyscallDesc("getsockopt", unimplementedFunc),
- /* 119 */ SyscallDesc("getcwd", unimplementedFunc),
- /* 120 */ SyscallDesc("readv", unimplementedFunc),
- /* 121 */ SyscallDesc("writev", unimplementedFunc),
- /* 122 */ SyscallDesc("settimeofday", unimplementedFunc),
- /* 123 */ SyscallDesc("fchown", unimplementedFunc),
- /* 124 */ SyscallDesc("fchmod", unimplementedFunc),
- /* 125 */ SyscallDesc("recvfrom", unimplementedFunc),
- /* 126 */ SyscallDesc("setreuid", unimplementedFunc),
- /* 127 */ SyscallDesc("setregid", unimplementedFunc),
- /* 128 */ SyscallDesc("rename", unimplementedFunc),
- /* 129 */ SyscallDesc("truncate", unimplementedFunc),
- /* 130 */ SyscallDesc("ftruncate", unimplementedFunc),
- /* 131 */ SyscallDesc("flock", unimplementedFunc),
- /* 132 */ SyscallDesc("lstat64", unimplementedFunc),
- /* 133 */ SyscallDesc("sendto", unimplementedFunc),
- /* 134 */ SyscallDesc("shutdown", unimplementedFunc),
- /* 135 */ SyscallDesc("socketpair", unimplementedFunc),
- /* 136 */ SyscallDesc("mkdir", unimplementedFunc),
- /* 137 */ SyscallDesc("rmdir", unimplementedFunc),
- /* 138 */ SyscallDesc("utimes", unimplementedFunc),
- /* 139 */ SyscallDesc("stat64", unimplementedFunc),
- /* 140 */ SyscallDesc("sendfile64", unimplementedFunc),
- /* 141 */ SyscallDesc("getpeername", unimplementedFunc),
- /* 142 */ SyscallDesc("futex", unimplementedFunc),
- /* 143 */ SyscallDesc("gettid", unimplementedFunc),
- /* 144 */ SyscallDesc("getrlimit", unimplementedFunc),
- /* 145 */ SyscallDesc("setrlimit", unimplementedFunc),
- /* 146 */ SyscallDesc("pivot_root", unimplementedFunc),
- /* 147 */ SyscallDesc("prctl", unimplementedFunc),
- /* 148 */ SyscallDesc("pciconfig_read", unimplementedFunc),
- /* 149 */ SyscallDesc("pciconfig_write", unimplementedFunc),
- /* 150 */ SyscallDesc("getsockname", unimplementedFunc),
- /* 151 */ SyscallDesc("inotify_init", unimplementedFunc),
- /* 152 */ SyscallDesc("inotify_add_watch", unimplementedFunc),
- /* 153 */ SyscallDesc("poll", unimplementedFunc),
- /* 154 */ SyscallDesc("getdents64", unimplementedFunc),
- /* 155 */ SyscallDesc("fcntl64", unimplementedFunc),
- /* 156 */ SyscallDesc("inotify_rm_watch", unimplementedFunc),
- /* 157 */ SyscallDesc("statfs", unimplementedFunc),
- /* 158 */ SyscallDesc("fstatfs", unimplementedFunc),
- /* 159 */ SyscallDesc("umount", unimplementedFunc),
- /* 160 */ SyscallDesc("sched_set_affinity", unimplementedFunc),
- /* 161 */ SyscallDesc("sched_get_affinity", unimplementedFunc),
- /* 162 */ SyscallDesc("getdomainname", unimplementedFunc),
- /* 163 */ SyscallDesc("setdomainname", unimplementedFunc),
- /* 164 */ SyscallDesc("utrap_install", unimplementedFunc),
- /* 165 */ SyscallDesc("quotactl", unimplementedFunc),
- /* 166 */ SyscallDesc("set_tid_address", unimplementedFunc),
- /* 167 */ SyscallDesc("mount", unimplementedFunc),
- /* 168 */ SyscallDesc("ustat", unimplementedFunc),
- /* 169 */ SyscallDesc("setxattr", unimplementedFunc),
- /* 170 */ SyscallDesc("lsetxattr", unimplementedFunc),
- /* 171 */ SyscallDesc("fsetxattr", unimplementedFunc),
- /* 172 */ SyscallDesc("getxattr", unimplementedFunc),
- /* 173 */ SyscallDesc("lgetxattr", unimplementedFunc),
- /* 174 */ SyscallDesc("getdents", unimplementedFunc),
- /* 175 */ SyscallDesc("setsid", unimplementedFunc),
- /* 176 */ SyscallDesc("fchdir", unimplementedFunc),
- /* 177 */ SyscallDesc("fgetxattr", unimplementedFunc),
- /* 178 */ SyscallDesc("listxattr", unimplementedFunc),
- /* 179 */ SyscallDesc("llistxattr", unimplementedFunc),
- /* 180 */ SyscallDesc("flistxattr", unimplementedFunc),
- /* 181 */ SyscallDesc("removexattr", unimplementedFunc),
- /* 182 */ SyscallDesc("lremovexattr", unimplementedFunc),
- /* 183 */ SyscallDesc("sigpending", unimplementedFunc),
- /* 184 */ SyscallDesc("query_module", unimplementedFunc),
- /* 185 */ SyscallDesc("setpgid", unimplementedFunc),
- /* 186 */ SyscallDesc("fremovexattr", unimplementedFunc),
- /* 187 */ SyscallDesc("tkill", unimplementedFunc),
- /* 188 */ SyscallDesc("exit_group", exitFunc),
- /* 189 */ SyscallDesc("uname", unameFunc),
- /* 190 */ SyscallDesc("init_module", unimplementedFunc),
- /* 191 */ SyscallDesc("personality", unimplementedFunc),
- /* 192 */ SyscallDesc("remap_file_pages", unimplementedFunc),
- /* 193 */ SyscallDesc("epoll_create", unimplementedFunc),
- /* 194 */ SyscallDesc("epoll_ctl", unimplementedFunc),
- /* 195 */ SyscallDesc("epoll_wait", unimplementedFunc),
- /* 196 */ SyscallDesc("ioprio_set", unimplementedFunc),
- /* 197 */ SyscallDesc("getppid", getppidFunc),
- /* 198 */ SyscallDesc("sigaction", unimplementedFunc),
- /* 199 */ SyscallDesc("sgetmask", unimplementedFunc),
- /* 200 */ SyscallDesc("ssetmask", unimplementedFunc),
- /* 201 */ SyscallDesc("sigsuspend", unimplementedFunc),
- /* 202 */ SyscallDesc("oldlstat", unimplementedFunc),
- /* 203 */ SyscallDesc("uselib", unimplementedFunc),
- /* 204 */ SyscallDesc("readdir", unimplementedFunc),
- /* 205 */ SyscallDesc("readahead", unimplementedFunc),
- /* 206 */ SyscallDesc("socketcall", unimplementedFunc),
- /* 207 */ SyscallDesc("syslog", unimplementedFunc),
- /* 208 */ SyscallDesc("lookup_dcookie", unimplementedFunc),
- /* 209 */ SyscallDesc("fadvise64", unimplementedFunc),
- /* 210 */ SyscallDesc("fadvise64_64", unimplementedFunc),
- /* 211 */ SyscallDesc("tgkill", unimplementedFunc),
- /* 212 */ SyscallDesc("waitpid", unimplementedFunc),
- /* 213 */ SyscallDesc("swapoff", unimplementedFunc),
- /* 214 */ SyscallDesc("sysinfo", unimplementedFunc),
- /* 215 */ SyscallDesc("ipc", unimplementedFunc),
- /* 216 */ SyscallDesc("sigreturn", unimplementedFunc),
- /* 217 */ SyscallDesc("clone", unimplementedFunc),
- /* 218 */ SyscallDesc("ioprio_get", unimplementedFunc),
- /* 219 */ SyscallDesc("adjtimex", unimplementedFunc),
- /* 220 */ SyscallDesc("sigprocmask", unimplementedFunc),
- /* 221 */ SyscallDesc("create_module", unimplementedFunc),
- /* 222 */ SyscallDesc("delete_module", unimplementedFunc),
- /* 223 */ SyscallDesc("get_kernel_syms", unimplementedFunc),
- /* 224 */ SyscallDesc("getpgid", unimplementedFunc),
- /* 225 */ SyscallDesc("bdflush", unimplementedFunc),
- /* 226 */ SyscallDesc("sysfs", unimplementedFunc),
- /* 227 */ SyscallDesc("afs_syscall", unimplementedFunc),
- /* 228 */ SyscallDesc("setfsuid", unimplementedFunc),
- /* 229 */ SyscallDesc("setfsgid", unimplementedFunc),
- /* 230 */ SyscallDesc("_newselect", unimplementedFunc),
- /* 231 */ SyscallDesc("time", unimplementedFunc),
- /* 232 */ SyscallDesc("oldstat", unimplementedFunc),
- /* 233 */ SyscallDesc("stime", unimplementedFunc),
- /* 234 */ SyscallDesc("statfs64", unimplementedFunc),
- /* 235 */ SyscallDesc("fstatfs64", unimplementedFunc),
- /* 236 */ SyscallDesc("_llseek", unimplementedFunc),
- /* 237 */ SyscallDesc("mlock", unimplementedFunc),
- /* 238 */ SyscallDesc("munlock", unimplementedFunc),
- /* 239 */ SyscallDesc("mlockall", unimplementedFunc),
- /* 240 */ SyscallDesc("munlockall", unimplementedFunc),
- /* 241 */ SyscallDesc("sched_setparam", unimplementedFunc),
- /* 242 */ SyscallDesc("sched_getparam", unimplementedFunc),
- /* 243 */ SyscallDesc("sched_setscheduler", unimplementedFunc),
- /* 244 */ SyscallDesc("sched_getscheduler", unimplementedFunc),
- /* 245 */ SyscallDesc("sched_yield", unimplementedFunc),
- /* 246 */ SyscallDesc("sched_get_priority_max", unimplementedFunc),
- /* 247 */ SyscallDesc("sched_get_priority_min", unimplementedFunc),
- /* 248 */ SyscallDesc("sched_rr_get_interval", unimplementedFunc),
- /* 249 */ SyscallDesc("nanosleep", unimplementedFunc),
- /* 250 */ SyscallDesc("mremap", unimplementedFunc),
- /* 251 */ SyscallDesc("_sysctl", unimplementedFunc),
- /* 252 */ SyscallDesc("getsid", unimplementedFunc),
- /* 253 */ SyscallDesc("fdatasync", unimplementedFunc),
- /* 254 */ SyscallDesc("nfsservctl", unimplementedFunc),
- /* 255 */ SyscallDesc("aplib", unimplementedFunc),
- /* 256 */ SyscallDesc("clock_settime", unimplementedFunc),
- /* 257 */ SyscallDesc("clock_gettime", unimplementedFunc),
- /* 258 */ SyscallDesc("clock_getres", unimplementedFunc),
- /* 259 */ SyscallDesc("clock_nanosleep", unimplementedFunc),
- /* 260 */ SyscallDesc("sched_getaffinity", unimplementedFunc),
- /* 261 */ SyscallDesc("sched_setaffinity", unimplementedFunc),
- /* 262 */ SyscallDesc("timer_settime", unimplementedFunc),
- /* 263 */ SyscallDesc("timer_gettime", unimplementedFunc),
- /* 264 */ SyscallDesc("timer_getoverrun", unimplementedFunc),
- /* 265 */ SyscallDesc("timer_delete", unimplementedFunc),
- /* 266 */ SyscallDesc("timer_create", unimplementedFunc),
- /* 267 */ SyscallDesc("vserver", unimplementedFunc),
- /* 268 */ SyscallDesc("io_setup", unimplementedFunc),
- /* 269 */ SyscallDesc("io_destroy", unimplementedFunc),
- /* 270 */ SyscallDesc("io_submit", unimplementedFunc),
- /* 271 */ SyscallDesc("io_cancel", unimplementedFunc),
- /* 272 */ SyscallDesc("io_getevents", unimplementedFunc),
- /* 273 */ SyscallDesc("mq_open", unimplementedFunc),
- /* 274 */ SyscallDesc("mq_unlink", unimplementedFunc),
- /* 275 */ SyscallDesc("mq_timedsend", unimplementedFunc),
- /* 276 */ SyscallDesc("mq_timedreceive", unimplementedFunc),
- /* 277 */ SyscallDesc("mq_notify", unimplementedFunc),
- /* 278 */ SyscallDesc("mq_getsetattr", unimplementedFunc),
- /* 279 */ SyscallDesc("waitid", unimplementedFunc),
- /* 280 */ SyscallDesc("sys_setaltroot", unimplementedFunc),
- /* 281 */ SyscallDesc("add_key", unimplementedFunc),
- /* 282 */ SyscallDesc("request_key", unimplementedFunc),
- /* 283 */ SyscallDesc("keyctl", unimplementedFunc)
-};
-
-SparcLinuxProcess::SparcLinuxProcess(const std::string &name,
- ObjectFile *objFile,
- System * system,
- int stdin_fd,
- int stdout_fd,
- int stderr_fd,
- std::vector<std::string> &argv,
- std::vector<std::string> &envp)
- : SparcLiveProcess(name, objFile, system,
- stdin_fd, stdout_fd, stderr_fd, argv, envp),
- Num_Syscall_Descs(sizeof(syscallDescs) / sizeof(SyscallDesc))
-{
- // The sparc syscall table must be <= 284 entries because that is all there
- // is space for.
- assert(Num_Syscall_Descs <= 284);
-}
-
-
-
-SyscallDesc*
-SparcLinuxProcess::getDesc(int callnum)
-{
- if (callnum < 0 || callnum > Num_Syscall_Descs)
- return NULL;
- return &syscallDescs[callnum];
-}
diff --git a/arch/sparc/linux/process.hh b/arch/sparc/linux/process.hh
deleted file mode 100644
index 23ce66d02..000000000
--- a/arch/sparc/linux/process.hh
+++ /dev/null
@@ -1,65 +0,0 @@
-/*
- * Copyright (c) 2003-2004 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef __SPARC_LINUX_PROCESS_HH__
-#define __SPARC_LINUX_PROCESS_HH__
-
-#include "arch/sparc/linux/linux.hh"
-#include "arch/sparc/process.hh"
-#include "sim/process.hh"
-
-namespace SparcISA {
-
-/// A process with emulated SPARC/Linux syscalls.
-class SparcLinuxProcess : public SparcLiveProcess
-{
- public:
- /// Constructor.
- SparcLinuxProcess(const std::string &name,
- ObjectFile *objFile,
- System * system,
- int stdin_fd, int stdout_fd, int stderr_fd,
- std::vector<std::string> &argv,
- std::vector<std::string> &envp);
-
- virtual SyscallDesc* getDesc(int callnum);
-
- /// The target system's hostname.
- static const char *hostname;
-
- /// Array of syscall descriptors, indexed by call number.
- static SyscallDesc syscallDescs[];
-
- const int Num_Syscall_Descs;
-};
-
-SyscallReturn getresuidFunc(SyscallDesc *desc, int num,
- Process *p, ExecContext *xc);
-
-} // namespace SparcISA
-#endif // __ALPHA_LINUX_PROCESS_HH__
diff --git a/arch/sparc/process.cc b/arch/sparc/process.cc
deleted file mode 100644
index 250c1bec4..000000000
--- a/arch/sparc/process.cc
+++ /dev/null
@@ -1,388 +0,0 @@
-/*
- * Copyright (c) 2003-2004 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "arch/sparc/isa_traits.hh"
-#include "arch/sparc/process.hh"
-#include "arch/sparc/linux/process.hh"
-#include "arch/sparc/solaris/process.hh"
-#include "base/loader/object_file.hh"
-#include "base/misc.hh"
-#include "cpu/exec_context.hh"
-#include "mem/page_table.hh"
-#include "mem/translating_port.hh"
-#include "sim/builder.hh"
-#include "sim/system.hh"
-
-using namespace std;
-using namespace SparcISA;
-
-SparcLiveProcess *
-SparcLiveProcess::create(const std::string &nm, System *system, int stdin_fd,
- int stdout_fd, int stderr_fd, std::string executable,
- std::vector<std::string> &argv, std::vector<std::string> &envp)
-{
- SparcLiveProcess *process = NULL;
-
- ObjectFile *objFile = createObjectFile(executable);
- if (objFile == NULL) {
- fatal("Can't load object file %s", executable);
- }
-
-
- if (objFile->getArch() != ObjectFile::SPARC)
- fatal("Object file with arch %x does not match architecture %x.",
- objFile->getArch(), ObjectFile::SPARC);
- switch (objFile->getOpSys()) {
- case ObjectFile::Linux:
- process = new SparcLinuxProcess(nm, objFile, system,
- stdin_fd, stdout_fd, stderr_fd,
- argv, envp);
- break;
-
-
- case ObjectFile::Solaris:
- process = new SparcSolarisProcess(nm, objFile, system,
- stdin_fd, stdout_fd, stderr_fd,
- argv, envp);
- break;
- default:
- fatal("Unknown/unsupported operating system.");
- }
-
- if (process == NULL)
- fatal("Unknown error creating process object.");
- return process;
-}
-
-SparcLiveProcess::SparcLiveProcess(const std::string &nm, ObjectFile *objFile,
- System *_system, int stdin_fd, int stdout_fd, int stderr_fd,
- std::vector<std::string> &argv, std::vector<std::string> &envp)
- : LiveProcess(nm, objFile, _system, stdin_fd, stdout_fd, stderr_fd,
- argv, envp)
-{
-
- // XXX all the below need to be updated for SPARC - Ali
- brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
- brk_point = roundUp(brk_point, VMPageSize);
-
- // Set up stack. On SPARC Linux, stack goes from the top of memory
- // downward, less the hole for the kernel address space.
- stack_base = ((Addr)0x80000000000ULL);
-
- // Set up region for mmaps. Tru64 seems to start just above 0 and
- // grow up from there.
- mmap_start = mmap_end = 0x800000;
-
- // Set pointer for next thread stack. Reserve 8M for main stack.
- next_thread_stack_base = stack_base - (8 * 1024 * 1024);
-}
-
-void
-SparcLiveProcess::startup()
-{
- argsInit(MachineBytes, VMPageSize);
-
- //From the SPARC ABI
-
- //The process runs in user mode
- execContexts[0]->setMiscRegWithEffect(MISCREG_PSTATE_PRIV, 0);
- //Interrupts are enabled
- execContexts[0]->setMiscRegWithEffect(MISCREG_PSTATE_IE, 1);
- //Round to nearest
- execContexts[0]->setMiscRegWithEffect(MISCREG_FSR_RD, 0);
- //Floating point traps are not enabled
- execContexts[0]->setMiscRegWithEffect(MISCREG_FSR_TEM, 0);
- //Turn non standard mode off
- execContexts[0]->setMiscRegWithEffect(MISCREG_FSR_NS, 0);
- //The floating point queue is empty
- execContexts[0]->setMiscRegWithEffect(MISCREG_FSR_QNE, 0);
- //There are no accrued eexecContext[0]eptions
- execContexts[0]->setMiscRegWithEffect(MISCREG_FSR_AEXC, 0);
- //There are no current eexecContext[0]eptions
- execContexts[0]->setMiscRegWithEffect(MISCREG_FSR_CEXC, 0);
-
- /*
- * Register window management registers
- */
-
- //No windows contain info from other programs
- execContexts[0]->setMiscRegWithEffect(MISCREG_OTHERWIN, 0);
- //There are no windows to pop
- execContexts[0]->setMiscRegWithEffect(MISCREG_CANRESTORE, 0);
- //All windows are available to save into
- execContexts[0]->setMiscRegWithEffect(MISCREG_CANSAVE, NWindows - 2);
- //All windows are "clean"
- execContexts[0]->setMiscRegWithEffect(MISCREG_CLEANWIN, NWindows);
- //Start with register window 0
- execContexts[0]->setMiscRegWithEffect(MISCREG_CWP, 0);
-}
-
-m5_auxv_t buildAuxVect(int64_t type, int64_t val)
-{
- m5_auxv_t result;
- result.a_type = TheISA::htog(type);
- result.a_val = TheISA::htog(val);
- return result;
-}
-
-void
-SparcLiveProcess::argsInit(int intSize, int pageSize)
-{
- Process::startup();
-
- Addr alignmentMask = ~(intSize - 1);
-
- // load object file into target memory
- objFile->loadSections(initVirtMem);
-
- //These are the auxilliary vector types
- enum auxTypes
- {
- SPARC_AT_HWCAP = 16,
- SPARC_AT_PAGESZ = 6,
- SPARC_AT_CLKTCK = 17,
- SPARC_AT_PHDR = 3,
- SPARC_AT_PHENT = 4,
- SPARC_AT_PHNUM = 5,
- SPARC_AT_BASE = 7,
- SPARC_AT_FLAGS = 8,
- SPARC_AT_ENTRY = 9,
- SPARC_AT_UID = 11,
- SPARC_AT_EUID = 12,
- SPARC_AT_GID = 13,
- SPARC_AT_EGID = 14
- };
-
- enum hardwareCaps
- {
- M5_HWCAP_SPARC_FLUSH = 1,
- M5_HWCAP_SPARC_STBAR = 2,
- M5_HWCAP_SPARC_SWAP = 4,
- M5_HWCAP_SPARC_MULDIV = 8,
- M5_HWCAP_SPARC_V9 = 16,
- //This one should technically only be set
- //if there is a cheetah or cheetah_plus tlb,
- //but we'll use it all the time
- M5_HWCAP_SPARC_ULTRA3 = 32
- };
-
- const int64_t hwcap =
- M5_HWCAP_SPARC_FLUSH |
- M5_HWCAP_SPARC_STBAR |
- M5_HWCAP_SPARC_SWAP |
- M5_HWCAP_SPARC_MULDIV |
- M5_HWCAP_SPARC_V9 |
- M5_HWCAP_SPARC_ULTRA3;
-
- //Setup the auxilliary vectors. These will already have
- //endian conversion.
- auxv.push_back(buildAuxVect(SPARC_AT_EGID, 100));
- auxv.push_back(buildAuxVect(SPARC_AT_GID, 100));
- auxv.push_back(buildAuxVect(SPARC_AT_EUID, 100));
- auxv.push_back(buildAuxVect(SPARC_AT_UID, 100));
- //This would work, but the entry point is a protected member
- //auxv.push_back(buildAuxVect(SPARC_AT_ENTRY, objFile->entry));
- auxv.push_back(buildAuxVect(SPARC_AT_FLAGS, 0));
- //This is the address of the elf "interpreter", which I don't
- //think we currently set up. It should be set to 0 (I think)
- //auxv.push_back(buildAuxVect(SPARC_AT_BASE, 0));
- //This is the number of headers which were in the original elf
- //file. This information isn't avaibale by this point.
- //auxv.push_back(buildAuxVect(SPARC_AT_PHNUM, 3));
- //This is the size of a program header entry. This isn't easy
- //to compute here.
- //auxv.push_back(buildAuxVect(SPARC_AT_PHENT, blah));
- //This is should be set to load_addr (whatever that is) +
- //e_phoff. I think it's a pointer to the program headers.
- //auxv.push_back(buildAuxVect(SPARC_AT_PHDR, blah));
- //This should be easy to get right, but I won't set it for now
- //auxv.push_back(buildAuxVect(SPARC_AT_CLKTCK, blah));
- auxv.push_back(buildAuxVect(SPARC_AT_PAGESZ, SparcISA::VMPageSize));
- auxv.push_back(buildAuxVect(SPARC_AT_HWCAP, hwcap));
-
- //Figure out how big the initial stack needs to be
-
- //Each auxilliary vector is two 8 byte words
- int aux_data_size = 2 * intSize * auxv.size();
- int env_data_size = 0;
- for (int i = 0; i < envp.size(); ++i) {
- env_data_size += envp[i].size() + 1;
- }
- int arg_data_size = 0;
- for (int i = 0; i < argv.size(); ++i) {
- arg_data_size += argv[i].size() + 1;
- }
-
- int aux_array_size = intSize * 2 * (auxv.size() + 1);
-
- int argv_array_size = intSize * (argv.size() + 1);
- int envp_array_size = intSize * (envp.size() + 1);
-
- int argc_size = intSize;
- int window_save_size = intSize * 16;
-
- int info_block_size =
- (aux_data_size +
- env_data_size +
- arg_data_size +
- ~alignmentMask) & alignmentMask;
-
- int info_block_padding =
- info_block_size -
- aux_data_size -
- env_data_size -
- arg_data_size;
-
- int space_needed =
- info_block_size +
- aux_array_size +
- envp_array_size +
- argv_array_size +
- argc_size +
- window_save_size;
-
- stack_min = stack_base - space_needed;
- stack_min &= alignmentMask;
- stack_size = stack_base - stack_min;
-
- // map memory
- pTable->allocate(roundDown(stack_min, pageSize),
- roundUp(stack_size, pageSize));
-
- // map out initial stack contents
- Addr aux_data_base = stack_base - aux_data_size - info_block_padding;
- Addr env_data_base = aux_data_base - env_data_size;
- Addr arg_data_base = env_data_base - arg_data_size;
- Addr auxv_array_base = arg_data_base - aux_array_size;
- Addr envp_array_base = auxv_array_base - envp_array_size;
- Addr argv_array_base = envp_array_base - argv_array_size;
- Addr argc_base = argv_array_base - argc_size;
- Addr window_save_base = argc_base - window_save_size;
-
- DPRINTF(Sparc, "The addresses of items on the initial stack:\n");
- DPRINTF(Sparc, "0x%x - aux data\n", aux_data_base);
- DPRINTF(Sparc, "0x%x - env data\n", env_data_base);
- DPRINTF(Sparc, "0x%x - arg data\n", arg_data_base);
- DPRINTF(Sparc, "0x%x - auxv array\n", auxv_array_base);
- DPRINTF(Sparc, "0x%x - envp array\n", envp_array_base);
- DPRINTF(Sparc, "0x%x - argv array\n", argv_array_base);
- DPRINTF(Sparc, "0x%x - argc \n", argc_base);
- DPRINTF(Sparc, "0x%x - window save\n", window_save_base);
- DPRINTF(Sparc, "0x%x - stack min\n", stack_min);
-
- // write contents to stack
- uint64_t argc = argv.size();
- uint64_t guestArgc = TheISA::htog(argc);
-
- //Copy the aux stuff
- for(int x = 0; x < auxv.size(); x++)
- {
- initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize,
- (uint8_t*)&(auxv[x].a_type), intSize);
- initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
- (uint8_t*)&(auxv[x].a_val), intSize);
- }
- //Write out the terminating zeroed auxilliary vector
- const uint64_t zero = 0;
- initVirtMem->writeBlob(auxv_array_base + 2 * intSize * auxv.size(),
- (uint8_t*)&zero, 2 * intSize);
-
- copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
- copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
-
- initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
-
- execContexts[0]->setIntReg(ArgumentReg0, argc);
- execContexts[0]->setIntReg(ArgumentReg1, argv_array_base);
- execContexts[0]->setIntReg(StackPointerReg, stack_min - StackBias);
-
- Addr prog_entry = objFile->entryPoint();
- execContexts[0]->setPC(prog_entry);
- execContexts[0]->setNextPC(prog_entry + sizeof(MachInst));
- execContexts[0]->setNextNPC(prog_entry + (2 * sizeof(MachInst)));
-
-// num_processes++;
-}
-
-
-BEGIN_DECLARE_SIM_OBJECT_PARAMS(SparcLiveProcess)
-
- VectorParam<string> cmd;
- Param<string> executable;
- Param<string> input;
- Param<string> output;
- VectorParam<string> env;
- SimObjectParam<System *> system;
-
-END_DECLARE_SIM_OBJECT_PARAMS(SparcLiveProcess)
-
-
-BEGIN_INIT_SIM_OBJECT_PARAMS(SparcLiveProcess)
-
- INIT_PARAM(cmd, "command line (executable plus arguments)"),
- INIT_PARAM(executable, "executable (overrides cmd[0] if set)"),
- INIT_PARAM(input, "filename for stdin (dflt: use sim stdin)"),
- INIT_PARAM(output, "filename for stdout/stderr (dflt: use sim stdout)"),
- INIT_PARAM(env, "environment settings"),
- INIT_PARAM(system, "system")
-
-END_INIT_SIM_OBJECT_PARAMS(SparcLiveProcess)
-
-
-CREATE_SIM_OBJECT(SparcLiveProcess)
-{
- string in = input;
- string out = output;
-
- // initialize file descriptors to default: same as simulator
- int stdin_fd, stdout_fd, stderr_fd;
-
- if (in == "stdin" || in == "cin")
- stdin_fd = STDIN_FILENO;
- else
- stdin_fd = Process::openInputFile(input);
-
- if (out == "stdout" || out == "cout")
- stdout_fd = STDOUT_FILENO;
- else if (out == "stderr" || out == "cerr")
- stdout_fd = STDERR_FILENO;
- else
- stdout_fd = Process::openOutputFile(out);
-
- stderr_fd = (stdout_fd != STDOUT_FILENO) ? stdout_fd : STDERR_FILENO;
-
- return SparcLiveProcess::create(getInstanceName(), system,
- stdin_fd, stdout_fd, stderr_fd,
- (string)executable == "" ? cmd[0] : executable,
- cmd, env);
-}
-
-
-REGISTER_SIM_OBJECT("SparcLiveProcess", SparcLiveProcess)
-
-
diff --git a/arch/sparc/process.hh b/arch/sparc/process.hh
deleted file mode 100644
index c177f20a5..000000000
--- a/arch/sparc/process.hh
+++ /dev/null
@@ -1,79 +0,0 @@
-/*
- * Copyright (c) 2003-2004 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef __SPARC_PROCESS_HH__
-#define __SPARC_PROCESS_HH__
-
-#include <string>
-#include <vector>
-#include "sim/process.hh"
-
-class ObjectFile;
-class System;
-
-typedef struct
-{
- int64_t a_type;
- union {
- int64_t a_val;
- Addr a_ptr;
- Addr a_fcn;
- };
-} m5_auxv_t;
-
-class SparcLiveProcess : public LiveProcess
-{
- protected:
-
- static const Addr StackBias = 2047;
-
- std::vector<m5_auxv_t> auxv;
-
- SparcLiveProcess(const std::string &nm, ObjectFile *objFile,
- System *_system, int stdin_fd, int stdout_fd, int stderr_fd,
- std::vector<std::string> &argv,
- std::vector<std::string> &envp);
-
- void startup();
-
- public:
- // this function is used to create the LiveProcess object, since
- // we can't tell which subclass of LiveProcess to use until we
- // open and look at the object file.
- static SparcLiveProcess *create(const std::string &nm,
- System *_system,
- int stdin_fd, int stdout_fd, int stderr_fd,
- std::string executable,
- std::vector<std::string> &argv,
- std::vector<std::string> &envp);
-
- void argsInit(int intSize, int pageSize);
-
-};
-
-#endif // __SPARC_PROCESS_HH__
diff --git a/arch/sparc/regfile.hh b/arch/sparc/regfile.hh
deleted file mode 100644
index 5169a332f..000000000
--- a/arch/sparc/regfile.hh
+++ /dev/null
@@ -1,812 +0,0 @@
-/*
- * Copyright (c) 2003-2005 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef __ARCH_SPARC_REGFILE_HH__
-#define __ARCH_SPARC_REGFILE_HH__
-
-#include "arch/sparc/faults.hh"
-#include "base/trace.hh"
-#include "sim/byteswap.hh"
-#include "sim/host.hh"
-
-class Checkpoint;
-
-namespace SparcISA
-{
-
- typedef uint8_t RegIndex;
-
- // MAXTL - maximum trap level
- const int MaxTL = 4;
-
- // NWINDOWS - number of register windows, can be 3 to 32
- const int NWindows = 32;
-
- class IntRegFile
- {
- protected:
- static const int FrameOffsetBits = 3;
- static const int FrameNumBits = 2;
-
- static const int RegsPerFrame = 1 << FrameOffsetBits;
- static const int FrameNumMask =
- (FrameNumBits == sizeof(int)) ?
- (unsigned int)(-1) :
- (1 << FrameNumBits) - 1;
- static const int FrameOffsetMask =
- (FrameOffsetBits == sizeof(int)) ?
- (unsigned int)(-1) :
- (1 << FrameOffsetBits) - 1;
-
- IntReg regGlobals[RegsPerFrame];
- IntReg altGlobals[RegsPerFrame];
- IntReg regSegments[2 * NWindows][RegsPerFrame];
-
- enum regFrame {Globals, Outputs, Locals, Inputs, NumFrames};
-
- IntReg * regView[NumFrames];
-
- static const int RegGlobalOffset = 0;
- static const int AltGlobalOffset = 8;
- static const int FrameOffset = 16;
- int offset[NumFrames];
-
- public:
-
- int flattenIndex(int reg)
- {
- int flatIndex = offset[reg >> FrameOffsetBits]
- | (reg & FrameOffsetMask);
- DPRINTF(Sparc, "Flattened index %d into %d.\n", reg, flatIndex);
- return flatIndex;
- }
-
- void clear()
- {
- bzero(regGlobals, sizeof(regGlobals));
- bzero(altGlobals, sizeof(altGlobals));
- for(int x = 0; x < 2 * NWindows; x++)
- bzero(regSegments[x], sizeof(regSegments[x]));
- }
-
- IntRegFile()
- {
- offset[Globals] = 0;
- regView[Globals] = regGlobals;
- setCWP(0);
- clear();
- }
-
- IntReg readReg(int intReg)
- {
- IntReg val =
- regView[intReg >> FrameOffsetBits][intReg & FrameOffsetMask];
- DPRINTF(Sparc, "Read register %d = 0x%x\n", intReg, val);
- return val;
- }
-
- Fault setReg(int intReg, const IntReg &val)
- {
- if(intReg)
- DPRINTF(Sparc, "Wrote register %d = 0x%x\n", intReg, val);
- regView[intReg >> FrameOffsetBits][intReg & FrameOffsetMask] = val;
- return NoFault;
- }
-
- //This doesn't effect the actual CWP register.
- //It's purpose is to adjust the view of the register file
- //to what it would be if CWP = cwp.
- void setCWP(int cwp)
- {
- int index = ((NWindows - cwp) % NWindows) * 2;
- offset[Outputs] = FrameOffset + (index * RegsPerFrame);
- offset[Locals] = FrameOffset + ((index+1) * RegsPerFrame);
- offset[Inputs] = FrameOffset +
- (((index+2) % (NWindows * 2)) * RegsPerFrame);
- regView[Outputs] = regSegments[index];
- regView[Locals] = regSegments[index+1];
- regView[Inputs] = regSegments[(index+2) % (NWindows * 2)];
-
- DPRINTF(Sparc, "Changed the CWP value to %d\n", cwp);
- }
-
- void setAltGlobals(bool useAlt)
- {
- DPRINTF(Sparc, "Now using %s globals",
- useAlt ? "alternate" : "regular");
- regView[Globals] = useAlt ? altGlobals : regGlobals;
-
- // You have not included an out-of-class definition of your static
- // members. See [9.4.2]/4 and about a billion gcc bug reports. If
- // statements get around the problem through some magic, and than
- // seems nicer that putting a definition of them in a c file
- // somewhere.
- if (useAlt)
- offset[Globals] = AltGlobalOffset;
- else
- offset[Globals] = RegGlobalOffset;
- }
-
- void serialize(std::ostream &os);
-
- void unserialize(Checkpoint *cp, const std::string &section);
- };
-
- typedef float float32_t;
- typedef double float64_t;
- //FIXME long double refers to a 10 byte float, rather than a
- //16 byte float as required. This data type may have to be emulated.
- typedef double float128_t;
-
- class FloatRegFile
- {
- public:
- static const int SingleWidth = 32;
- static const int DoubleWidth = 64;
- static const int QuadWidth = 128;
-
- protected:
-
- //Since the floating point registers overlap each other,
- //A generic storage space is used. The float to be returned is
- //pulled from the appropriate section of this region.
- char regSpace[SingleWidth / 8 * NumFloatRegs];
-
- public:
-
- void clear()
- {
- bzero(regSpace, sizeof(regSpace));
- }
-
- FloatReg readReg(int floatReg, int width)
- {
- //In each of these cases, we have to copy the value into a temporary
- //variable. This is because we may otherwise try to access an
- //unaligned portion of memory.
- switch(width)
- {
- case SingleWidth:
- float32_t result32;
- memcpy(&result32, regSpace + 4 * floatReg, width);
- return htog(result32);
- case DoubleWidth:
- float64_t result64;
- memcpy(&result64, regSpace + 4 * floatReg, width);
- return htog(result64);
- case QuadWidth:
- float128_t result128;
- memcpy(&result128, regSpace + 4 * floatReg, width);
- return htog(result128);
- default:
- panic("Attempted to read a %d bit floating point register!", width);
- }
- }
-
- FloatRegBits readRegBits(int floatReg, int width)
- {
- //In each of these cases, we have to copy the value into a temporary
- //variable. This is because we may otherwise try to access an
- //unaligned portion of memory.
- switch(width)
- {
- case SingleWidth:
- uint32_t result32;
- memcpy(&result32, regSpace + 4 * floatReg, width);
- return htog(result32);
- case DoubleWidth:
- uint64_t result64;
- memcpy(&result64, regSpace + 4 * floatReg, width);
- return htog(result64);
- case QuadWidth:
- uint64_t result128;
- memcpy(&result128, regSpace + 4 * floatReg, width);
- return htog(result128);
- default:
- panic("Attempted to read a %d bit floating point register!", width);
- }
- }
-
- Fault setReg(int floatReg, const FloatReg &val, int width)
- {
- //In each of these cases, we have to copy the value into a temporary
- //variable. This is because we may otherwise try to access an
- //unaligned portion of memory.
- switch(width)
- {
- case SingleWidth:
- uint32_t result32 = gtoh((uint32_t)val);
- memcpy(regSpace + 4 * floatReg, &result32, width);
- case DoubleWidth:
- uint64_t result64 = gtoh((uint64_t)val);
- memcpy(regSpace + 4 * floatReg, &result64, width);
- case QuadWidth:
- uint64_t result128 = gtoh((uint64_t)val);
- memcpy(regSpace + 4 * floatReg, &result128, width);
- default:
- panic("Attempted to read a %d bit floating point register!", width);
- }
- return NoFault;
- }
-
- Fault setRegBits(int floatReg, const FloatRegBits &val, int width)
- {
- //In each of these cases, we have to copy the value into a temporary
- //variable. This is because we may otherwise try to access an
- //unaligned portion of memory.
- switch(width)
- {
- case SingleWidth:
- uint32_t result32 = gtoh((uint32_t)val);
- memcpy(regSpace + 4 * floatReg, &result32, width);
- case DoubleWidth:
- uint64_t result64 = gtoh((uint64_t)val);
- memcpy(regSpace + 4 * floatReg, &result64, width);
- case QuadWidth:
- uint64_t result128 = gtoh((uint64_t)val);
- memcpy(regSpace + 4 * floatReg, &result128, width);
- default:
- panic("Attempted to read a %d bit floating point register!", width);
- }
- return NoFault;
- }
-
- void serialize(std::ostream &os);
-
- void unserialize(Checkpoint *cp, const std::string &section);
- };
-
- enum MiscRegIndex
- {
- MISCREG_PSTATE,
- MISCREG_PSTATE_AG,
- MISCREG_PSTATE_IE,
- MISCREG_PSTATE_PRIV,
- MISCREG_PSTATE_AM,
- MISCREG_PSTATE_PEF,
- MISCREG_PSTATE_RED,
- MISCREG_PSTATE_MM,
- MISCREG_PSTATE_TLE,
- MISCREG_PSTATE_CLE,
- MISCREG_TBA,
- MISCREG_Y,
- MISCREG_Y_VALUE,
- MISCREG_PIL,
- MISCREG_CWP,
- MISCREG_TT_BASE,
- MISCREG_TT_END = MISCREG_TT_BASE + MaxTL,
- MISCREG_CCR,
- MISCREG_CCR_ICC,
- MISCREG_CCR_ICC_C,
- MISCREG_CCR_ICC_V,
- MISCREG_CCR_ICC_Z,
- MISCREG_CCR_ICC_N,
- MISCREG_CCR_XCC,
- MISCREG_CCR_XCC_C,
- MISCREG_CCR_XCC_V,
- MISCREG_CCR_XCC_Z,
- MISCREG_CCR_XCC_N,
- MISCREG_ASI,
- MISCREG_TL,
- MISCREG_TPC_BASE,
- MISCREG_TPC_END = MISCREG_TPC_BASE + MaxTL,
- MISCREG_TNPC_BASE,
- MISCREG_TNPC_END = MISCREG_TNPC_BASE + MaxTL,
- MISCREG_TSTATE_BASE,
- MISCREG_TSTATE_END = MISCREG_TSTATE_BASE + MaxTL,
- MISCREG_TSTATE_CWP_BASE,
- MISCREG_TSTATE_CWP_END = MISCREG_TSTATE_CWP_BASE + MaxTL,
- MISCREG_TSTATE_PSTATE_BASE,
- MISCREG_TSTATE_PSTATE_END = MISCREG_TSTATE_PSTATE_BASE + MaxTL,
- MISCREG_TSTATE_ASI_BASE,
- MISCREG_TSTATE_ASI_END = MISCREG_TSTATE_ASI_BASE + MaxTL,
- MISCREG_TSTATE_CCR_BASE,
- MISCREG_TSTATE_CCR_END = MISCREG_TSTATE_CCR_BASE + MaxTL,
- MISCREG_TICK,
- MISCREG_TICK_COUNTER,
- MISCREG_TICK_NPT,
- MISCREG_CANSAVE,
- MISCREG_CANRESTORE,
- MISCREG_OTHERWIN,
- MISCREG_CLEANWIN,
- MISCREG_WSTATE,
- MISCREG_WSTATE_NORMAL,
- MISCREG_WSTATE_OTHER,
- MISCREG_VER,
- MISCREG_VER_MAXWIN,
- MISCREG_VER_MAXTL,
- MISCREG_VER_MASK,
- MISCREG_VER_IMPL,
- MISCREG_VER_MANUF,
- MISCREG_FSR,
- MISCREG_FSR_CEXC,
- MISCREG_FSR_CEXC_NXC,
- MISCREG_FSR_CEXC_DZC,
- MISCREG_FSR_CEXC_UFC,
- MISCREG_FSR_CEXC_OFC,
- MISCREG_FSR_CEXC_NVC,
- MISCREG_FSR_AEXC,
- MISCREG_FSR_AEXC_NXC,
- MISCREG_FSR_AEXC_DZC,
- MISCREG_FSR_AEXC_UFC,
- MISCREG_FSR_AEXC_OFC,
- MISCREG_FSR_AEXC_NVC,
- MISCREG_FSR_FCC0,
- MISCREG_FSR_QNE,
- MISCREG_FSR_FTT,
- MISCREG_FSR_VER,
- MISCREG_FSR_NS,
- MISCREG_FSR_TEM,
- MISCREG_FSR_TEM_NXM,
- MISCREG_FSR_TEM_DZM,
- MISCREG_FSR_TEM_UFM,
- MISCREG_FSR_TEM_OFM,
- MISCREG_FSR_TEM_NVM,
- MISCREG_FSR_RD,
- MISCREG_FSR_FCC1,
- MISCREG_FSR_FCC2,
- MISCREG_FSR_FCC3,
- MISCREG_FPRS,
- MISCREG_FPRS_DL,
- MISCREG_FPRS_DU,
- MISCREG_FPRS_FEF,
- numMiscRegs
- };
-
- // The control registers, broken out into fields
- class MiscRegFile
- {
- private:
- union
- {
- uint16_t pstate; // Process State Register
- struct
- {
- uint16_t ag:1; // Alternate Globals
- uint16_t ie:1; // Interrupt enable
- uint16_t priv:1; // Privelege mode
- uint16_t am:1; // Address mask
- uint16_t pef:1; // PSTATE enable floating-point
- uint16_t red:1; // RED (reset, error, debug) state
- uint16_t mm:2; // Memory Model
- uint16_t tle:1; // Trap little-endian
- uint16_t cle:1; // Current little-endian
- } pstateFields;
- };
- uint64_t tba; // Trap Base Address
- union
- {
- uint64_t y; // Y (used in obsolete multiplication)
- struct
- {
- uint64_t value:32; // The actual value stored in y
- uint64_t :32; // reserved bits
- } yFields;
- };
- uint8_t pil; // Process Interrupt Register
- uint8_t cwp; // Current Window Pointer
- uint16_t tt[MaxTL]; // Trap Type (Type of trap which occured
- // on the previous level)
- union
- {
- uint8_t ccr; // Condition Code Register
- struct
- {
- union
- {
- uint8_t icc:4; // 32-bit condition codes
- struct
- {
- uint8_t c:1; // Carry
- uint8_t v:1; // Overflow
- uint8_t z:1; // Zero
- uint8_t n:1; // Negative
- } iccFields;
- };
- union
- {
- uint8_t xcc:4; // 64-bit condition codes
- struct
- {
- uint8_t c:1; // Carry
- uint8_t v:1; // Overflow
- uint8_t z:1; // Zero
- uint8_t n:1; // Negative
- } xccFields;
- };
- } ccrFields;
- };
- uint8_t asi; // Address Space Identifier
- uint8_t tl; // Trap Level
- uint64_t tpc[MaxTL]; // Trap Program Counter (value from
- // previous trap level)
- uint64_t tnpc[MaxTL]; // Trap Next Program Counter (value from
- // previous trap level)
- union
- {
- uint64_t tstate[MaxTL]; // Trap State
- struct
- {
- //Values are from previous trap level
- uint64_t cwp:5; // Current Window Pointer
- uint64_t :2; // Reserved bits
- uint64_t pstate:10; // Process State
- uint64_t :6; // Reserved bits
- uint64_t asi:8; // Address Space Identifier
- uint64_t ccr:8; // Condition Code Register
- } tstateFields[MaxTL];
- };
- union
- {
- uint64_t tick; // Hardware clock-tick counter
- struct
- {
- uint64_t counter:63; // Clock-tick count
- uint64_t npt:1; // Non-priveleged trap
- } tickFields;
- };
- uint8_t cansave; // Savable windows
- uint8_t canrestore; // Restorable windows
- uint8_t otherwin; // Other windows
- uint8_t cleanwin; // Clean windows
- union
- {
- uint8_t wstate; // Window State
- struct
- {
- uint8_t normal:3; // Bits TT<4:2> are set to on a normal
- // register window trap
- uint8_t other:3; // Bits TT<4:2> are set to on an "otherwin"
- // register window trap
- } wstateFields;
- };
- union
- {
- uint64_t ver; // Version
- struct
- {
- uint64_t maxwin:5; // Max CWP value
- uint64_t :2; // Reserved bits
- uint64_t maxtl:8; // Maximum trap level
- uint64_t :8; // Reserved bits
- uint64_t mask:8; // Processor mask set revision number
- uint64_t impl:16; // Implementation identification number
- uint64_t manuf:16; // Manufacturer code
- } verFields;
- };
- union
- {
- uint64_t fsr; // Floating-Point State Register
- struct
- {
- union
- {
- uint64_t cexc:5; // Current excpetion
- struct
- {
- uint64_t nxc:1; // Inexact
- uint64_t dzc:1; // Divide by zero
- uint64_t ufc:1; // Underflow
- uint64_t ofc:1; // Overflow
- uint64_t nvc:1; // Invalid operand
- } cexcFields;
- };
- union
- {
- uint64_t aexc:5; // Accrued exception
- struct
- {
- uint64_t nxc:1; // Inexact
- uint64_t dzc:1; // Divide by zero
- uint64_t ufc:1; // Underflow
- uint64_t ofc:1; // Overflow
- uint64_t nvc:1; // Invalid operand
- } aexcFields;
- };
- uint64_t fcc0:2; // Floating-Point condtion codes
- uint64_t :1; // Reserved bits
- uint64_t qne:1; // Deferred trap queue not empty
- // with no queue, it should read 0
- uint64_t ftt:3; // Floating-Point trap type
- uint64_t ver:3; // Version (of the FPU)
- uint64_t :2; // Reserved bits
- uint64_t ns:1; // Nonstandard floating point
- union
- {
- uint64_t tem:5; // Trap Enable Mask
- struct
- {
- uint64_t nxm:1; // Inexact
- uint64_t dzm:1; // Divide by zero
- uint64_t ufm:1; // Underflow
- uint64_t ofm:1; // Overflow
- uint64_t nvm:1; // Invalid operand
- } temFields;
- };
- uint64_t :2; // Reserved bits
- uint64_t rd:2; // Rounding direction
- uint64_t fcc1:2; // Floating-Point condition codes
- uint64_t fcc2:2; // Floating-Point condition codes
- uint64_t fcc3:2; // Floating-Point condition codes
- uint64_t :26; // Reserved bits
- } fsrFields;
- };
- union
- {
- uint8_t fprs; // Floating-Point Register State
- struct
- {
- uint8_t dl:1; // Dirty lower
- uint8_t du:1; // Dirty upper
- uint8_t fef:1; // FPRS enable floating-Point
- } fprsFields;
- };
-
- public:
-
- void reset()
- {
- pstateFields.pef = 0; //No FPU
- //pstateFields.pef = 1; //FPU
-#if FULL_SYSTEM
- //For SPARC, when a system is first started, there is a power
- //on reset Trap which sets the processor into the following state.
- //Bits that aren't set aren't defined on startup.
- tl = MaxTL;
- tt[tl] = PowerOnReset.trapType();
- pstateFields.mm = 0; //Total Store Order
- pstateFields.red = 1; //Enter RED_State
- pstateFields.am = 0; //Address Masking is turned off
- pstateFields.priv = 1; //Processor enters privileged mode
- pstateFields.ie = 0; //Interrupts are disabled
- pstateFields.ag = 1; //Globals are replaced with alternate globals
- pstateFields.tle = 0; //Big Endian mode for traps
- pstateFields.cle = 0; //Big Endian mode for non-traps
- tickFields.npt = 1; //The TICK register is unreadable by
- //non-priveleged software
-#else
-/* //This sets up the initial state of the processor for usermode processes
- pstateFields.priv = 0; //Process runs in user mode
- pstateFields.ie = 1; //Interrupts are enabled
- fsrFields.rd = 0; //Round to nearest
- fsrFields.tem = 0; //Floating point traps not enabled
- fsrFields.ns = 0; //Non standard mode off
- fsrFields.qne = 0; //Floating point queue is empty
- fsrFields.aexc = 0; //No accrued exceptions
- fsrFields.cexc = 0; //No current exceptions
-
- //Register window management registers
- otherwin = 0; //No windows contain info from other programs
- canrestore = 0; //There are no windows to pop
- cansave = MaxTL - 2; //All windows are available to save into
- cleanwin = MaxTL;*/
-#endif
- }
-
- MiscRegFile()
- {
- reset();
- }
-
- MiscReg readReg(int miscReg);
-
- MiscReg readRegWithEffect(int miscReg, Fault &fault, ExecContext *xc);
-
- Fault setReg(int miscReg, const MiscReg &val);
-
- Fault setRegWithEffect(int miscReg,
- const MiscReg &val, ExecContext * xc);
-
- void serialize(std::ostream & os);
-
- void unserialize(Checkpoint * cp, const std::string & section);
-
- void copyMiscRegs(ExecContext * xc);
- };
-
- typedef union
- {
- IntReg intreg;
- FloatReg fpreg;
- MiscReg ctrlreg;
- } AnyReg;
-
- class RegFile
- {
- protected:
- Addr pc; // Program Counter
- Addr npc; // Next Program Counter
- Addr nnpc;
-
- public:
- Addr readPC()
- {
- return pc;
- }
-
- void setPC(Addr val)
- {
- pc = val;
- }
-
- Addr readNextPC()
- {
- return npc;
- }
-
- void setNextPC(Addr val)
- {
- npc = val;
- }
-
- Addr readNextNPC()
- {
- return nnpc;
- }
-
- void setNextNPC(Addr val)
- {
- nnpc = val;
- }
-
- protected:
- IntRegFile intRegFile; // integer register file
- FloatRegFile floatRegFile; // floating point register file
- MiscRegFile miscRegFile; // control register file
-
- public:
-
- void clear()
- {
- intRegFile.clear();
- floatRegFile.clear();
- }
-
- int flattenIntIndex(int reg)
- {
- return intRegFile.flattenIndex(reg);
- }
-
- MiscReg readMiscReg(int miscReg)
- {
- return miscRegFile.readReg(miscReg);
- }
-
- MiscReg readMiscRegWithEffect(int miscReg,
- Fault &fault, ExecContext *xc)
- {
- return miscRegFile.readRegWithEffect(miscReg, fault, xc);
- }
-
- Fault setMiscReg(int miscReg, const MiscReg &val)
- {
- return miscRegFile.setReg(miscReg, val);
- }
-
- Fault setMiscRegWithEffect(int miscReg, const MiscReg &val,
- ExecContext * xc)
- {
- return miscRegFile.setRegWithEffect(miscReg, val, xc);
- }
-
- FloatReg readFloatReg(int floatReg, int width)
- {
- return floatRegFile.readReg(floatReg, width);
- }
-
- FloatReg readFloatReg(int floatReg)
- {
- //Use the "natural" width of a single float
- return floatRegFile.readReg(floatReg, FloatRegFile::SingleWidth);
- }
-
- FloatRegBits readFloatRegBits(int floatReg, int width)
- {
- return floatRegFile.readRegBits(floatReg, width);
- }
-
- FloatRegBits readFloatRegBits(int floatReg)
- {
- //Use the "natural" width of a single float
- return floatRegFile.readRegBits(floatReg,
- FloatRegFile::SingleWidth);
- }
-
- Fault setFloatReg(int floatReg, const FloatReg &val, int width)
- {
- return floatRegFile.setReg(floatReg, val, width);
- }
-
- Fault setFloatReg(int floatReg, const FloatReg &val)
- {
- //Use the "natural" width of a single float
- return setFloatReg(floatReg, val, FloatRegFile::SingleWidth);
- }
-
- Fault setFloatRegBits(int floatReg, const FloatRegBits &val, int width)
- {
- return floatRegFile.setRegBits(floatReg, val, width);
- }
-
- Fault setFloatRegBits(int floatReg, const FloatRegBits &val)
- {
- //Use the "natural" width of a single float
- return floatRegFile.setRegBits(floatReg, val,
- FloatRegFile::SingleWidth);
- }
-
- IntReg readIntReg(int intReg)
- {
- return intRegFile.readReg(intReg);
- }
-
- Fault setIntReg(int intReg, const IntReg &val)
- {
- return intRegFile.setReg(intReg, val);
- }
-
- void serialize(std::ostream &os);
- void unserialize(Checkpoint *cp, const std::string &section);
-
- public:
-
- enum ContextParam
- {
- CONTEXT_CWP,
- CONTEXT_GLOBALS
- };
-
- union ContextVal
- {
- MiscReg reg;
- bool altGlobals;
- };
-
- void changeContext(ContextParam param, ContextVal val)
- {
- switch(param)
- {
- case CONTEXT_CWP:
- intRegFile.setCWP(val.reg);
- break;
- case CONTEXT_GLOBALS:
- intRegFile.setAltGlobals(val.altGlobals);
- break;
- default:
- panic("Tried to set illegal context parameter in the SPARC regfile.\n");
- }
- }
- };
-
- void copyRegs(ExecContext *src, ExecContext *dest);
-
- void copyMiscRegs(ExecContext *src, ExecContext *dest);
-
-} // namespace SparcISA
-
-#endif
diff --git a/arch/sparc/solaris/process.cc b/arch/sparc/solaris/process.cc
deleted file mode 100644
index 95cdb0bd5..000000000
--- a/arch/sparc/solaris/process.cc
+++ /dev/null
@@ -1,347 +0,0 @@
-/*
- * Copyright (c) 2003-2005 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "arch/sparc/isa_traits.hh"
-#include "arch/sparc/solaris/process.hh"
-#include "arch/sparc/regfile.hh"
-
-#include "base/trace.hh"
-#include "cpu/exec_context.hh"
-#include "kern/solaris/solaris.hh"
-
-#include "sim/process.hh"
-#include "sim/syscall_emul.hh"
-
-using namespace std;
-using namespace SparcISA;
-
-
-/// Target uname() handler.
-static SyscallReturn
-unameFunc(SyscallDesc *desc, int callnum, Process *process,
- ExecContext *xc)
-{
- TypedBufferArg<Solaris::utsname> name(xc->getSyscallArg(0));
-
- strcpy(name->sysname, "SunOS");
- strcpy(name->nodename, "m5.eecs.umich.edu");
- strcpy(name->release, "5.9"); //?? do we want this or something newer?
- strcpy(name->version, "Generic_118558-21");
- strcpy(name->machine, "sun4u");
-
- name.copyOut(xc->getMemPort());
-
- return 0;
-}
-
-
-SyscallDesc SparcSolarisProcess::syscallDescs[] = {
- /* 0 */ SyscallDesc("syscall", unimplementedFunc),
- /* 1 */ SyscallDesc("exit", exitFunc),
- /* 2 */ SyscallDesc("fork", unimplementedFunc),
- /* 3 */ SyscallDesc("read", readFunc),
- /* 4 */ SyscallDesc("write", writeFunc),
- /* 5 */ SyscallDesc("open", openFunc<SparcSolaris>),
- /* 6 */ SyscallDesc("close", closeFunc),
- /* 7 */ SyscallDesc("wait", unimplementedFunc),
- /* 8 */ SyscallDesc("creat", unimplementedFunc),
- /* 9 */ SyscallDesc("link", unimplementedFunc),
- /* 10 */ SyscallDesc("unlink", unlinkFunc),
- /* 11 */ SyscallDesc("exec", unimplementedFunc),
- /* 12 */ SyscallDesc("chdir", unimplementedFunc),
- /* 13 */ SyscallDesc("time", unimplementedFunc),
- /* 14 */ SyscallDesc("mknod", unimplementedFunc),
- /* 15 */ SyscallDesc("chmod", chmodFunc<Solaris>),
- /* 16 */ SyscallDesc("chown", chownFunc),
- /* 17 */ SyscallDesc("brk", obreakFunc),
- /* 18 */ SyscallDesc("stat", unimplementedFunc),
- /* 19 */ SyscallDesc("lseek", lseekFunc),
- /* 20 */ SyscallDesc("getpid", getpidFunc),
- /* 21 */ SyscallDesc("mount", unimplementedFunc),
- /* 22 */ SyscallDesc("umount", unimplementedFunc),
- /* 23 */ SyscallDesc("setuid", setuidFunc),
- /* 24 */ SyscallDesc("getuid", getuidFunc),
- /* 25 */ SyscallDesc("stime", unimplementedFunc),
- /* 26 */ SyscallDesc("pcsample", unimplementedFunc),
- /* 27 */ SyscallDesc("alarm", unimplementedFunc),
- /* 28 */ SyscallDesc("fstat", fstatFunc<SparcSolaris>),
- /* 29 */ SyscallDesc("pause", unimplementedFunc),
- /* 30 */ SyscallDesc("utime", unimplementedFunc),
- /* 31 */ SyscallDesc("stty", unimplementedFunc),
- /* 32 */ SyscallDesc("gtty", unimplementedFunc),
- /* 33 */ SyscallDesc("access", unimplementedFunc),
- /* 34 */ SyscallDesc("nice", unimplementedFunc),
- /* 35 */ SyscallDesc("statfs", unimplementedFunc),
- /* 36 */ SyscallDesc("sync", unimplementedFunc),
- /* 37 */ SyscallDesc("kill", unimplementedFunc),
- /* 38 */ SyscallDesc("fstatfs", unimplementedFunc),
- /* 39 */ SyscallDesc("pgrpsys", unimplementedFunc),
- /* 40 */ SyscallDesc("xenix", unimplementedFunc),
- /* 41 */ SyscallDesc("dup", unimplementedFunc),
- /* 42 */ SyscallDesc("pipe", pipePseudoFunc),
- /* 43 */ SyscallDesc("times", unimplementedFunc),
- /* 44 */ SyscallDesc("profil", unimplementedFunc),
- /* 45 */ SyscallDesc("plock", unimplementedFunc),
- /* 46 */ SyscallDesc("setgid", unimplementedFunc),
- /* 47 */ SyscallDesc("getgid", getgidFunc),
- /* 48 */ SyscallDesc("signal", unimplementedFunc),
- /* 49 */ SyscallDesc("msgsys", unimplementedFunc),
- /* 50 */ SyscallDesc("syssun", unimplementedFunc),
- /* 51 */ SyscallDesc("acct", unimplementedFunc),
- /* 52 */ SyscallDesc("shmsys", unimplementedFunc),
- /* 53 */ SyscallDesc("semsys", unimplementedFunc),
- /* 54 */ SyscallDesc("ioctl", unimplementedFunc),
- /* 55 */ SyscallDesc("uadmin", unimplementedFunc),
- /* 56 */ SyscallDesc("RESERVED", unimplementedFunc),
- /* 57 */ SyscallDesc("utssys", unimplementedFunc),
- /* 58 */ SyscallDesc("fdsync", unimplementedFunc),
- /* 59 */ SyscallDesc("execve", unimplementedFunc),
- /* 60 */ SyscallDesc("umask", unimplementedFunc),
- /* 61 */ SyscallDesc("chroot", unimplementedFunc),
- /* 62 */ SyscallDesc("fcntl", unimplementedFunc),
- /* 63 */ SyscallDesc("ulimit", unimplementedFunc),
- /* 64 */ SyscallDesc("reserved_64", unimplementedFunc),
- /* 65 */ SyscallDesc("reserved_65", unimplementedFunc),
- /* 66 */ SyscallDesc("reserved_66", unimplementedFunc),
- /* 67 */ SyscallDesc("reserved_67", unimplementedFunc),
- /* 68 */ SyscallDesc("reserved_68", unimplementedFunc),
- /* 69 */ SyscallDesc("reserved_69", unimplementedFunc),
- /* 70 */ SyscallDesc("tasksys", unimplementedFunc),
- /* 71 */ SyscallDesc("acctctl", unimplementedFunc),
- /* 72 */ SyscallDesc("reserved_72", unimplementedFunc),
- /* 73 */ SyscallDesc("getpagesizes", unimplementedFunc),
- /* 74 */ SyscallDesc("rctlsys", unimplementedFunc),
- /* 75 */ SyscallDesc("issetugid", unimplementedFunc),
- /* 76 */ SyscallDesc("fsat", unimplementedFunc),
- /* 77 */ SyscallDesc("lwp_park", unimplementedFunc),
- /* 78 */ SyscallDesc("sendfilev", unimplementedFunc),
- /* 79 */ SyscallDesc("rmdir", unimplementedFunc),
- /* 80 */ SyscallDesc("mkdir", unimplementedFunc),
- /* 81 */ SyscallDesc("getdents", unimplementedFunc),
- /* 82 */ SyscallDesc("reserved_82", unimplementedFunc),
- /* 83 */ SyscallDesc("reserved_83", unimplementedFunc),
- /* 84 */ SyscallDesc("sysfs", unimplementedFunc),
- /* 85 */ SyscallDesc("getmsg", unimplementedFunc),
- /* 86 */ SyscallDesc("putmsg", unimplementedFunc),
- /* 87 */ SyscallDesc("poll", unimplementedFunc),
- /* 88 */ SyscallDesc("lstat", unimplementedFunc),
- /* 89 */ SyscallDesc("symlink", unimplementedFunc),
- /* 90 */ SyscallDesc("readlink", unimplementedFunc),
- /* 91 */ SyscallDesc("setgroups", unimplementedFunc),
- /* 92 */ SyscallDesc("getgroups", unimplementedFunc),
- /* 93 */ SyscallDesc("fchmod", unimplementedFunc),
- /* 94 */ SyscallDesc("fchown", unimplementedFunc),
- /* 95 */ SyscallDesc("sigprocmask", unimplementedFunc),
- /* 96 */ SyscallDesc("sigsuspend", unimplementedFunc),
- /* 97 */ SyscallDesc("sigaltstack", unimplementedFunc),
- /* 98 */ SyscallDesc("sigaction", unimplementedFunc),
- /* 99 */ SyscallDesc("sigpending", unimplementedFunc),
- /* 100 */ SyscallDesc("context", unimplementedFunc),
- /* 101 */ SyscallDesc("evsys", unimplementedFunc),
- /* 102 */ SyscallDesc("evtrapret", unimplementedFunc),
- /* 103 */ SyscallDesc("statvfs", unimplementedFunc),
- /* 104 */ SyscallDesc("fstatvfs", unimplementedFunc),
- /* 105 */ SyscallDesc("getloadavg", unimplementedFunc),
- /* 106 */ SyscallDesc("nfssys", unimplementedFunc),
- /* 107 */ SyscallDesc("waitsys", unimplementedFunc),
- /* 108 */ SyscallDesc("sigsendsys", unimplementedFunc),
- /* 109 */ SyscallDesc("hrtsys", unimplementedFunc),
- /* 110 */ SyscallDesc("acancel", unimplementedFunc),
- /* 111 */ SyscallDesc("async", unimplementedFunc),
- /* 112 */ SyscallDesc("priocntlsys", unimplementedFunc),
- /* 113 */ SyscallDesc("pathconf", unimplementedFunc),
- /* 114 */ SyscallDesc("mincore", unimplementedFunc),
- /* 115 */ SyscallDesc("mmap", mmapFunc<SparcSolaris>),
- /* 116 */ SyscallDesc("mprotect", unimplementedFunc),
- /* 117 */ SyscallDesc("munmap", munmapFunc),
- /* 118 */ SyscallDesc("fpathconf", unimplementedFunc),
- /* 119 */ SyscallDesc("vfork", unimplementedFunc),
- /* 120 */ SyscallDesc("fchdir", unimplementedFunc),
- /* 121 */ SyscallDesc("readv", unimplementedFunc),
- /* 122 */ SyscallDesc("writev", unimplementedFunc),
- /* 123 */ SyscallDesc("xstat", unimplementedFunc),
- /* 124 */ SyscallDesc("lxstat", unimplementedFunc),
- /* 125 */ SyscallDesc("fxstat", unimplementedFunc),
- /* 126 */ SyscallDesc("xmknod", unimplementedFunc),
- /* 127 */ SyscallDesc("clocal", unimplementedFunc),
- /* 128 */ SyscallDesc("setrlimit", unimplementedFunc),
- /* 129 */ SyscallDesc("getrlimit", unimplementedFunc),
- /* 130 */ SyscallDesc("lchown", unimplementedFunc),
- /* 131 */ SyscallDesc("memcntl", unimplementedFunc),
- /* 132 */ SyscallDesc("getpmsg", unimplementedFunc),
- /* 133 */ SyscallDesc("putpmsg", unimplementedFunc),
- /* 134 */ SyscallDesc("rename", unimplementedFunc),
- /* 135 */ SyscallDesc("uname", unameFunc),
- /* 136 */ SyscallDesc("setegid", unimplementedFunc),
- /* 137 */ SyscallDesc("sysconfig", unimplementedFunc),
- /* 138 */ SyscallDesc("adjtime", unimplementedFunc),
- /* 139 */ SyscallDesc("systeminfo", unimplementedFunc),
- /* 140 */ SyscallDesc("reserved_140", unimplementedFunc),
- /* 141 */ SyscallDesc("seteuid", unimplementedFunc),
- /* 142 */ SyscallDesc("vtrace", unimplementedFunc),
- /* 143 */ SyscallDesc("fork1", unimplementedFunc),
- /* 144 */ SyscallDesc("sigtimedwait", unimplementedFunc),
- /* 145 */ SyscallDesc("lwp_info", unimplementedFunc),
- /* 146 */ SyscallDesc("yield", unimplementedFunc),
- /* 147 */ SyscallDesc("lwp_sema_wait", unimplementedFunc),
- /* 148 */ SyscallDesc("lwp_sema_post", unimplementedFunc),
- /* 149 */ SyscallDesc("lwp_sema_trywait", unimplementedFunc),
- /* 150 */ SyscallDesc("lwp_detach", unimplementedFunc),
- /* 151 */ SyscallDesc("corectl", unimplementedFunc),
- /* 152 */ SyscallDesc("modctl", unimplementedFunc),
- /* 153 */ SyscallDesc("fchroot", unimplementedFunc),
- /* 154 */ SyscallDesc("utimes", unimplementedFunc),
- /* 155 */ SyscallDesc("vhangup", unimplementedFunc),
- /* 156 */ SyscallDesc("gettimeofday", unimplementedFunc),
- /* 157 */ SyscallDesc("getitimer", unimplementedFunc),
- /* 158 */ SyscallDesc("setitimer", unimplementedFunc),
- /* 159 */ SyscallDesc("lwp_create", unimplementedFunc),
- /* 160 */ SyscallDesc("lwp_exit", unimplementedFunc),
- /* 161 */ SyscallDesc("lwp_suspend", unimplementedFunc),
- /* 162 */ SyscallDesc("lwp_continue", unimplementedFunc),
- /* 163 */ SyscallDesc("lwp_kill", unimplementedFunc),
- /* 164 */ SyscallDesc("lwp_self", unimplementedFunc),
- /* 165 */ SyscallDesc("lwp_setprivate", unimplementedFunc),
- /* 166 */ SyscallDesc("lwp_getprivate", unimplementedFunc),
- /* 167 */ SyscallDesc("lwp_wait", unimplementedFunc),
- /* 168 */ SyscallDesc("lwp_mutex_wakeup", unimplementedFunc),
- /* 169 */ SyscallDesc("lwp_mutex_lock", unimplementedFunc),
- /* 170 */ SyscallDesc("lwp_cond_wait", unimplementedFunc),
- /* 171 */ SyscallDesc("lwp_cond_signal", unimplementedFunc),
- /* 172 */ SyscallDesc("lwp_cond_broadcast", unimplementedFunc),
- /* 173 */ SyscallDesc("pread", unimplementedFunc),
- /* 174 */ SyscallDesc("pwrite", unimplementedFunc),
- /* 175 */ SyscallDesc("llseek", unimplementedFunc),
- /* 176 */ SyscallDesc("inst_sync", unimplementedFunc),
- /* 177 */ SyscallDesc("srmlimitsys", unimplementedFunc),
- /* 178 */ SyscallDesc("kaio", unimplementedFunc),
- /* 179 */ SyscallDesc("cpc", unimplementedFunc),
- /* 180 */ SyscallDesc("lgrpsys_meminfosys", unimplementedFunc),
- /* 181 */ SyscallDesc("rusagesys", unimplementedFunc),
- /* 182 */ SyscallDesc("reserved_182", unimplementedFunc),
- /* 183 */ SyscallDesc("reserved_183", unimplementedFunc),
- /* 184 */ SyscallDesc("tsolsys", unimplementedFunc),
- /* 185 */ SyscallDesc("acl", unimplementedFunc),
- /* 186 */ SyscallDesc("auditsys", unimplementedFunc),
- /* 187 */ SyscallDesc("processor_bind", unimplementedFunc),
- /* 188 */ SyscallDesc("processor_info", unimplementedFunc),
- /* 189 */ SyscallDesc("p_online", unimplementedFunc),
- /* 190 */ SyscallDesc("sigqueue", unimplementedFunc),
- /* 191 */ SyscallDesc("clock_gettime", unimplementedFunc),
- /* 192 */ SyscallDesc("clock_settime", unimplementedFunc),
- /* 193 */ SyscallDesc("clock_getres", unimplementedFunc),
- /* 194 */ SyscallDesc("timer_create", unimplementedFunc),
- /* 195 */ SyscallDesc("timer_delete", unimplementedFunc),
- /* 196 */ SyscallDesc("timer_settime", unimplementedFunc),
- /* 197 */ SyscallDesc("timer_gettime", unimplementedFunc),
- /* 198 */ SyscallDesc("timer_getoverrun", unimplementedFunc),
- /* 199 */ SyscallDesc("nanosleep", unimplementedFunc),
- /* 200 */ SyscallDesc("facl", unimplementedFunc),
- /* 201 */ SyscallDesc("door", unimplementedFunc),
- /* 202 */ SyscallDesc("setreuid", unimplementedFunc),
- /* 203 */ SyscallDesc("setregid", unimplementedFunc),
- /* 204 */ SyscallDesc("install_utrap", unimplementedFunc),
- /* 205 */ SyscallDesc("signotify", unimplementedFunc),
- /* 206 */ SyscallDesc("schedctl", unimplementedFunc),
- /* 207 */ SyscallDesc("pset", unimplementedFunc),
- /* 208 */ SyscallDesc("sparc_utrap_install", unimplementedFunc),
- /* 209 */ SyscallDesc("resolvepath", unimplementedFunc),
- /* 210 */ SyscallDesc("signotifywait", unimplementedFunc),
- /* 211 */ SyscallDesc("lwp_sigredirect", unimplementedFunc),
- /* 212 */ SyscallDesc("lwp_alarm", unimplementedFunc),
- /* 213 */ SyscallDesc("getdents64", unimplementedFunc),
- /* 214 */ SyscallDesc("mmap64", unimplementedFunc),
- /* 215 */ SyscallDesc("stat64", unimplementedFunc),
- /* 216 */ SyscallDesc("lstat64", unimplementedFunc),
- /* 217 */ SyscallDesc("fstat64", unimplementedFunc),
- /* 218 */ SyscallDesc("statvfs64", unimplementedFunc),
- /* 219 */ SyscallDesc("fstatvfs64", unimplementedFunc),
- /* 220 */ SyscallDesc("setrlimit64", unimplementedFunc),
- /* 221 */ SyscallDesc("getrlimit64", unimplementedFunc),
- /* 222 */ SyscallDesc("pread64", unimplementedFunc),
- /* 223 */ SyscallDesc("pwrite64", unimplementedFunc),
- /* 224 */ SyscallDesc("creat64", unimplementedFunc),
- /* 225 */ SyscallDesc("open64", unimplementedFunc),
- /* 226 */ SyscallDesc("rpcsys", unimplementedFunc),
- /* 227 */ SyscallDesc("reserved_227", unimplementedFunc),
- /* 228 */ SyscallDesc("reserved_228", unimplementedFunc),
- /* 229 */ SyscallDesc("reserved_229", unimplementedFunc),
- /* 230 */ SyscallDesc("so_socket", unimplementedFunc),
- /* 231 */ SyscallDesc("so_socketpair", unimplementedFunc),
- /* 232 */ SyscallDesc("bind", unimplementedFunc),
- /* 233 */ SyscallDesc("listen", unimplementedFunc),
- /* 234 */ SyscallDesc("accept", unimplementedFunc),
- /* 235 */ SyscallDesc("connect", unimplementedFunc),
- /* 236 */ SyscallDesc("shutdown", unimplementedFunc),
- /* 237 */ SyscallDesc("recv", unimplementedFunc),
- /* 238 */ SyscallDesc("recvfrom", unimplementedFunc),
- /* 239 */ SyscallDesc("recvmsg", unimplementedFunc),
- /* 240 */ SyscallDesc("send", unimplementedFunc),
- /* 241 */ SyscallDesc("sendmsg", unimplementedFunc),
- /* 242 */ SyscallDesc("sendto", unimplementedFunc),
- /* 243 */ SyscallDesc("getpeername", unimplementedFunc),
- /* 244 */ SyscallDesc("getsockname", unimplementedFunc),
- /* 245 */ SyscallDesc("getsockopt", unimplementedFunc),
- /* 246 */ SyscallDesc("setsockopt", unimplementedFunc),
- /* 247 */ SyscallDesc("sockconfig", unimplementedFunc),
- /* 248 */ SyscallDesc("ntp_gettime", unimplementedFunc),
- /* 249 */ SyscallDesc("ntp_adjtime", unimplementedFunc),
- /* 250 */ SyscallDesc("lwp_mutex_unlock", unimplementedFunc),
- /* 251 */ SyscallDesc("lwp_mutex_trylock", unimplementedFunc),
- /* 252 */ SyscallDesc("lwp_mutex_init", unimplementedFunc),
- /* 253 */ SyscallDesc("cladm", unimplementedFunc),
- /* 254 */ SyscallDesc("lwp_sigtimedwait", unimplementedFunc),
- /* 255 */ SyscallDesc("umount2", unimplementedFunc)
-};
-
-SparcSolarisProcess::SparcSolarisProcess(const std::string &name,
- ObjectFile *objFile,
- System * system,
- int stdin_fd,
- int stdout_fd,
- int stderr_fd,
- std::vector<std::string> &argv,
- std::vector<std::string> &envp)
- : SparcLiveProcess(name, objFile, system,
- stdin_fd, stdout_fd, stderr_fd, argv, envp),
- Num_Syscall_Descs(sizeof(syscallDescs) / sizeof(SyscallDesc))
-{
- // The sparc syscall table must be <= 284 entries because that is all there
- // is space for.
- assert(Num_Syscall_Descs <= 284);
-}
-
-
-
-SyscallDesc*
-SparcSolarisProcess::getDesc(int callnum)
-{
- if (callnum < 0 || callnum > Num_Syscall_Descs)
- return NULL;
- return &syscallDescs[callnum];
-}
diff --git a/arch/sparc/solaris/process.hh b/arch/sparc/solaris/process.hh
deleted file mode 100644
index 24dffdaf0..000000000
--- a/arch/sparc/solaris/process.hh
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * Copyright (c) 2003-2004 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef __SPARC_SOLARIS_PROCESS_HH__
-#define __SPARC_SOLARIS_PROCESS_HH__
-
-#include "arch/sparc/solaris/solaris.hh"
-#include "arch/sparc/process.hh"
-#include "sim/process.hh"
-
-namespace SparcISA {
-
-/// A process with emulated SPARC/Solaris syscalls.
-class SparcSolarisProcess : public SparcLiveProcess
-{
- public:
- /// Constructor.
- SparcSolarisProcess(const std::string &name,
- ObjectFile *objFile,
- System * system,
- int stdin_fd, int stdout_fd, int stderr_fd,
- std::vector<std::string> &argv,
- std::vector<std::string> &envp);
-
- virtual SyscallDesc* getDesc(int callnum);
-
- /// The target system's hostname.
- static const char *hostname;
-
- /// Array of syscall descriptors, indexed by call number.
- static SyscallDesc syscallDescs[];
-
- const int Num_Syscall_Descs;
-};
-
-
-} // namespace SparcISA
-#endif // __ALPHA_SOLARIS_PROCESS_HH__
diff --git a/arch/sparc/solaris/solaris.cc b/arch/sparc/solaris/solaris.cc
deleted file mode 100644
index a56f10740..000000000
--- a/arch/sparc/solaris/solaris.cc
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * Copyright (c) 2003-2005 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "arch/sparc/solaris/solaris.hh"
-
-// open(2) flags translation table
-OpenFlagTransTable SparcSolaris::openFlagTable[] = {
-#ifdef _MSC_VER
- { SparcSolaris::TGT_O_RDONLY, _O_RDONLY },
- { SparcSolaris::TGT_O_WRONLY, _O_WRONLY },
- { SparcSolaris::TGT_O_RDWR, _O_RDWR },
- { SparcSolaris::TGT_O_APPEND, _O_APPEND },
- { SparcSolaris::TGT_O_CREAT, _O_CREAT },
- { SparcSolaris::TGT_O_TRUNC, _O_TRUNC },
- { SparcSolaris::TGT_O_EXCL, _O_EXCL },
-#ifdef _O_NONBLOCK
- { SparcSolaris::TGT_O_NONBLOCK, _O_NONBLOCK },
- { SparcSolaris::TGT_O_NDELAY , _O_NONBLOCK },
-#endif
-#ifdef _O_NOCTTY
- { SparcSolaris::TGT_O_NOCTTY, _O_NOCTTY },
-#endif
-#ifdef _O_SYNC
- { SparcSolaris::TGT_O_SYNC, _O_SYNC },
- { SparcSolaris::TGT_O_DSYNC, _O_SYNC },
- { SparcSolaris::TGT_O_RSYNC, _O_SYNC },
-#endif
-#else /* !_MSC_VER */
- { SparcSolaris::TGT_O_RDONLY, O_RDONLY },
- { SparcSolaris::TGT_O_WRONLY, O_WRONLY },
- { SparcSolaris::TGT_O_RDWR, O_RDWR },
- { SparcSolaris::TGT_O_APPEND, O_APPEND },
- { SparcSolaris::TGT_O_CREAT, O_CREAT },
- { SparcSolaris::TGT_O_TRUNC, O_TRUNC },
- { SparcSolaris::TGT_O_EXCL, O_EXCL },
- { SparcSolaris::TGT_O_NONBLOCK, O_NONBLOCK },
- { SparcSolaris::TGT_O_NDELAY , O_NONBLOCK },
- { SparcSolaris::TGT_O_NOCTTY, O_NOCTTY },
-#ifdef O_SYNC
- { SparcSolaris::TGT_O_SYNC, O_SYNC },
- { SparcSolaris::TGT_O_DSYNC, O_SYNC },
- { SparcSolaris::TGT_O_RSYNC, O_SYNC },
-#endif
-#endif /* _MSC_VER */
-};
-
-const int SparcSolaris::NUM_OPEN_FLAGS =
- (sizeof(SparcSolaris::openFlagTable)/sizeof(SparcSolaris::openFlagTable[0]));
-
diff --git a/arch/sparc/solaris/solaris.hh b/arch/sparc/solaris/solaris.hh
deleted file mode 100644
index 6833a2d6a..000000000
--- a/arch/sparc/solaris/solaris.hh
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * Copyright (c) 2003-2005 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef __ARCH_SPARC_SOLARIS_SOLARIS_HH__
-#define __ARCH_SPARC_SOLARIS_SOLARIS_HH__
-
-#include "kern/solaris/solaris.hh"
-
-class SparcSolaris : public Solaris
-{
- public:
-
- static OpenFlagTransTable openFlagTable[];
-
- static const int TGT_O_RDONLY = 0x00000000; //!< O_RDONLY
- static const int TGT_O_WRONLY = 0x00000001; //!< O_WRONLY
- static const int TGT_O_RDWR = 0x00000002; //!< O_RDWR
- static const int TGT_O_NDELAY = 0x00000004; //!< O_NONBLOCK
- static const int TGT_O_APPEND = 0x00000008; //!< O_APPEND
- static const int TGT_O_SYNC = 0x00000010; //!< O_SYNC
- static const int TGT_O_DSYNC = 0x00000040; //!< O_SYNC
- static const int TGT_O_RSYNC = 0x00008000; //!< O_SYNC
- static const int TGT_O_NONBLOCK = 0x00000080; //!< O_NONBLOCK
- static const int TGT_O_PRIV = 0x00001000; //??
- static const int TGT_O_LARGEFILE = 0x00002000; //??
- static const int TGT_O_CREAT = 0x00000100; //!< O_CREAT
- static const int TGT_O_TRUNC = 0x00000200; //!< O_TRUNC
- static const int TGT_O_EXCL = 0x00000400; //!< O_EXCL
- static const int TGT_O_NOCTTY = 0x00000800; //!< O_NOCTTY
- static const int TGT_O_XATTR = 0x00004000; //??
-
- static const int NUM_OPEN_FLAGS;
-
- static const unsigned TGT_MAP_ANONYMOUS = 0x100;
-};
-
-#endif
diff --git a/arch/sparc/stacktrace.hh b/arch/sparc/stacktrace.hh
deleted file mode 100644
index 1d8d97a79..000000000
--- a/arch/sparc/stacktrace.hh
+++ /dev/null
@@ -1,119 +0,0 @@
-/*
- * Copyright (c) 2005 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef __ARCH_ALPHA_STACKTRACE_HH__
-#define __ARCH_ALPHA_STACKTRACE_HH__
-
-#include "base/trace.hh"
-#include "cpu/static_inst.hh"
-
-class ExecContext;
-class StackTrace;
-
-class ProcessInfo
-{
- private:
- ExecContext *xc;
-
- int thread_info_size;
- int task_struct_size;
- int task_off;
- int pid_off;
- int name_off;
-
- public:
- ProcessInfo(ExecContext *_xc);
-
- Addr task(Addr ksp) const;
- int pid(Addr ksp) const;
- std::string name(Addr ksp) const;
-};
-
-class StackTrace
-{
- protected:
- typedef TheISA::MachInst MachInst;
- private:
- ExecContext *xc;
- std::vector<Addr> stack;
-
- private:
- bool isEntry(Addr addr);
- bool decodePrologue(Addr sp, Addr callpc, Addr func, int &size, Addr &ra);
- bool decodeSave(MachInst inst, int &reg, int &disp);
- bool decodeStack(MachInst inst, int &disp);
-
- void trace(ExecContext *xc, bool is_call);
-
- public:
- StackTrace();
- StackTrace(ExecContext *xc, StaticInstPtr inst);
- ~StackTrace();
-
- void clear()
- {
- xc = 0;
- stack.clear();
- }
-
- bool valid() const { return xc != NULL; }
- bool trace(ExecContext *xc, StaticInstPtr inst);
-
- public:
- const std::vector<Addr> &getstack() const { return stack; }
-
- static const int user = 1;
- static const int console = 2;
- static const int unknown = 3;
-
-#if TRACING_ON
- private:
- void dump();
-
- public:
- void dprintf() { if (DTRACE(Stack)) dump(); }
-#else
- public:
- void dprintf() {}
-#endif
-};
-
-inline bool
-StackTrace::trace(ExecContext *xc, StaticInstPtr inst)
-{
- if (!inst->isCall() && !inst->isReturn())
- return false;
-
- if (valid())
- clear();
-
- trace(xc, !inst->isReturn());
- return true;
-}
-
-#endif // __ARCH_ALPHA_STACKTRACE_HH__
diff --git a/arch/sparc/system.cc b/arch/sparc/system.cc
deleted file mode 100644
index 1e2882607..000000000
--- a/arch/sparc/system.cc
+++ /dev/null
@@ -1,200 +0,0 @@
-/*
- * Copyright (c) 2002-2006 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "arch/sparc/system.hh"
-#include "arch/vtophys.hh"
-#include "base/remote_gdb.hh"
-#include "base/loader/object_file.hh"
-#include "base/loader/symtab.hh"
-#include "base/trace.hh"
-#include "mem/physical.hh"
-#include "sim/byteswap.hh"
-#include "sim/builder.hh"
-
-
-using namespace BigEndianGuest;
-
-SparcSystem::SparcSystem(Params *p)
- : System(p)
-{
- resetSymtab = new SymbolTable;
- hypervisorSymtab = new SymbolTable;
- openbootSymtab = new SymbolTable;
-
-
- /**
- * Load the boot code, and hypervisor into memory.
- */
- // Read the reset binary
- reset = createObjectFile(params()->reset_bin);
- if (reset == NULL)
- fatal("Could not load reset binary %s", params()->reset_bin);
-
- // Read the openboot binary
- openboot = createObjectFile(params()->openboot_bin);
- if (openboot == NULL)
- fatal("Could not load openboot bianry %s", params()->openboot_bin);
-
- // Read the hypervisor binary
- hypervisor = createObjectFile(params()->hypervisor_bin);
- if (hypervisor == NULL)
- fatal("Could not load hypervisor binary %s", params()->hypervisor_bin);
-
-
- // Load reset binary into memory
- reset->loadSections(&functionalPort, SparcISA::LoadAddrMask);
- // Load the openboot binary
- openboot->loadSections(&functionalPort, SparcISA::LoadAddrMask);
- // Load the hypervisor binary
- hypervisor->loadSections(&functionalPort, SparcISA::LoadAddrMask);
-
- // load symbols
- if (!reset->loadGlobalSymbols(reset))
- panic("could not load reset symbols\n");
-
- if (!openboot->loadGlobalSymbols(openbootSymtab))
- panic("could not load openboot symbols\n");
-
- if (!hypervisor->loadLocalSymbols(hypervisorSymtab))
- panic("could not load hypervisor symbols\n");
-
- // load symbols into debug table
- if (!reset->loadGlobalSymbols(debugSymbolTable))
- panic("could not load reset symbols\n");
-
- if (!openboot->loadGlobalSymbols(debugSymbolTable))
- panic("could not load openboot symbols\n");
-
- if (!hypervisor->loadLocalSymbols(debugSymbolTable))
- panic("could not load hypervisor symbols\n");
-
-
- // @todo any fixup code over writing data in binaries on setting break
- // events on functions should happen here.
-
-}
-
-SparcSystem::~SparcSystem()
-{
- delete resetSymtab;
- delete hypervisorSymtab;
- delete openbootSymtab;
- delete reset;
- delete openboot;
- delete hypervisor;
-}
-
-bool
-SparcSystem::breakpoint()
-{
- panic("Need to implement");
-}
-
-void
-SparcSystem::serialize(std::ostream &os)
-{
- System::serialize(os);
- resetSymtab->serialize("reset_symtab", os);
- hypervisorSymtab->serialize("hypervisor_symtab", os);
- openbootSymtab->serialize("openboot_symtab", os);
-}
-
-
-void
-SparcSystem::unserialize(Checkpoint *cp, const std::string &section)
-{
- System::unserialize(cp,section);
- resetSymtab->unserialize("reset_symtab", cp, section);
- hypervisorSymtab->unserialize("hypervisor_symtab", cp, section);
- openbootSymtab->unserialize("openboot_symtab", cp, section);
-}
-
-
-BEGIN_DECLARE_SIM_OBJECT_PARAMS(SparcSystem)
-
- SimObjectParam<PhysicalMemory *> physmem;
-
- Param<std::string> kernel;
- Param<std::string> reset_bin;
- Param<std::string> hypervisor_bin;
- Param<std::string> openboot_bin;
-
- Param<std::string> boot_osflags;
- Param<std::string> readfile;
- Param<unsigned int> init_param;
-
- Param<bool> bin;
- VectorParam<std::string> binned_fns;
- Param<bool> bin_int;
-
-END_DECLARE_SIM_OBJECT_PARAMS(SparcSystem)
-
-BEGIN_INIT_SIM_OBJECT_PARAMS(SparcSystem)
-
- INIT_PARAM(boot_cpu_frequency, "Frequency of the boot CPU"),
- INIT_PARAM(physmem, "phsyical memory"),
- INIT_PARAM(kernel, "file that contains the kernel code"),
- INIT_PARAM(reset_bin, "file that contains the reset code"),
- INIT_PARAM(hypervisor_bin, "file that contains the hypervisor code"),
- INIT_PARAM(openboot_bin, "file that contains the openboot code"),
- INIT_PARAM_DFLT(boot_osflags, "flags to pass to the kernel during boot",
- "a"),
- INIT_PARAM_DFLT(readfile, "file to read startup script from", ""),
- INIT_PARAM_DFLT(init_param, "numerical value to pass into simulator", 0),
- INIT_PARAM_DFLT(system_type, "Type of system we are emulating", 34),
- INIT_PARAM_DFLT(system_rev, "Revision of system we are emulating", 1<<10),
- INIT_PARAM_DFLT(bin, "is this system to be binned", false),
- INIT_PARAM(binned_fns, "functions to be broken down and binned"),
- INIT_PARAM_DFLT(bin_int, "is interrupt code binned seperately?", true)
-
-END_INIT_SIM_OBJECT_PARAMS(SparcSystem)
-
-CREATE_SIM_OBJECT(SparcSystem)
-{
- SparcSystem::Params *p = new SparcSystem::Params;
- p->name = getInstanceName();
- p->boot_cpu_frequency = boot_cpu_frequency;
- p->physmem = physmem;
- p->kernel_path = kernel;
- p->reset_bin = reset_bin;
- p->hypervisor_bin = hypervisor_bin;
- p->openboot_bin = openboot_bin;
- p->boot_osflags = boot_osflags;
- p->init_param = init_param;
- p->readfile = readfile;
- p->system_type = system_type;
- p->system_rev = system_rev;
- p->bin = bin;
- p->binned_fns = binned_fns;
- p->bin_int = bin_int;
- return new SparcSystem(p);
-}
-
-REGISTER_SIM_OBJECT("SparcSystem", SparcSystem)
-
-
diff --git a/arch/sparc/system.hh b/arch/sparc/system.hh
deleted file mode 100644
index 27aa8768a..000000000
--- a/arch/sparc/system.hh
+++ /dev/null
@@ -1,114 +0,0 @@
-/*
- * Copyright (c) 2002-2005 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef __ARCH_SPARC_SYSTEM_HH__
-#define __ARCH_SPARC_SYSTEM_HH__
-
-#include <string>
-#include <vector>
-
-#include "base/loader/symtab.hh"
-#include "cpu/pc_event.hh"
-#include "kern/system_events.hh"
-#include "sim/sim_object.hh"
-#include "sim/system.hh"
-
-class SparcSystem : public System
-{
- public:
- struct Params : public System::Params
- {
- std::string reset_bin;
- std::string hypervison_bin;
- std::string openboot_bin;
- std::string boot_osflags;
- uint64_t system_type;
- uint64_t system_rev;
- };
-
- SparcSystem(Params *p);
-
- ~SparcaSystem();
-
- virtual bool breakpoint();
-
-/**
- * Serialization stuff
- */
- public:
- virtual void serialize(std::ostream &os);
- virtual void unserialize(Checkpoint *cp, const std::string &section);
-
- /** reset binary symbol table */
- SymbolTable *resetSymtab;
-
- /** hypervison binary symbol table */
- SymbolTable *hypervisorSymtab;
-
- /** openboot symbol table */
- SymbolTable *openbootSymtab;
-
- /** Object pointer for the reset binary */
- ObjectFile *reset;
-
- /** Object pointer for the hypervisor code */
- ObjectFile *hypervisor;
-
- /** Object pointer for the openboot code */
- ObjectFile *openboot;
-
- protected:
- const Params *params() const { return (const Params *)_params; }
-
- /** Add a function-based event to reset binary. */
- template <class T>
- T *SparcSystem::addResetFuncEvent(const char *lbl)
- {
- return addFuncEvent<T>(resetSymtab, lbl);
- }
-
- /** Add a function-based event to the hypervisor. */
- template <class T>
- T *SparcSystem::addHypervisorFuncEvent(const char *lbl)
- {
- return addFuncEvent<T>(hypervisorSymtab, lbl);
- }
-
- /** Add a function-based event to the openboot. */
- template <class T>
- T *SparcSystem::addOpenbootFuncEvent(const char *lbl)
- {
- return addFuncEvent<T>(openbootSymtab, lbl);
- }
-
- virtual Addr fixFuncEventAddr(Addr addr);
-
-};
-
-#endif
-
diff --git a/arch/sparc/utility.hh b/arch/sparc/utility.hh
deleted file mode 100644
index 1e67b3370..000000000
--- a/arch/sparc/utility.hh
+++ /dev/null
@@ -1,89 +0,0 @@
-/*
- * Copyright (c) 2003-2005 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef __ARCH_SPARC_UTILITY_HH__
-#define __ARCH_SPARC_UTILITY_HH__
-
-#include "arch/sparc/isa_traits.hh"
-#include "base/misc.hh"
-
-namespace SparcISA
-{
- inline ExtMachInst
- makeExtMI(MachInst inst, const Addr &pc) {
- return ExtMachInst(inst);
- }
-
- inline bool isCallerSaveIntegerRegister(unsigned int reg) {
- panic("register classification not implemented");
- return false;
- }
-
- inline bool isCalleeSaveIntegerRegister(unsigned int reg) {
- panic("register classification not implemented");
- return false;
- }
-
- inline bool isCallerSaveFloatRegister(unsigned int reg) {
- panic("register classification not implemented");
- return false;
- }
-
- inline bool isCalleeSaveFloatRegister(unsigned int reg) {
- panic("register classification not implemented");
- return false;
- }
-
- // Instruction address compression hooks
- inline Addr realPCToFetchPC(const Addr &addr)
- {
- return addr;
- }
-
- inline Addr fetchPCToRealPC(const Addr &addr)
- {
- return addr;
- }
-
- // the size of "fetched" instructions (not necessarily the size
- // of real instructions for PISA)
- inline size_t fetchInstSize()
- {
- return sizeof(MachInst);
- }
-
- /**
- * Function to insure ISA semantics about 0 registers.
- * @param xc The execution context.
- */
- template <class XC>
- void zeroRegisters(XC *xc);
-
-} // namespace SparcISA
-
-#endif