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-rw-r--r--arch/alpha/tru64/process.cc16
-rw-r--r--arch/mips/isa/decoder.isa12
-rw-r--r--arch/mips/isa/formats/util.isa4
-rw-r--r--arch/mips/isa_traits.hh54
4 files changed, 58 insertions, 28 deletions
diff --git a/arch/alpha/tru64/process.cc b/arch/alpha/tru64/process.cc
index 355d7f3e6..f795cc8fe 100644
--- a/arch/alpha/tru64/process.cc
+++ b/arch/alpha/tru64/process.cc
@@ -63,28 +63,28 @@ getsysinfoFunc(SyscallDesc *desc, int callnum, Process *process,
switch (op) {
- case Tru64::GSI_MAX_CPU: {
+ case Tru64::OSFlags::GSI_MAX_CPU: {
TypedBufferArg<uint32_t> max_cpu(xc->getSyscallArg(1));
*max_cpu = htog((uint32_t)process->numCpus());
max_cpu.copyOut(xc->getMemPort());
return 1;
}
- case Tru64::GSI_CPUS_IN_BOX: {
+ case Tru64::OSFlags::GSI_CPUS_IN_BOX: {
TypedBufferArg<uint32_t> cpus_in_box(xc->getSyscallArg(1));
*cpus_in_box = htog((uint32_t)process->numCpus());
cpus_in_box.copyOut(xc->getMemPort());
return 1;
}
- case Tru64::GSI_PHYSMEM: {
+ case Tru64::OSFlags::GSI_PHYSMEM: {
TypedBufferArg<uint64_t> physmem(xc->getSyscallArg(1));
*physmem = htog((uint64_t)1024 * 1024); // physical memory in KB
physmem.copyOut(xc->getMemPort());
return 1;
}
- case Tru64::GSI_CPU_INFO: {
+ case Tru64::OSFlags::GSI_CPU_INFO: {
TypedBufferArg<Tru64::cpu_info> infop(xc->getSyscallArg(1));
infop->current_cpu = htog(0);
@@ -101,14 +101,14 @@ getsysinfoFunc(SyscallDesc *desc, int callnum, Process *process,
return 1;
}
- case Tru64::GSI_PROC_TYPE: {
+ case Tru64::OSFlags::GSI_PROC_TYPE: {
TypedBufferArg<uint64_t> proc_type(xc->getSyscallArg(1));
*proc_type = htog((uint64_t)11);
proc_type.copyOut(xc->getMemPort());
return 1;
}
- case Tru64::GSI_PLATFORM_NAME: {
+ case Tru64::OSFlags::GSI_PLATFORM_NAME: {
BufferArg bufArg(xc->getSyscallArg(1), nbytes);
strncpy((char *)bufArg.bufferPtr(),
"COMPAQ Professional Workstation XP1000",
@@ -117,7 +117,7 @@ getsysinfoFunc(SyscallDesc *desc, int callnum, Process *process,
return 1;
}
- case Tru64::GSI_CLK_TCK: {
+ case Tru64::OSFlags::GSI_CLK_TCK: {
TypedBufferArg<uint64_t> clk_hz(xc->getSyscallArg(1));
*clk_hz = htog((uint64_t)1024);
clk_hz.copyOut(xc->getMemPort());
@@ -140,7 +140,7 @@ setsysinfoFunc(SyscallDesc *desc, int callnum, Process *process,
unsigned op = xc->getSyscallArg(0);
switch (op) {
- case Tru64::SSI_IEEE_FP_CONTROL:
+ case Tru64::OSFlags::SSI_IEEE_FP_CONTROL:
warn("setsysinfo: ignoring ieee_set_fp_control() arg 0x%x\n",
xc->getSyscallArg(1));
break;
diff --git a/arch/mips/isa/decoder.isa b/arch/mips/isa/decoder.isa
index 35e5fa75b..ffedfbca8 100644
--- a/arch/mips/isa/decoder.isa
+++ b/arch/mips/isa/decoder.isa
@@ -143,9 +143,11 @@ decode OPCODE_HI default Unknown::unknown() {
}});
0x1: multu({{
- int64_t temp1 = Rs.uw * Rt.uw;
- xc->setMiscReg(Hi,temp1<63:32>);
- xc->setMiscReg(Lo,temp1<31:0>);
+ uint64_t temp1 = Rs.uw * Rt.uw;
+ uint32_t hi_val = temp1<63:32>;
+ uint32_t lo_val = temp1<31:0>;
+ xc->setMiscReg(Hi,hi_val);
+ xc->setMiscReg(Lo,lo_val);
}});
0x2: div({{
@@ -154,8 +156,8 @@ decode OPCODE_HI default Unknown::unknown() {
}});
0x3: divu({{
- xc->setMiscReg(Hi,Rs.uw % Rt.uw);
- xc->setMiscReg(Lo,Rs.uw / Rt.uw);
+ xc->setMiscReg(Hi,Rs.uw % Rt.uw);
+ xc->setMiscReg(Lo,Rs.uw / Rt.uw);
}});
}
}
diff --git a/arch/mips/isa/formats/util.isa b/arch/mips/isa/formats/util.isa
index db4bf204a..dcdf46757 100644
--- a/arch/mips/isa/formats/util.isa
+++ b/arch/mips/isa/formats/util.isa
@@ -93,7 +93,9 @@ def LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
output exec {{
-using namespace MipsISA;
+ using namespace MipsISA;
+
+
/// CLEAR ALL CPU INST/EXE HAZARDS
diff --git a/arch/mips/isa_traits.hh b/arch/mips/isa_traits.hh
index 22ae76a44..62ed7acf0 100644
--- a/arch/mips/isa_traits.hh
+++ b/arch/mips/isa_traits.hh
@@ -163,8 +163,46 @@ namespace MipsISA
MiscReg_DepTag = 67
};
- typedef uint64_t IntReg;
+ struct OSFlags
+ {
+ //@{
+ /// open(2) flag values.
+ static const int TGT_O_RDONLY = 00000000; //!< O_RDONLY
+ static const int TGT_O_WRONLY = 00000001; //!< O_WRONLY
+ static const int TGT_O_RDWR = 00000002; //!< O_RDWR
+ static const int TGT_O_NONBLOCK = 00000004; //!< O_NONBLOCK
+ static const int TGT_O_APPEND = 00000010; //!< O_APPEND
+ static const int TGT_O_CREAT = 00001000; //!< O_CREAT
+ static const int TGT_O_TRUNC = 00002000; //!< O_TRUNC
+ static const int TGT_O_EXCL = 00004000; //!< O_EXCL
+ static const int TGT_O_NOCTTY = 00010000; //!< O_NOCTTY
+ static const int TGT_O_SYNC = 00040000; //!< O_SYNC
+ static const int TGT_O_DRD = 00100000; //!< O_DRD
+ static const int TGT_O_DIRECTIO = 00200000; //!< O_DIRECTIO
+ static const int TGT_O_CACHE = 00400000; //!< O_CACHE
+ static const int TGT_O_DSYNC = 02000000; //!< O_DSYNC
+ static const int TGT_O_RSYNC = 04000000; //!< O_RSYNC
+ //@}
+
+ /// For mmap().
+ static const unsigned TGT_MAP_ANONYMOUS = 0x800;
+
+ //@{
+ /// ioctl() command codes.
+ static const unsigned TIOCGETP = 0x40067408;
+ static const unsigned TIOCSETP = 0x80067409;
+ static const unsigned TIOCSETN = 0x8006740a;
+ static const unsigned TIOCSETC = 0x80067411;
+ static const unsigned TIOCGETC = 0x40067412;
+ static const unsigned FIONREAD = 0x4004667f;
+ static const unsigned TIOCISATTY = 0x2000745e;
+ static const unsigned TIOCGETS = 0x402c7413;
+ static const unsigned TIOCGETA = 0x40127417;
+ //@}
+ };
+
+ typedef uint64_t IntReg;
class IntRegFile
{
protected:
@@ -188,21 +226,9 @@ namespace MipsISA
};
-/* floating point register file entry type
- typedef union {
- uint64_t q;
- double d;
- } FloatReg;*/
-
typedef double FloatReg;
typedef uint64_t FloatRegBits;
-
-/*typedef union {
- uint64_t q[NumFloatRegs]; // integer qword view
- double d[NumFloatRegs]; // double-precision floating point view
- } FloatRegFile;*/
-
- class FloatRegFile
+ class FloatRegFile
{
protected:
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-18 08:29:11 +0000