diff options
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/alpha/alpha_linux_process.cc | 26 | ||||
| -rw-r--r-- | arch/alpha/alpha_memory.cc | 31 | ||||
| -rw-r--r-- | arch/alpha/alpha_tru64_process.cc | 50 | ||||
| -rw-r--r-- | arch/alpha/isa_desc | 293 | ||||
| -rw-r--r-- | arch/alpha/isa_traits.hh | 42 | ||||
| -rw-r--r-- | arch/alpha/pseudo_inst.cc | 2 | ||||
| -rw-r--r-- | arch/alpha/vptr.hh | 11 | ||||
| -rwxr-xr-x | arch/isa_parser.py | 6 |
8 files changed, 284 insertions, 177 deletions
diff --git a/arch/alpha/alpha_linux_process.cc b/arch/alpha/alpha_linux_process.cc index 67bb0ab3b..600de4447 100644 --- a/arch/alpha/alpha_linux_process.cc +++ b/arch/alpha/alpha_linux_process.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003-2004 The Regents of The University of Michigan + * Copyright (c) 2003-2005 The Regents of The University of Michigan * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -26,24 +26,24 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +#include <dirent.h> #include <errno.h> -#include <unistd.h> #include <fcntl.h> // for host open() flags -#include <sys/types.h> -#include <sys/stat.h> #include <string.h> // for memset() -#include <dirent.h> +#include <sys/stat.h> +#include <sys/types.h> +#include <unistd.h> -#include "sim/host.hh" #include "cpu/base_cpu.hh" -#include "mem/functional_mem/functional_memory.hh" -#include "sim/process.hh" #include "cpu/exec_context.hh" +#include "mem/functional_mem/functional_memory.hh" #include "sim/fake_syscall.hh" +#include "sim/host.hh" +#include "sim/process.hh" #include "sim/sim_events.hh" -#include "sim/syscall_emul.hh" #include "arch/alpha/alpha_common_syscall_emul.hh" +#include "sim/syscall_emul.hh" #include "sim/universe.hh" // for curTick & ticksPerSecond #include "arch/alpha/alpha_linux_process.hh" @@ -232,7 +232,7 @@ class Linux { static const char *hostname; /// Target uname() handler. - static int + static SyscallReturn unameFunc(SyscallDesc *desc, int callnum, Process *process, ExecContext *xc) { @@ -251,7 +251,7 @@ class Linux { /// Target osf_getsysyinfo() handler. Even though this call is /// borrowed from Tru64, the subcases that get used appear to be /// different in practice from those used by Tru64 processes. - static int + static SyscallReturn osf_getsysinfoFunc(SyscallDesc *desc, int callnum, Process *process, ExecContext *xc) { @@ -278,7 +278,7 @@ class Linux { } /// Target osf_setsysinfo() handler. - static int + static SyscallReturn osf_setsysinfoFunc(SyscallDesc *desc, int callnum, Process *process, ExecContext *xc) { @@ -306,7 +306,7 @@ class Linux { } /// Target fnctl() handler. - static int + static SyscallReturn fcntlFunc(SyscallDesc *desc, int callnum, Process *process, ExecContext *xc) { diff --git a/arch/alpha/alpha_memory.cc b/arch/alpha/alpha_memory.cc index 81a1902a0..8f6d7a51a 100644 --- a/arch/alpha/alpha_memory.cc +++ b/arch/alpha/alpha_memory.cc @@ -68,24 +68,27 @@ AlphaTLB::~AlphaTLB() AlphaISA::PTE * AlphaTLB::lookup(Addr vpn, uint8_t asn) const { - DPRINTF(TLB, "lookup %#x, asn %#x\n", vpn, (int)asn); + // assume not found... + AlphaISA::PTE *retval = NULL; PageTable::const_iterator i = lookupTable.find(vpn); - if (i == lookupTable.end()) - return NULL; - - while (i->first == vpn) { - int index = i->second; - AlphaISA::PTE *pte = &table[index]; - assert(pte->valid); - if (vpn == pte->tag && (pte->asma || pte->asn == asn)) - return pte; + if (i != lookupTable.end()) { + while (i->first == vpn) { + int index = i->second; + AlphaISA::PTE *pte = &table[index]; + assert(pte->valid); + if (vpn == pte->tag && (pte->asma || pte->asn == asn)) { + retval = pte; + break; + } - ++i; + ++i; + } } - // not found... - return NULL; + DPRINTF(TLB, "lookup %#x, asn %#x -> %s ppn %#x\n", vpn, (int)asn, + retval ? "hit" : "miss", retval ? retval->ppn : 0); + return retval; } @@ -501,6 +504,8 @@ AlphaDTB::translate(MemReqPtr &req, bool write) const */ if (req->vaddr & (req->size - 1)) { fault(req, write ? MM_STAT_WR_MASK : 0); + DPRINTF(TLB, "Alignment Fault on %#x, size = %d", req->vaddr, + req->size); return Alignment_Fault; } diff --git a/arch/alpha/alpha_tru64_process.cc b/arch/alpha/alpha_tru64_process.cc index 149569f14..22e74cb40 100644 --- a/arch/alpha/alpha_tru64_process.cc +++ b/arch/alpha/alpha_tru64_process.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2001-2004 The Regents of The University of Michigan + * Copyright (c) 2001-2005 The Regents of The University of Michigan * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -476,7 +476,7 @@ class Tru64 { static const char *hostname; /// Target uname() handler. - static int + static SyscallReturn unameFunc(SyscallDesc *desc, int callnum, Process *process, ExecContext *xc) { @@ -494,7 +494,7 @@ class Tru64 { /// Target getsysyinfo() handler. - static int + static SyscallReturn getsysinfoFunc(SyscallDesc *desc, int callnum, Process *process, ExecContext *xc) { @@ -574,7 +574,7 @@ class Tru64 { } /// Target fnctl() handler. - static int + static SyscallReturn fcntlFunc(SyscallDesc *desc, int callnum, Process *process, ExecContext *xc) { @@ -618,7 +618,7 @@ class Tru64 { /// Target getdirentries() handler. - static int + static SyscallReturn getdirentriesFunc(SyscallDesc *desc, int callnum, Process *process, ExecContext *xc) { @@ -669,11 +669,11 @@ class Tru64 { *basep = host_basep; basep.copyOut(xc->mem); - return (tgt_buf_ptr - tgt_buf); + return tgt_buf_ptr - tgt_buf; } /// Target sigreturn() handler. - static int + static SyscallReturn sigreturnFunc(SyscallDesc *desc, int callnum, Process *process, ExecContext *xc) { @@ -699,7 +699,7 @@ class Tru64 { } /// Target table() handler. - static int + static SyscallReturn tableFunc(SyscallDesc *desc, int callnum, Process *process, ExecContext *xc) { @@ -749,7 +749,7 @@ class Tru64 { // /// Create a stack region for a thread. - static int + static SyscallReturn stack_createFunc(SyscallDesc *desc, int callnum, Process *process, ExecContext *xc) { @@ -776,7 +776,7 @@ class Tru64 { /// This call sets up the interface between the user and kernel /// schedulers by creating a shared-memory region. The shared memory /// region has several structs, some global, some per-RAD, some per-VP. - static int + static SyscallReturn nxm_task_initFunc(SyscallDesc *desc, int callnum, Process *process, ExecContext *xc) { @@ -899,7 +899,7 @@ class Tru64 { } /// Create thread. - static int + static SyscallReturn nxm_thread_createFunc(SyscallDesc *desc, int callnum, Process *process, ExecContext *xc) { @@ -1011,7 +1011,7 @@ class Tru64 { } /// Thread idle call (like yield()). - static int + static SyscallReturn nxm_idleFunc(SyscallDesc *desc, int callnum, Process *process, ExecContext *xc) { @@ -1019,7 +1019,7 @@ class Tru64 { } /// Block thread. - static int + static SyscallReturn nxm_thread_blockFunc(SyscallDesc *desc, int callnum, Process *process, ExecContext *xc) { @@ -1036,7 +1036,7 @@ class Tru64 { } /// block. - static int + static SyscallReturn nxm_blockFunc(SyscallDesc *desc, int callnum, Process *process, ExecContext *xc) { @@ -1057,7 +1057,7 @@ class Tru64 { } /// Unblock thread. - static int + static SyscallReturn nxm_unblockFunc(SyscallDesc *desc, int callnum, Process *process, ExecContext *xc) { @@ -1070,7 +1070,7 @@ class Tru64 { } /// Switch thread priority. - static int + static SyscallReturn swtch_priFunc(SyscallDesc *desc, int callnum, Process *process, ExecContext *xc) { @@ -1081,7 +1081,7 @@ class Tru64 { // // Since we assume at most one "kernel" thread per CPU, it's // always safe to return false here. - return false; + return 0; //false; } @@ -1154,7 +1154,7 @@ class Tru64 { } /// Lock acquire syscall handler. - static int + static SyscallReturn m5_mutex_lockFunc(SyscallDesc *desc, int callnum, Process *process, ExecContext *xc) { @@ -1169,7 +1169,7 @@ class Tru64 { } /// Try lock (non-blocking). - static int + static SyscallReturn m5_mutex_trylockFunc(SyscallDesc *desc, int callnum, Process *process, ExecContext *xc) { @@ -1189,7 +1189,7 @@ class Tru64 { } /// Unlock syscall handler. - static int + static SyscallReturn m5_mutex_unlockFunc(SyscallDesc *desc, int callnum, Process *process, ExecContext *xc) { @@ -1201,7 +1201,7 @@ class Tru64 { } /// Signal ocndition. - static int + static SyscallReturn m5_cond_signalFunc(SyscallDesc *desc, int callnum, Process *process, ExecContext *xc) { @@ -1214,7 +1214,7 @@ class Tru64 { } /// Wake up all processes waiting on the condition variable. - static int + static SyscallReturn m5_cond_broadcastFunc(SyscallDesc *desc, int callnum, Process *process, ExecContext *xc) { @@ -1226,7 +1226,7 @@ class Tru64 { } /// Wait on a condition. - static int + static SyscallReturn m5_cond_waitFunc(SyscallDesc *desc, int callnum, Process *process, ExecContext *xc) { @@ -1248,7 +1248,7 @@ class Tru64 { } /// Thread exit. - static int + static SyscallReturn m5_thread_exitFunc(SyscallDesc *desc, int callnum, Process *process, ExecContext *xc) { @@ -1291,7 +1291,7 @@ class Tru64 { } /// Indirect syscall invocation (call #0). - static int + static SyscallReturn indirectSyscallFunc(SyscallDesc *desc, int callnum, Process *process, ExecContext *xc) { diff --git a/arch/alpha/isa_desc b/arch/alpha/isa_desc index 5154d78d1..0e07400d3 100644 --- a/arch/alpha/isa_desc +++ b/arch/alpha/isa_desc @@ -187,15 +187,16 @@ output header {{ /// Print a register name for disassembly given the unique /// dependence tag number (FP or int). - void printReg(std::ostream &os, int reg); + void printReg(std::ostream &os, int reg) const; - std::string generateDisassembly(Addr pc, const SymbolTable *symtab); + std::string + generateDisassembly(Addr pc, const SymbolTable *symtab) const; }; }}; output decoder {{ void - AlphaStaticInst::printReg(std::ostream &os, int reg) + AlphaStaticInst::printReg(std::ostream &os, int reg) const { if (reg < FP_Base_DepTag) { ccprintf(os, "r%d", reg); @@ -206,7 +207,8 @@ output decoder {{ } std::string - AlphaStaticInst::generateDisassembly(Addr pc, const SymbolTable *symtab) + AlphaStaticInst::generateDisassembly(Addr pc, + const SymbolTable *symtab) const { std::stringstream ss; @@ -237,7 +239,7 @@ output decoder {{ // Declarations for execute() methods. def template BasicExecDeclare {{ - Fault execute(%(CPU_exec_context)s *, Trace::InstRecord *); + Fault execute(%(CPU_exec_context)s *, Trace::InstRecord *) const; }}; // Basic instruction class declaration template. @@ -267,7 +269,7 @@ def template BasicConstructor {{ // Basic instruction class execute method template. def template BasicExecute {{ Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, - Trace::InstRecord *traceData) + Trace::InstRecord *traceData) const { Fault fault = No_Fault; @@ -330,14 +332,16 @@ output header {{ ~Nop() { } - std::string generateDisassembly(Addr pc, const SymbolTable *symtab); + std::string + generateDisassembly(Addr pc, const SymbolTable *symtab) const; %(BasicExecDeclare)s }; }}; output decoder {{ - std::string Nop::generateDisassembly(Addr pc, const SymbolTable *symtab) + std::string Nop::generateDisassembly(Addr pc, + const SymbolTable *symtab) const { #ifdef SS_COMPATIBLE_DISASSEMBLY return originalDisassembly; @@ -360,7 +364,7 @@ output decoder {{ output exec {{ Fault - Nop::execute(%(CPU_exec_context)s *, Trace::InstRecord *) + Nop::execute(%(CPU_exec_context)s *, Trace::InstRecord *) const { return No_Fault; } @@ -410,13 +414,14 @@ output header {{ { } - std::string generateDisassembly(Addr pc, const SymbolTable *symtab); + std::string + generateDisassembly(Addr pc, const SymbolTable *symtab) const; }; }}; output decoder {{ std::string - IntegerImm::generateDisassembly(Addr pc, const SymbolTable *symtab) + IntegerImm::generateDisassembly(Addr pc, const SymbolTable *symtab) const { std::stringstream ss; @@ -588,12 +593,13 @@ output header {{ } #if defined(linux) - int getC99RoundingMode(uint64_t fpcr_val); + int getC99RoundingMode(uint64_t fpcr_val) const; #endif // This differs from the AlphaStaticInst version only in // printing suffixes for non-default rounding & trapping modes. - std::string generateDisassembly(Addr pc, const SymbolTable *symtab); + std::string + generateDisassembly(Addr pc, const SymbolTable *symtab) const; }; }}; @@ -618,7 +624,7 @@ def template FloatingPointDecode {{ output decoder {{ #if defined(linux) int - AlphaFP::getC99RoundingMode(uint64_t fpcr_val) + AlphaFP::getC99RoundingMode(uint64_t fpcr_val) const { if (roundingMode == Dynamic) { return alphaToC99RoundingMode[bits(fpcr_val, 59, 58)]; @@ -630,7 +636,7 @@ output decoder {{ #endif std::string - AlphaFP::generateDisassembly(Addr pc, const SymbolTable *symtab) + AlphaFP::generateDisassembly(Addr pc, const SymbolTable *symtab) const { std::string mnem_str(mnemonic); @@ -751,7 +757,8 @@ output header {{ { } - std::string generateDisassembly(Addr pc, const SymbolTable *symtab); + std::string + generateDisassembly(Addr pc, const SymbolTable *symtab) const; public: @@ -790,81 +797,33 @@ output header {{ protected: /// Constructor MemoryNoDisp(const char *mnem, MachInst _machInst, OpClass __opClass, - StaticInstPtr<AlphaISA> _eaCompPtr, - StaticInstPtr<AlphaISA> _memAccPtr) + StaticInstPtr<AlphaISA> _eaCompPtr = nullStaticInstPtr, + StaticInstPtr<AlphaISA> _memAccPtr = nullStaticInstPtr) : Memory(mnem, _machInst, __opClass, _eaCompPtr, _memAccPtr) { } - std::string generateDisassembly(Addr pc, const SymbolTable *symtab); - }; - - - /** - * Base class for "fake" effective-address computation - * instructions returnded by eaCompInst(). - */ - class EACompBase : public AlphaStaticInst - { - public: - /// Constructor - EACompBase(MachInst machInst) - : AlphaStaticInst("(eacomp)", machInst, IntAluOp) - { - } - - %(BasicExecDeclare)s - }; - - /** - * Base class for "fake" memory-access instructions returnded by - * memAccInst(). - */ - class MemAccBase : public AlphaStaticInst - { - public: - /// Constructor - MemAccBase(MachInst machInst, OpClass __opClass) - : AlphaStaticInst("(memacc)", machInst, __opClass) - { - } - - %(BasicExecDeclare)s + std::string + generateDisassembly(Addr pc, const SymbolTable *symtab) const; }; - }}; output decoder {{ std::string - Memory::generateDisassembly(Addr pc, const SymbolTable *symtab) + Memory::generateDisassembly(Addr pc, const SymbolTable *symtab) const { return csprintf("%-10s %c%d,%d(r%d)", mnemonic, flags[IsFloating] ? 'f' : 'r', RA, MEMDISP, RB); } std::string - MemoryNoDisp::generateDisassembly(Addr pc, const SymbolTable *symtab) + MemoryNoDisp::generateDisassembly(Addr pc, const SymbolTable *symtab) const { return csprintf("%-10s (r%d)", mnemonic, RB); } }}; -output exec {{ - Fault - EACompBase::execute(%(CPU_exec_context)s *, Trace::InstRecord *) - { - panic("attempt to execute eacomp"); - } - - Fault - MemAccBase::execute(%(CPU_exec_context)s *, Trace::InstRecord *) - { - panic("attempt to execute memacc"); - } -}}; - - def format LoadAddress(code) {{ iop = InstObjParams(name, Name, 'MemoryDisp32', CodeBlock(code)) header_output = BasicDeclare.subst(iop) @@ -885,21 +844,25 @@ def template LoadStoreDeclare {{ /** * "Fake" effective address computation class for "%(mnemonic)s". */ - class EAComp : public EACompBase + class EAComp : public %(base_class)s { public: /// Constructor EAComp(MachInst machInst); + + %(BasicExecDeclare)s }; /** * "Fake" memory access instruction class for "%(mnemonic)s". */ - class MemAcc : public MemAccBase + class MemAcc : public %(base_class)s { public: /// Constructor MemAcc(MachInst machInst); + + %(BasicExecDeclare)s }; public: @@ -912,14 +875,17 @@ def template LoadStoreDeclare {{ }}; def template LoadStoreConstructor {{ + /** TODO: change op_class to AddrGenOp or something (requires + * creating new member of OpClass enum in op_class.hh, updating + * config files, etc.). */ inline %(class_name)s::EAComp::EAComp(MachInst machInst) - : EACompBase(machInst) + : %(base_class)s("%(mnemonic)s (EAComp)", machInst, IntAluOp) { %(ea_constructor)s; } inline %(class_name)s::MemAcc::MemAcc(MachInst machInst) - : MemAccBase(machInst, %(op_class)s) + : %(base_class)s("%(mnemonic)s (MemAcc)", machInst, %(op_class)s) { %(memacc_constructor)s; } @@ -932,9 +898,67 @@ def template LoadStoreConstructor {{ } }}; + +def template EACompExecute {{ + Fault + %(class_name)s::EAComp::execute(%(CPU_exec_context)s *xc, + Trace::InstRecord *traceData) const + { + Addr EA; + Fault fault = No_Fault; + + %(fp_enable_check)s; + %(op_decl)s; + %(op_rd)s; + %(code)s; + + if (fault == No_Fault) { + %(op_wb)s; + xc->setEA(EA); + } + + return fault; + } +}}; + +def template MemAccExecute {{ + Fault + %(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc, + Trace::InstRecord *traceData) const + { + Addr EA; + Fault fault = No_Fault; + + %(fp_enable_check)s; + %(op_decl)s; + %(op_nonmem_rd)s; + EA = xc->getEA(); + + if (fault == No_Fault) { + %(op_mem_rd)s; + %(code)s; + } + + if (fault == No_Fault) { + %(op_mem_wb)s; + } + + if (fault == No_Fault) { + %(postacc_code)s; + } + + if (fault == No_Fault) { + %(op_nonmem_wb)s; + } + + return fault; + } +}}; + + def template LoadStoreExecute {{ Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, - Trace::InstRecord *traceData) + Trace::InstRecord *traceData) const { Addr EA; Fault fault = No_Fault; @@ -968,7 +992,7 @@ def template LoadStoreExecute {{ def template PrefetchExecute {{ Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, - Trace::InstRecord *traceData) + Trace::InstRecord *traceData) const { Addr EA; Fault fault = No_Fault; @@ -1022,18 +1046,33 @@ def LoadStoreBase(name, Name, ea_code, memacc_code, postacc_code = '', # Would be nice to autogenerate this list, but oh well. valid_mem_flags = ['LOCKED', 'NO_FAULT', 'EVICT_NEXT', 'PF_EXCLUSIVE'] - inst_flags = [] - mem_flags = [] - for f in flags: - if f in valid_mem_flags: - mem_flags.append(f) - else: - inst_flags.append(f) + mem_flags = [f for f in flags if f in valid_mem_flags] + inst_flags = [f for f in flags if f not in valid_mem_flags] + + # add hook to get effective addresses into execution trace output. + ea_code += '\nif (traceData) { traceData->setAddr(EA); }\n' + # generate code block objects ea_cblk = CodeBlock(ea_code) memacc_cblk = CodeBlock(memacc_code) postacc_cblk = CodeBlock(postacc_code) + # Some CPU models execute the memory operation as an atomic unit, + # while others want to separate them into an effective address + # computation and a memory access operation. As a result, we need + # to generate three StaticInst objects. Note that the latter two + # are nested inside the larger "atomic" one. + + # generate InstObjParams for EAComp object + ea_iop = InstObjParams(name, Name, base_class, ea_cblk, inst_flags) + + # generate InstObjParams for MemAcc object + memacc_iop = InstObjParams(name, Name, base_class, memacc_cblk, inst_flags) + # in the split execution model, the MemAcc portion is responsible + # for the post-access code. + memacc_iop.postacc_code = postacc_cblk.code + + # generate InstObjParams for unified execution cblk = CodeBlock(ea_code + memacc_code + postacc_code) iop = InstObjParams(name, Name, base_class, cblk, inst_flags) @@ -1043,13 +1082,17 @@ def LoadStoreBase(name, Name, ea_code, memacc_code, postacc_code = '', iop.memacc_code = memacc_cblk.code iop.postacc_code = postacc_cblk.code - mem_flags = string.join(mem_flags, '|') - if mem_flags != '': - iop.constructor += '\n\tmemAccessFlags = ' + mem_flags + ';' + if mem_flags: + s = '\n\tmemAccessFlags = ' + string.join(mem_flags, '|') + ';' + iop.constructor += s + memacc_iop.constructor += s # (header_output, decoder_output, decode_block, exec_output) return (LoadStoreDeclare.subst(iop), LoadStoreConstructor.subst(iop), - decode_template.subst(iop), exec_template.subst(iop)) + decode_template.subst(iop), + EACompExecute.subst(ea_iop) + + MemAccExecute.subst(memacc_iop) + + exec_template.subst(iop)) }}; @@ -1123,9 +1166,9 @@ output header {{ { protected: /// Cached program counter from last disassembly - Addr cachedPC; + mutable Addr cachedPC; /// Cached symbol table pointer from last disassembly - const SymbolTable *cachedSymtab; + mutable const SymbolTable *cachedSymtab; /// Constructor PCDependentDisassembly(const char *mnem, MachInst _machInst, @@ -1135,7 +1178,8 @@ output header {{ { } - const std::string &disassemble(Addr pc, const SymbolTable *symtab); + const std::string & + disassemble(Addr pc, const SymbolTable *symtab) const; }; /** @@ -1157,7 +1201,8 @@ output header {{ Addr branchTarget(Addr branchPC) const; - std::string generateDisassembly(Addr pc, const SymbolTable *symtab); + std::string + generateDisassembly(Addr pc, const SymbolTable *symtab) const; }; /** @@ -1181,7 +1226,8 @@ output header {{ Addr branchTarget(ExecContext *xc) const; - std::string generateDisassembly(Addr pc, const SymbolTable *symtab); + std::string + generateDisassembly(Addr pc, const SymbolTable *symtab) const; }; }}; @@ -1201,7 +1247,8 @@ output decoder {{ } const std::string & - PCDependentDisassembly::disassemble(Addr pc, const SymbolTable *symtab) + PCDependentDisassembly::disassemble(Addr pc, + const SymbolTable *symtab) const { if (!cachedDisassembly || pc != cachedPC || symtab != cachedSymtab) @@ -1219,7 +1266,7 @@ output decoder {{ } std::string - Branch::generateDisassembly(Addr pc, const SymbolTable *symtab) + Branch::generateDisassembly(Addr pc, const SymbolTable *symtab) const { std::stringstream ss; @@ -1257,7 +1304,7 @@ output decoder {{ } std::string - Jump::generateDisassembly(Addr pc, const SymbolTable *symtab) + Jump::generateDisassembly(Addr pc, const SymbolTable *symtab) const { std::stringstream ss; @@ -1356,13 +1403,15 @@ output header {{ { } - std::string generateDisassembly(Addr pc, const SymbolTable *symtab); + std::string + generateDisassembly(Addr pc, const SymbolTable *symtab) const; }; }}; output decoder {{ std::string - EmulatedCallPal::generateDisassembly(Addr pc, const SymbolTable *symtab) + EmulatedCallPal::generateDisassembly(Addr pc, + const SymbolTable *symtab) const { #ifdef SS_COMPATIBLE_DISASSEMBLY return csprintf("%s %s", "call_pal", mnemonic); @@ -1398,7 +1447,8 @@ output header {{ CallPalBase(const char *mnem, MachInst _machInst, OpClass __opClass); - std::string generateDisassembly(Addr pc, const SymbolTable *symtab); + std::string + generateDisassembly(Addr pc, const SymbolTable *symtab) const; }; }}; @@ -1428,7 +1478,7 @@ output decoder {{ } std::string - CallPalBase::generateDisassembly(Addr pc, const SymbolTable *symtab) + CallPalBase::generateDisassembly(Addr pc, const SymbolTable *symtab) const { return csprintf("%-10s %#x", "call_pal", palFunc); } @@ -1460,10 +1510,11 @@ output header {{ /// Constructor HwLoadStore(const char *mnem, MachInst _machInst, OpClass __opClass, - StaticInstPtr<AlphaISA> _eaCompPtr, - StaticInstPtr<AlphaISA> _memAccPtr); + StaticInstPtr<AlphaISA> _eaCompPtr = nullStaticInstPtr, + StaticInstPtr<AlphaISA> _memAccPtr = nullStaticInstPtr); - std::string generateDisassembly(Addr pc, const SymbolTable *symtab); + std::string + generateDisassembly(Addr pc, const SymbolTable *symtab) const; }; }}; @@ -1485,7 +1536,7 @@ output decoder {{ } std::string - HwLoadStore::generateDisassembly(Addr pc, const SymbolTable *symtab) + HwLoadStore::generateDisassembly(Addr pc, const SymbolTable *symtab) const { #ifdef SS_COMPATIBLE_DISASSEMBLY return csprintf("%-10s r%d,%d(r%d)", mnemonic, RA, disp, RB); @@ -1536,13 +1587,14 @@ output header {{ { } - std::string generateDisassembly(Addr pc, const SymbolTable *symtab); + std::string + generateDisassembly(Addr pc, const SymbolTable *symtab) const; }; }}; output decoder {{ std::string - HwMoveIPR::generateDisassembly(Addr pc, const SymbolTable *symtab) + HwMoveIPR::generateDisassembly(Addr pc, const SymbolTable *symtab) const { if (_numSrcRegs > 0) { // must be mtpr @@ -1558,7 +1610,8 @@ output decoder {{ }}; def format HwMoveIPR(code) {{ - iop = InstObjParams(name, Name, 'HwMoveIPR', CodeBlock(code)) + iop = InstObjParams(name, Name, 'HwMoveIPR', CodeBlock(code), + ['IprAccessOp']) header_output = BasicDeclare.subst(iop) decoder_output = BasicConstructor.subst(iop) decode_block = BasicDecode.subst(iop) @@ -1593,7 +1646,8 @@ output header {{ %(BasicExecDeclare)s - std::string generateDisassembly(Addr pc, const SymbolTable *symtab); + std::string + generateDisassembly(Addr pc, const SymbolTable *symtab) const; }; /** @@ -1609,7 +1663,7 @@ output header {{ { private: /// Have we warned on this instruction yet? - bool warned; + mutable bool warned; public: /// Constructor @@ -1623,19 +1677,22 @@ output header {{ %(BasicExecDeclare)s - std::string generateDisassembly(Addr pc, const SymbolTable *symtab); + std::string + generateDisassembly(Addr pc, const SymbolTable *symtab) const; }; }}; output decoder {{ std::string - FailUnimplemented::generateDisassembly(Addr pc, const SymbolTable *symtab) + FailUnimplemented::generateDisassembly(Addr pc, + const SymbolTable *symtab) const { return csprintf("%-10s (unimplemented)", mnemonic); } std::string - WarnUnimplemented::generateDisassembly(Addr pc, const SymbolTable *symtab) + WarnUnimplemented::generateDisassembly(Addr pc, + const SymbolTable *symtab) const { #ifdef SS_COMPATIBLE_DISASSEMBLY return csprintf("%-10s", mnemonic); @@ -1648,7 +1705,7 @@ output decoder {{ output exec {{ Fault FailUnimplemented::execute(%(CPU_exec_context)s *xc, - Trace::InstRecord *traceData) + Trace::InstRecord *traceData) const { panic("attempt to execute unimplemented instruction '%s' " "(inst 0x%08x, opcode 0x%x)", mnemonic, machInst, OPCODE); @@ -1657,7 +1714,7 @@ output exec {{ Fault WarnUnimplemented::execute(%(CPU_exec_context)s *xc, - Trace::InstRecord *traceData) + Trace::InstRecord *traceData) const { if (!warned) { warn("instruction '%s' unimplemented\n", mnemonic); @@ -1699,7 +1756,8 @@ output header {{ %(BasicExecDeclare)s - std::string generateDisassembly(Addr pc, const SymbolTable *symtab); + std::string + generateDisassembly(Addr pc, const SymbolTable *symtab) const; }; }}; @@ -1710,7 +1768,7 @@ output header {{ output decoder {{ std::string - Unknown::generateDisassembly(Addr pc, const SymbolTable *symtab) + Unknown::generateDisassembly(Addr pc, const SymbolTable *symtab) const { return csprintf("%-10s (inst 0x%x, opcode 0x%x)", "unknown", machInst, OPCODE); @@ -1719,7 +1777,8 @@ output decoder {{ output exec {{ Fault - Unknown::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) + Unknown::execute(%(CPU_exec_context)s *xc, + Trace::InstRecord *traceData) const { panic("attempt to execute unknown instruction " "(inst 0x%08x, opcode 0x%x)", machInst, OPCODE); @@ -2507,7 +2566,7 @@ decode OPCODE default Unknown::unknown() { } format BasicOperate { - 0x1e: hw_rei({{ xc->hwrei(); }}); + 0x1e: hw_rei({{ xc->hwrei(); }}, IsSerializing); // M5 special opcodes use the reserved 0x01 opcode space 0x01: decode M5FUNC { diff --git a/arch/alpha/isa_traits.hh b/arch/alpha/isa_traits.hh index ff3da1502..9327fa88b 100644 --- a/arch/alpha/isa_traits.hh +++ b/arch/alpha/isa_traits.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003-2004 The Regents of The University of Michigan + * Copyright (c) 2003-2005 The Regents of The University of Michigan * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -175,6 +175,9 @@ static const Addr PageOffset = PageBytes - 1; static StaticInstPtr<AlphaISA> decodeInst(MachInst); + // return a no-op instruction... used for instruction fetch faults + static const MachInst NoopMachInst; + enum annotes { ANNOTE_NONE = 0, // An impossible number for instruction annotations @@ -283,6 +286,43 @@ const int ArgumentReg1 = TheISA::ArgumentReg1; const int BranchPredAddrShiftAmt = TheISA::BranchPredAddrShiftAmt; const int MaxAddr = (Addr)-1; +#ifndef FULL_SYSTEM +class SyscallReturn { + public: + template <class T> + SyscallReturn(T v, bool s) + { + retval = (uint64_t)v; + success = s; + } + + template <class T> + SyscallReturn(T v) + { + success = (v >= 0); + retval = (uint64_t)v; + } + + ~SyscallReturn() {} + + SyscallReturn& operator=(const SyscallReturn& s) { + retval = s.retval; + success = s.success; + return *this; + } + + bool successful() { return success; } + uint64_t value() { return retval; } + + + private: + uint64_t retval; + bool success; +}; + +#endif + + #ifdef FULL_SYSTEM typedef TheISA::InternalProcReg InternalProcReg; const int NumInternalProcRegs = TheISA::NumInternalProcRegs; diff --git a/arch/alpha/pseudo_inst.cc b/arch/alpha/pseudo_inst.cc index 95c85b45a..22d65638b 100644 --- a/arch/alpha/pseudo_inst.cc +++ b/arch/alpha/pseudo_inst.cc @@ -206,7 +206,7 @@ namespace AlphaPseudo void checkParams(); }; - Context context("PseudoInsts"); + Context context("pseudo_inst"); Param<bool> __quiesce(&context, "quiesce", "enable quiesce instructions", diff --git a/arch/alpha/vptr.hh b/arch/alpha/vptr.hh index cd4bc547b..e955c67cf 100644 --- a/arch/alpha/vptr.hh +++ b/arch/alpha/vptr.hh @@ -26,8 +26,8 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#ifndef __VPTR_HH__ -#define __VPTR_HH__ +#ifndef __ARCH_ALPHA_VPTR_HH__ +#define __ARCH_ALPHA_VPTR_HH__ #include "arch/alpha/vtophys.hh" @@ -69,14 +69,15 @@ class VPtr const VPtr<T> &operator+=(int offset) { ptr += offset; - assert((ptr & (ALPHA_PGBYTES - 1)) + sizeof(T) < ALPHA_PGBYTES); + assert((ptr & (AlphaISA::PageBytes - 1)) + sizeof(T) + < AlphaISA::PageBytes); return *this; } const VPtr<T> &operator=(Addr p) { - assert((p & (ALPHA_PGBYTES - 1)) + sizeof(T) < ALPHA_PGBYTES); + assert((p & (AlphaISA::PageBytes)) + sizeof(T) < AlphaISA::PageBytes); ptr = p; return *this; @@ -110,4 +111,4 @@ class VPtr } }; -#endif // __VPTR_HH__ +#endif // __ARCH_ALPHA_VPTR_HH__ diff --git a/arch/isa_parser.py b/arch/isa_parser.py index c0b5131de..18e4b0a45 100755 --- a/arch/isa_parser.py +++ b/arch/isa_parser.py @@ -1210,10 +1210,12 @@ class MemOperandTraits(OperandTraits): def makeWrite(self, op_desc): (size, type, is_signed) = operandSizeMap[op_desc.eff_ext] eff_type = 'uint%d_t' % size - return 'fault = xc->write((%s&)%s, EA, %s_flags,' \ - ' &%s_write_result);\n' \ + wb = 'fault = xc->write((%s&)%s, EA, %s_flags, &%s_write_result);\n' \ % (eff_type, op_desc.munged_name, op_desc.base_name, op_desc.base_name) + wb += 'if (traceData) { traceData->setData(%s); }' % \ + op_desc.munged_name + return wb class NPCOperandTraits(OperandTraits): def makeConstructor(self, op_desc): |