diff options
Diffstat (limited to 'configs/common')
| -rw-r--r-- | configs/common/BPConfig.py | 2 | ||||
| -rw-r--r-- | configs/common/Benchmarks.py | 2 | ||||
| -rw-r--r-- | configs/common/CacheConfig.py | 2 | ||||
| -rw-r--r-- | configs/common/CpuConfig.py | 2 | ||||
| -rw-r--r-- | configs/common/FSConfig.py | 2 | ||||
| -rw-r--r-- | configs/common/GPUTLBConfig.py | 8 | ||||
| -rw-r--r-- | configs/common/HMC.py | 20 | ||||
| -rw-r--r-- | configs/common/MemConfig.py | 6 | ||||
| -rw-r--r-- | configs/common/Options.py | 5 | ||||
| -rw-r--r-- | configs/common/PlatformConfig.py | 2 | ||||
| -rw-r--r-- | configs/common/Simulation.py | 36 | ||||
| -rw-r--r-- | configs/common/SysPaths.py | 10 | ||||
| -rw-r--r-- | configs/common/cores/arm/HPI.py | 2 | ||||
| -rw-r--r-- | configs/common/cpu2000.py | 12 |
14 files changed, 59 insertions, 52 deletions
diff --git a/configs/common/BPConfig.py b/configs/common/BPConfig.py index 5e5b92f8a..c4e40e791 100644 --- a/configs/common/BPConfig.py +++ b/configs/common/BPConfig.py @@ -79,7 +79,7 @@ def print_bp_list(): def bp_names(): """Return a list of valid Branch Predictor names.""" - return _bp_classes.keys() + return list(_bp_classes.keys()) # Add all BPs in the object hierarchy. for name, cls in inspect.getmembers(m5.objects, is_bp_class): diff --git a/configs/common/Benchmarks.py b/configs/common/Benchmarks.py index b7d10b563..f7d1b4d1e 100644 --- a/configs/common/Benchmarks.py +++ b/configs/common/Benchmarks.py @@ -141,6 +141,6 @@ Benchmarks = { None, 'android-ics')] } -benchs = Benchmarks.keys() +benchs = list(Benchmarks.keys()) benchs.sort() DefinedBenchmarks = ", ".join(benchs) diff --git a/configs/common/CacheConfig.py b/configs/common/CacheConfig.py index 3fa3676b0..368356f06 100644 --- a/configs/common/CacheConfig.py +++ b/configs/common/CacheConfig.py @@ -97,7 +97,7 @@ def config_cache(options, system): if options.memchecker: system.memchecker = MemChecker() - for i in xrange(options.num_cpus): + for i in range(options.num_cpus): if options.caches: icache = icache_class(size=options.l1i_size, assoc=options.l1i_assoc) diff --git a/configs/common/CpuConfig.py b/configs/common/CpuConfig.py index 1524b1646..80e3766ef 100644 --- a/configs/common/CpuConfig.py +++ b/configs/common/CpuConfig.py @@ -99,7 +99,7 @@ def print_cpu_list(): def cpu_names(): """Return a list of valid CPU names.""" - return _cpu_classes.keys() + return list(_cpu_classes.keys()) def config_etrace(cpu_cls, cpu_list, options): if issubclass(cpu_cls, m5.objects.DerivO3CPU): diff --git a/configs/common/FSConfig.py b/configs/common/FSConfig.py index fc21519ab..13c29ef1c 100644 --- a/configs/common/FSConfig.py +++ b/configs/common/FSConfig.py @@ -548,7 +548,7 @@ def makeX86System(mem_mode, numCPUs=1, mdesc=None, self=None, Ruby=False): # Set up the Intel MP table base_entries = [] ext_entries = [] - for i in xrange(numCPUs): + for i in range(numCPUs): bp = X86IntelMPProcessor( local_apic_id = i, local_apic_version = 0x14, diff --git a/configs/common/GPUTLBConfig.py b/configs/common/GPUTLBConfig.py index 3e47f1d3b..80aad0b78 100644 --- a/configs/common/GPUTLBConfig.py +++ b/configs/common/GPUTLBConfig.py @@ -69,7 +69,7 @@ def Coalescer_constructor(level): def create_TLB_Coalescer(options, my_level, my_index, TLB_name, Coalescer_name): # arguments: options, TLB level, number of private structures for this Level, # TLB name and Coalescer name - for i in xrange(my_index): + for i in range(my_index): TLB_name.append(eval(TLB_constructor(my_level))) Coalescer_name.append(eval(Coalescer_constructor(my_level))) @@ -109,7 +109,7 @@ def config_tlb_hierarchy(options, system, shader_idx): # Create the hiearchy # Call the appropriate constructors and add objects to the system - for i in xrange(len(TLB_hierarchy)): + for i in range(len(TLB_hierarchy)): hierarchy_level = TLB_hierarchy[i] level = i+1 for TLB_type in hierarchy_level: @@ -143,7 +143,7 @@ def config_tlb_hierarchy(options, system, shader_idx): # Each TLB is connected with its Coalescer through a single port. # There is a one-to-one mapping of TLBs to Coalescers at a given level # This won't be modified no matter what the hierarchy looks like. - for i in xrange(len(TLB_hierarchy)): + for i in range(len(TLB_hierarchy)): hierarchy_level = TLB_hierarchy[i] level = i+1 for TLB_type in hierarchy_level: @@ -159,7 +159,7 @@ def config_tlb_hierarchy(options, system, shader_idx): name = TLB_type['name'] num_TLBs = TLB_type['width'] if name == 'l1': # L1 D-TLBs - tlb_per_cu = num_TLBs / n_cu + tlb_per_cu = num_TLBs // n_cu for cu_idx in range(n_cu): if tlb_per_cu: for tlb in range(tlb_per_cu): diff --git a/configs/common/HMC.py b/configs/common/HMC.py index 10d8a7185..61e521d52 100644 --- a/configs/common/HMC.py +++ b/configs/common/HMC.py @@ -337,16 +337,16 @@ def config_hmc_host_ctrl(opt, system): num_lanes=opt.num_lanes_per_link, link_speed=opt.serial_link_speed, delay=opt.total_ctrl_latency) for i in - xrange(opt.num_serial_links)] + range(opt.num_serial_links)] system.hmc_host.seriallink = sl # enable global monitor if opt.enable_global_monitor: system.hmc_host.lmonitor = [CommMonitor() for i in - xrange(opt.num_serial_links)] + range(opt.num_serial_links)] # set the clock frequency for serial link - for i in xrange(opt.num_serial_links): + for i in range(opt.num_serial_links): clk = opt.link_controller_frequency vd = VoltageDomain(voltage='1V') scd = SrcClockDomain(clock=clk, voltage_domain=vd) @@ -357,7 +357,7 @@ def config_hmc_host_ctrl(opt, system): hh = system.hmc_host if opt.arch == "distributed": mb = system.membus - for i in xrange(opt.num_links_controllers): + for i in range(opt.num_links_controllers): if opt.enable_global_monitor: mb.master = hh.lmonitor[i].slave hh.lmonitor[i].master = hh.seriallink[i].slave @@ -375,7 +375,7 @@ def config_hmc_host_ctrl(opt, system): mb.master = hh.seriallink[1].slave if opt.arch == "same": - for i in xrange(opt.num_links_controllers): + for i in range(opt.num_links_controllers): if opt.enable_global_monitor: hh.lmonitor[i].master = hh.seriallink[i].slave @@ -395,7 +395,7 @@ def config_hmc_dev(opt, system, hmc_host): system.mem_ranges = addr_ranges_vaults if opt.enable_link_monitor: - lm = [CommMonitor() for i in xrange(opt.num_links_controllers)] + lm = [CommMonitor() for i in range(opt.num_links_controllers)] system.hmc_dev.lmonitor = lm # 4 HMC Crossbars located in its logic-base (LoB) @@ -403,17 +403,17 @@ def config_hmc_dev(opt, system, hmc_host): frontend_latency=opt.xbar_frontend_latency, forward_latency=opt.xbar_forward_latency, response_latency=opt.xbar_response_latency) for i in - xrange(opt.number_mem_crossbar)] + range(opt.number_mem_crossbar)] system.hmc_dev.xbar = xb - for i in xrange(opt.number_mem_crossbar): + for i in range(opt.number_mem_crossbar): clk = opt.xbar_frequency vd = VoltageDomain(voltage='1V') scd = SrcClockDomain(clock=clk, voltage_domain=vd) system.hmc_dev.xbar[i].clk_domain = scd # Attach 4 serial link to 4 crossbar/s - for i in xrange(opt.num_serial_links): + for i in range(opt.num_serial_links): if opt.enable_link_monitor: system.hmc_host.seriallink[i].master = \ system.hmc_dev.lmonitor[i].slave @@ -429,7 +429,7 @@ def config_hmc_dev(opt, system, hmc_host): # create a list of buffers system.hmc_dev.buffers = [Bridge(req_size=opt.xbar_buffer_size_req, resp_size=opt.xbar_buffer_size_resp) - for i in xrange(numx*(opt.mem_chunk-1))] + for i in range(numx*(opt.mem_chunk-1))] # Buffer iterator it = iter(range(len(system.hmc_dev.buffers))) diff --git a/configs/common/MemConfig.py b/configs/common/MemConfig.py index 36035800f..b6e6663f9 100644 --- a/configs/common/MemConfig.py +++ b/configs/common/MemConfig.py @@ -86,7 +86,7 @@ def print_mem_list(): def mem_names(): """Return a list of valid memory names.""" - return _mem_classes.keys() + return list(_mem_classes.keys()) # Add all memory controllers in the object hierarchy. for name, cls in inspect.getmembers(m5.objects, is_mem_class): @@ -215,7 +215,7 @@ def config_mem(options, system): # array of controllers and set their parameters to match their # address mapping in the case of a DRAM for r in system.mem_ranges: - for i in xrange(nbr_mem_ctrls): + for i in range(nbr_mem_ctrls): mem_ctrl = create_mem_ctrl(cls, r, i, nbr_mem_ctrls, intlv_bits, intlv_size) # Set the number of ranks based on the command-line @@ -233,7 +233,7 @@ def config_mem(options, system): subsystem.mem_ctrls = mem_ctrls # Connect the controllers to the membus - for i in xrange(len(subsystem.mem_ctrls)): + for i in range(len(subsystem.mem_ctrls)): if opt_mem_type == "HMC_2500_1x32": subsystem.mem_ctrls[i].port = xbar[i/4].master # Set memory device size. There is an independent controller for diff --git a/configs/common/Options.py b/configs/common/Options.py index 7963013df..7b231c7df 100644 --- a/configs/common/Options.py +++ b/configs/common/Options.py @@ -339,8 +339,9 @@ def addFSOptions(parser): # System options parser.add_option("--kernel", action="store", type="string") parser.add_option("--os-type", action="store", type="choice", - choices=os_types[buildEnv['TARGET_ISA']], default="linux", - help="Specifies type of OS to boot") + choices=os_types[str(buildEnv['TARGET_ISA'])], + default="linux", + help="Specifies type of OS to boot") parser.add_option("--script", action="store", type="string") parser.add_option("--frame-capture", action="store_true", help="Stores changed frame buffers from the VNC server to compressed "\ diff --git a/configs/common/PlatformConfig.py b/configs/common/PlatformConfig.py index 306b7320d..ae55d1a16 100644 --- a/configs/common/PlatformConfig.py +++ b/configs/common/PlatformConfig.py @@ -103,7 +103,7 @@ def print_platform_list(): def platform_names(): """Return a list of valid Platform names.""" - return _platform_classes.keys() + _platform_aliases.keys() + return list(_platform_classes.keys()) + list(_platform_aliases.keys()) # Add all Platforms in the object hierarchy. for name, cls in inspect.getmembers(m5.objects, is_platform_class): diff --git a/configs/common/Simulation.py b/configs/common/Simulation.py index 19bd962e8..5b1ab0177 100644 --- a/configs/common/Simulation.py +++ b/configs/common/Simulation.py @@ -453,18 +453,18 @@ def run(options, root, testsys, cpu_class): switch_cpus = None if options.prog_interval: - for i in xrange(np): + for i in range(np): testsys.cpu[i].progress_interval = options.prog_interval if options.maxinsts: - for i in xrange(np): + for i in range(np): testsys.cpu[i].max_insts_any_thread = options.maxinsts if cpu_class: switch_cpus = [cpu_class(switched_out=True, cpu_id=(i)) - for i in xrange(np)] + for i in range(np)] - for i in xrange(np): + for i in range(np): if options.fast_forward: testsys.cpu[i].max_insts_any_thread = int(options.fast_forward) switch_cpus[i].system = testsys @@ -489,7 +489,7 @@ def run(options, root, testsys, cpu_class): CpuConfig.config_etrace(cpu_class, switch_cpus, options) testsys.switch_cpus = switch_cpus - switch_cpu_list = [(testsys.cpu[i], switch_cpus[i]) for i in xrange(np)] + switch_cpu_list = [(testsys.cpu[i], switch_cpus[i]) for i in range(np)] if options.repeat_switch: switch_class = getCPUClass(options.cpu_type)[0] @@ -502,9 +502,9 @@ def run(options, root, testsys, cpu_class): sys.exit(1) repeat_switch_cpus = [switch_class(switched_out=True, \ - cpu_id=(i)) for i in xrange(np)] + cpu_id=(i)) for i in range(np)] - for i in xrange(np): + for i in range(np): repeat_switch_cpus[i].system = testsys repeat_switch_cpus[i].workload = testsys.cpu[i].workload repeat_switch_cpus[i].clk_domain = testsys.cpu[i].clk_domain @@ -520,18 +520,18 @@ def run(options, root, testsys, cpu_class): if cpu_class: repeat_switch_cpu_list = [(switch_cpus[i], repeat_switch_cpus[i]) - for i in xrange(np)] + for i in range(np)] else: repeat_switch_cpu_list = [(testsys.cpu[i], repeat_switch_cpus[i]) - for i in xrange(np)] + for i in range(np)] if options.standard_switch: switch_cpus = [TimingSimpleCPU(switched_out=True, cpu_id=(i)) - for i in xrange(np)] + for i in range(np)] switch_cpus_1 = [DerivO3CPU(switched_out=True, cpu_id=(i)) - for i in xrange(np)] + for i in range(np)] - for i in xrange(np): + for i in range(np): switch_cpus[i].system = testsys switch_cpus_1[i].system = testsys switch_cpus[i].workload = testsys.cpu[i].workload @@ -572,8 +572,12 @@ def run(options, root, testsys, cpu_class): testsys.switch_cpus = switch_cpus testsys.switch_cpus_1 = switch_cpus_1 - switch_cpu_list = [(testsys.cpu[i], switch_cpus[i]) for i in xrange(np)] - switch_cpu_list1 = [(switch_cpus[i], switch_cpus_1[i]) for i in xrange(np)] + switch_cpu_list = [ + (testsys.cpu[i], switch_cpus[i]) for i in range(np) + ] + switch_cpu_list1 = [ + (switch_cpus[i], switch_cpus_1[i]) for i in range(np) + ] # set the checkpoint in the cpu before m5.instantiate is called if options.take_checkpoints != None and \ @@ -581,7 +585,7 @@ def run(options, root, testsys, cpu_class): offset = int(options.take_checkpoints) # Set an instruction break point if options.simpoint: - for i in xrange(np): + for i in range(np): if testsys.cpu[i].workload[0].simpoint == 0: fatal('no simpoint for testsys.cpu[%d].workload[0]', i) checkpoint_inst = int(testsys.cpu[i].workload[0].simpoint) + offset @@ -592,7 +596,7 @@ def run(options, root, testsys, cpu_class): options.take_checkpoints = offset # Set all test cpus with the right number of instructions # for the upcoming simulation - for i in xrange(np): + for i in range(np): testsys.cpu[i].max_insts_any_thread = offset if options.take_simpoint_checkpoints != None: diff --git a/configs/common/SysPaths.py b/configs/common/SysPaths.py index 9a234ccec..17d5fb864 100644 --- a/configs/common/SysPaths.py +++ b/configs/common/SysPaths.py @@ -26,6 +26,8 @@ # # Authors: Ali Saidi + +from six import string_types import os, sys config_path = os.path.dirname(os.path.abspath(__file__)) @@ -35,7 +37,7 @@ class PathSearchFunc(object): _sys_paths = None def __init__(self, subdirs, sys_paths=None): - if isinstance(subdirs, basestring): + if isinstance(subdirs, string_types): subdirs = [subdirs] self._subdir = os.path.join(*subdirs) if sys_paths: @@ -55,16 +57,16 @@ class PathSearchFunc(object): paths = filter(os.path.isdir, paths) if not paths: - raise IOError, "Can't find a path to system files." + raise IOError("Can't find a path to system files.") - self._sys_paths = paths + self._sys_paths = list(paths) filepath = os.path.join(self._subdir, filename) paths = (os.path.join(p, filepath) for p in self._sys_paths) try: return next(p for p in paths if os.path.exists(p)) except StopIteration: - raise IOError, "Can't find file '%s' on path." % filename + raise IOError("Can't find file '%s' on path." % filename) disk = PathSearchFunc('disks') binary = PathSearchFunc('binaries') diff --git a/configs/common/cores/arm/HPI.py b/configs/common/cores/arm/HPI.py index 2efb7dfec..d105790e3 100644 --- a/configs/common/cores/arm/HPI.py +++ b/configs/common/cores/arm/HPI.py @@ -177,7 +177,7 @@ def let(bindings, expr): defns = [] # Then apply them to the produced new env - for i in xrange(0, len(bindings)): + for i in range(0, len(bindings)): name, binding_expr = bindings[i] defns.append(binding_expr(new_env)) diff --git a/configs/common/cpu2000.py b/configs/common/cpu2000.py index da87507d9..8143e45de 100644 --- a/configs/common/cpu2000.py +++ b/configs/common/cpu2000.py @@ -93,13 +93,13 @@ class Benchmark(object): try: func = getattr(self.__class__, input_set) except AttributeError: - raise AttributeError, \ - 'The benchmark %s does not have the %s input set' % \ - (self.name, input_set) + raise AttributeError( + 'The benchmark %s does not have the %s input set' % \ + (self.name, input_set)) executable = joinpath(spec_dist, 'binaries', isa, os, self.binary) if not isfile(executable): - raise AttributeError, '%s not found' % executable + raise AttributeError('%s not found' % executable) self.executable = executable # root of tree for input & output data files @@ -113,7 +113,7 @@ class Benchmark(object): self.input_set = input_set if not isdir(inputs_dir): - raise AttributeError, '%s not found' % inputs_dir + raise AttributeError('%s not found' % inputs_dir) self.inputs_dir = [ inputs_dir ] if isdir(all_dir): @@ -670,7 +670,7 @@ class vortex(Benchmark): elif (isa == 'sparc' or isa == 'sparc32'): self.endian = 'bendian' else: - raise AttributeError, "unknown ISA %s" % isa + raise AttributeError("unknown ISA %s" % isa) super(vortex, self).__init__(isa, os, input_set) |