summaryrefslogtreecommitdiff
path: root/configs/common
diff options
context:
space:
mode:
Diffstat (limited to 'configs/common')
-rw-r--r--configs/common/BPConfig.py1
-rw-r--r--configs/common/Benchmarks.py3
-rw-r--r--configs/common/CacheConfig.py8
-rw-r--r--configs/common/Caches.py3
-rw-r--r--configs/common/CpuConfig.py4
-rw-r--r--configs/common/FSConfig.py5
-rw-r--r--configs/common/GPUTLBConfig.py1
-rw-r--r--configs/common/GPUTLBOptions.py3
-rw-r--r--configs/common/HMC.py3
-rw-r--r--configs/common/MemConfig.py3
-rw-r--r--configs/common/Options.py15
-rw-r--r--configs/common/PlatformConfig.py1
-rw-r--r--configs/common/SimpleOpts.py3
-rw-r--r--configs/common/Simulation.py7
-rw-r--r--configs/common/SysPaths.py2
-rw-r--r--configs/common/__init__.py4
-rw-r--r--configs/common/cores/__init__.py3
-rw-r--r--configs/common/cores/arm/HPI.py1
-rw-r--r--configs/common/cores/arm/O3_ARM_v7a.py2
-rw-r--r--configs/common/cores/arm/__init__.py5
-rw-r--r--configs/common/cores/arm/ex5_LITTLE.py3
-rw-r--r--configs/common/cores/arm/ex5_big.py3
-rw-r--r--configs/common/cpu2000.py1
23 files changed, 66 insertions, 18 deletions
diff --git a/configs/common/BPConfig.py b/configs/common/BPConfig.py
index c4e40e791..65e6d65a2 100644
--- a/configs/common/BPConfig.py
+++ b/configs/common/BPConfig.py
@@ -30,6 +30,7 @@
# hanle branch predictors instead of memory controllers / CPUs
from __future__ import print_function
+from __future__ import absolute_import
from m5 import fatal
import m5.objects
diff --git a/configs/common/Benchmarks.py b/configs/common/Benchmarks.py
index f7d1b4d1e..3cf963bd5 100644
--- a/configs/common/Benchmarks.py
+++ b/configs/common/Benchmarks.py
@@ -27,8 +27,9 @@
# Authors: Ali Saidi
from __future__ import print_function
+from __future__ import absolute_import
-from SysPaths import script, disk, binary
+from .SysPaths import script, disk, binary
from os import environ as env
from m5.defines import buildEnv
diff --git a/configs/common/CacheConfig.py b/configs/common/CacheConfig.py
index 368356f06..ab9d26735 100644
--- a/configs/common/CacheConfig.py
+++ b/configs/common/CacheConfig.py
@@ -42,10 +42,11 @@
#
from __future__ import print_function
+from __future__ import absolute_import
import m5
from m5.objects import *
-from Caches import *
+from .Caches import *
def config_cache(options, system):
if options.external_memory_system and (options.caches or options.l2cache):
@@ -57,13 +58,14 @@ def config_cache(options, system):
if options.cpu_type == "O3_ARM_v7a_3":
try:
- from cores.arm.O3_ARM_v7a import *
+ import cores.arm.O3_ARM_v7a as core
except:
print("O3_ARM_v7a_3 is unavailable. Did you compile the O3 model?")
sys.exit(1)
dcache_class, icache_class, l2_cache_class, walk_cache_class = \
- O3_ARM_v7a_DCache, O3_ARM_v7a_ICache, O3_ARM_v7aL2, \
+ core.O3_ARM_v7a_DCache, core.O3_ARM_v7a_ICache, \
+ core.O3_ARM_v7aL2, \
O3_ARM_v7aWalkCache
else:
dcache_class, icache_class, l2_cache_class, walk_cache_class = \
diff --git a/configs/common/Caches.py b/configs/common/Caches.py
index 926a41d07..f8edc8b6b 100644
--- a/configs/common/Caches.py
+++ b/configs/common/Caches.py
@@ -38,6 +38,9 @@
#
# Authors: Lisa Hsu
+from __future__ import print_function
+from __future__ import absolute_import
+
from m5.defines import buildEnv
from m5.objects import *
diff --git a/configs/common/CpuConfig.py b/configs/common/CpuConfig.py
index 80e3766ef..831287ddc 100644
--- a/configs/common/CpuConfig.py
+++ b/configs/common/CpuConfig.py
@@ -36,6 +36,7 @@
# Authors: Andreas Sandberg
from __future__ import print_function
+from __future__ import absolute_import
from m5 import fatal
import m5.objects
@@ -134,7 +135,8 @@ from m5.defines import buildEnv
from importlib import import_module
for package in [ "generic", buildEnv['TARGET_ISA']]:
try:
- package = import_module(".cores." + package, package=__package__)
+ package = import_module(".cores." + package,
+ package=__name__.rpartition('.')[0])
except ImportError:
# No timing models for this ISA
continue
diff --git a/configs/common/FSConfig.py b/configs/common/FSConfig.py
index 13c29ef1c..8b67c85e1 100644
--- a/configs/common/FSConfig.py
+++ b/configs/common/FSConfig.py
@@ -40,11 +40,12 @@
# Authors: Kevin Lim
from __future__ import print_function
+from __future__ import absolute_import
from m5.objects import *
-from Benchmarks import *
from m5.util import *
-from common import PlatformConfig
+from .Benchmarks import *
+from . import PlatformConfig
# Populate to reflect supported os types per target ISA
os_types = { 'alpha' : [ 'linux' ],
diff --git a/configs/common/GPUTLBConfig.py b/configs/common/GPUTLBConfig.py
index 80aad0b78..d93b68e2c 100644
--- a/configs/common/GPUTLBConfig.py
+++ b/configs/common/GPUTLBConfig.py
@@ -32,6 +32,7 @@
# Authors: Lisa Hsu
from __future__ import print_function
+from __future__ import absolute_import
# Configure the TLB hierarchy
# Places which would probably need to be modified if you
diff --git a/configs/common/GPUTLBOptions.py b/configs/common/GPUTLBOptions.py
index 9e370c131..fdcec5da2 100644
--- a/configs/common/GPUTLBOptions.py
+++ b/configs/common/GPUTLBOptions.py
@@ -31,6 +31,9 @@
#
# Authors: Myrto Papadopoulou
+from __future__ import print_function
+from __future__ import absolute_import
+
def tlb_options(parser):
#===================================================================
diff --git a/configs/common/HMC.py b/configs/common/HMC.py
index 61e521d52..08b217da2 100644
--- a/configs/common/HMC.py
+++ b/configs/common/HMC.py
@@ -122,6 +122,9 @@
# 2 Crossbars are connected to only local vaults. From other 2 crossbar, a
# request can be forwarded to any other vault.
+from __future__ import print_function
+from __future__ import absolute_import
+
import argparse
import m5
diff --git a/configs/common/MemConfig.py b/configs/common/MemConfig.py
index b6e6663f9..29c41388c 100644
--- a/configs/common/MemConfig.py
+++ b/configs/common/MemConfig.py
@@ -37,12 +37,13 @@
# Andreas Hansson
from __future__ import print_function
+from __future__ import absolute_import
import m5.objects
import inspect
import sys
-import HMC
from textwrap import TextWrapper
+from . import HMC
# Dictionary of mapping names of real memory controller models to
# classes.
diff --git a/configs/common/Options.py b/configs/common/Options.py
index 7b231c7df..6d9c9cf37 100644
--- a/configs/common/Options.py
+++ b/configs/common/Options.py
@@ -38,15 +38,18 @@
#
# Authors: Lisa Hsu
+from __future__ import print_function
+from __future__ import absolute_import
+
import m5
from m5.defines import buildEnv
from m5.objects import *
-from common.Benchmarks import *
-from common import CpuConfig
-from common import BPConfig
-from common import MemConfig
-from common import PlatformConfig
+from .Benchmarks import *
+from . import CpuConfig
+from . import BPConfig
+from . import MemConfig
+from . import PlatformConfig
def _listCpuTypes(option, opt, value, parser):
CpuConfig.print_cpu_list()
@@ -330,7 +333,7 @@ def addSEOptions(parser):
help="Redirect stderr to a file.")
def addFSOptions(parser):
- from FSConfig import os_types
+ from .FSConfig import os_types
# Simulation options
parser.add_option("--timesync", action="store_true",
diff --git a/configs/common/PlatformConfig.py b/configs/common/PlatformConfig.py
index ae55d1a16..0c2ef3649 100644
--- a/configs/common/PlatformConfig.py
+++ b/configs/common/PlatformConfig.py
@@ -39,6 +39,7 @@
# Pierre-Yves Peneau
from __future__ import print_function
+from __future__ import absolute_import
import m5.objects
import inspect
diff --git a/configs/common/SimpleOpts.py b/configs/common/SimpleOpts.py
index e2f122eab..32e3447b0 100644
--- a/configs/common/SimpleOpts.py
+++ b/configs/common/SimpleOpts.py
@@ -27,6 +27,9 @@
#
# Authors: Jason Power
+from __future__ import print_function
+from __future__ import absolute_import
+
""" Options wrapper for simple gem5 configuration scripts
This module wraps the optparse class so that we can register options
diff --git a/configs/common/Simulation.py b/configs/common/Simulation.py
index 5b1ab0177..d1b623dd1 100644
--- a/configs/common/Simulation.py
+++ b/configs/common/Simulation.py
@@ -40,14 +40,15 @@
# Authors: Lisa Hsu
from __future__ import print_function
+from __future__ import absolute_import
import sys
from os import getcwd
from os.path import join as joinpath
-from common import CpuConfig
-from common import BPConfig
-from common import MemConfig
+from . import CpuConfig
+from . import BPConfig
+from . import MemConfig
import m5
from m5.defines import buildEnv
diff --git a/configs/common/SysPaths.py b/configs/common/SysPaths.py
index 17d5fb864..e5d9f83b2 100644
--- a/configs/common/SysPaths.py
+++ b/configs/common/SysPaths.py
@@ -26,6 +26,8 @@
#
# Authors: Ali Saidi
+from __future__ import print_function
+from __future__ import absolute_import
from six import string_types
import os, sys
diff --git a/configs/common/__init__.py b/configs/common/__init__.py
index 1829385b6..5e72a6052 100644
--- a/configs/common/__init__.py
+++ b/configs/common/__init__.py
@@ -34,3 +34,7 @@
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Andreas Hansson
+
+from __future__ import print_function
+from __future__ import absolute_import
+
diff --git a/configs/common/cores/__init__.py b/configs/common/cores/__init__.py
index 7a2173eab..c61e6d8b5 100644
--- a/configs/common/cores/__init__.py
+++ b/configs/common/cores/__init__.py
@@ -34,3 +34,6 @@
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Andreas Sandberg
+
+from __future__ import print_function
+from __future__ import absolute_import
diff --git a/configs/common/cores/arm/HPI.py b/configs/common/cores/arm/HPI.py
index d105790e3..01c088470 100644
--- a/configs/common/cores/arm/HPI.py
+++ b/configs/common/cores/arm/HPI.py
@@ -46,6 +46,7 @@ at: http://www.arm.com/ResearchEnablement/SystemModeling
"""
from __future__ import print_function
+from __future__ import absolute_import
from m5.objects import *
diff --git a/configs/common/cores/arm/O3_ARM_v7a.py b/configs/common/cores/arm/O3_ARM_v7a.py
index b0ba1280f..3a1f9af7c 100644
--- a/configs/common/cores/arm/O3_ARM_v7a.py
+++ b/configs/common/cores/arm/O3_ARM_v7a.py
@@ -26,6 +26,8 @@
#
# Authors: Ron Dreslinski
+from __future__ import print_function
+from __future__ import absolute_import
from m5.objects import *
diff --git a/configs/common/cores/arm/__init__.py b/configs/common/cores/arm/__init__.py
index 582e6b859..b90b61eac 100644
--- a/configs/common/cores/arm/__init__.py
+++ b/configs/common/cores/arm/__init__.py
@@ -35,6 +35,9 @@
#
# Authors: Andreas Sandberg
+from __future__ import print_function
+from __future__ import absolute_import
+
from pkgutil import iter_modules
from importlib import import_module
@@ -44,7 +47,7 @@ _cpu_modules = [
for c in _cpu_modules:
try:
- import_module("." + c, package=__package__)
+ import_module("." + c, package=__name__)
except NameError:
# Failed to import a CPU model due to a missing
# dependency. This typically happens if gem5 has been compiled
diff --git a/configs/common/cores/arm/ex5_LITTLE.py b/configs/common/cores/arm/ex5_LITTLE.py
index 1ae0f16df..85fdd5541 100644
--- a/configs/common/cores/arm/ex5_LITTLE.py
+++ b/configs/common/cores/arm/ex5_LITTLE.py
@@ -29,6 +29,9 @@
# Anastasiia Butko
# Louisa Bessad
+from __future__ import print_function
+from __future__ import absolute_import
+
from m5.objects import *
#-----------------------------------------------------------------------
diff --git a/configs/common/cores/arm/ex5_big.py b/configs/common/cores/arm/ex5_big.py
index 96323f435..445aa3255 100644
--- a/configs/common/cores/arm/ex5_big.py
+++ b/configs/common/cores/arm/ex5_big.py
@@ -29,6 +29,9 @@
# Anastasiia Butko
# Louisa Bessad
+from __future__ import print_function
+from __future__ import absolute_import
+
from m5.objects import *
#-----------------------------------------------------------------------
diff --git a/configs/common/cpu2000.py b/configs/common/cpu2000.py
index 8143e45de..730a47878 100644
--- a/configs/common/cpu2000.py
+++ b/configs/common/cpu2000.py
@@ -27,6 +27,7 @@
# Authors: Nathan Binkert
from __future__ import print_function
+from __future__ import absolute_import
import os
import sys
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-04 00:36:08 +0000