diff options
Diffstat (limited to 'configs/common')
| -rw-r--r-- | configs/common/Caches.py | 7 | ||||
| -rw-r--r-- | configs/common/FSConfig.py | 2 |
2 files changed, 8 insertions, 1 deletions
diff --git a/configs/common/Caches.py b/configs/common/Caches.py index 43a1c6378..f1ea957b5 100644 --- a/configs/common/Caches.py +++ b/configs/common/Caches.py @@ -43,3 +43,10 @@ class L2Cache(BaseCache): mshrs = 20 tgts_per_mshr = 12 +class IOCache(BaseCache): + assoc = 8 + block_size = 64 + latency = '10ns' + mshrs = 20 + size = '1kB' + tgts_per_mshr = 12 diff --git a/configs/common/FSConfig.py b/configs/common/FSConfig.py index 6bcdafb14..9778be3f1 100644 --- a/configs/common/FSConfig.py +++ b/configs/common/FSConfig.py @@ -53,7 +53,7 @@ def makeLinuxAlphaSystem(mem_mode, mdesc = None): self.readfile = mdesc.script() self.iobus = Bus(bus_id=0) self.membus = Bus(bus_id=1) - self.bridge = Bridge(fix_partial_write_b=True, delay='50ns', nack_delay='4ns') + self.bridge = Bridge(delay='50ns', nack_delay='4ns') self.physmem = PhysicalMemory(range = AddrRange(mdesc.mem())) self.bridge.side_a = self.iobus.port self.bridge.side_b = self.membus.port |