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-rw-r--r--configs/dram/sweep.py4
1 files changed, 2 insertions, 2 deletions
diff --git a/configs/dram/sweep.py b/configs/dram/sweep.py
index 631d82e07..18a58b2da 100644
--- a/configs/dram/sweep.py
+++ b/configs/dram/sweep.py
@@ -82,9 +82,9 @@ if args:
# and address mapping
# start with the system itself, using a multi-layer 1.5 GHz
-# bus/crossbar, delivering 64 bytes / 5 cycles (one header cycle)
+# crossbar, delivering 64 bytes / 5 cycles (one header cycle)
# which amounts to 19.2 GByte/s per layer and thus per port
-system = System(membus = NoncoherentBus(width = 16))
+system = System(membus = NoncoherentXBar(width = 16))
system.clk_domain = SrcClockDomain(clock = '1.5GHz',
voltage_domain =
VoltageDomain(voltage = '1V'))