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-rw-r--r--configs/example/fs.py18
1 files changed, 4 insertions, 14 deletions
diff --git a/configs/example/fs.py b/configs/example/fs.py
index 3ce463879..180cd2719 100644
--- a/configs/example/fs.py
+++ b/configs/example/fs.py
@@ -72,16 +72,8 @@ if args:
DriveCPUClass = AtomicSimpleCPU
drive_mem_mode = 'atomic'
-# system under test can be any of these CPUs
-if options.detailed:
- TestCPUClass = DerivO3CPU
- test_mem_mode = 'timing'
-elif options.timing:
- TestCPUClass = TimingSimpleCPU
- test_mem_mode = 'timing'
-else:
- TestCPUClass = AtomicSimpleCPU
- test_mem_mode = 'atomic'
+# system under test can be any CPU
+(TestCPUClass, test_mem_mode, FutureClass) = Simulation.setCPUClass(options)
TestCPUClass.clock = '2GHz'
DriveCPUClass.clock = '2GHz'
@@ -103,17 +95,15 @@ test_sys = makeLinuxAlphaSystem(test_mem_mode, bm[0])
np = options.num_cpus
test_sys.cpu = [TestCPUClass(cpu_id=i) for i in xrange(np)]
for i in xrange(np):
- if options.caches and not options.standard_switch:
+ if options.caches and not options.standard_switch and not FutureClass:
test_sys.cpu[i].addPrivateSplitL1Caches(L1Cache(size = '32kB'),
L1Cache(size = '64kB'))
test_sys.cpu[i].connectMemPorts(test_sys.membus)
- test_sys.cpu[i].mem = test_sys.physmem
if len(bm) == 2:
drive_sys = makeLinuxAlphaSystem(drive_mem_mode, bm[1])
drive_sys.cpu = DriveCPUClass(cpu_id=0)
drive_sys.cpu.connectMemPorts(drive_sys.membus)
- drive_sys.cpu.mem = drive_sys.physmem
root = makeDualRoot(test_sys, drive_sys, options.etherdump)
elif len(bm) == 1:
root = Root(clock = '1THz', system = test_sys)
@@ -121,4 +111,4 @@ else:
print "Error I don't know how to create more than 2 systems."
sys.exit(1)
-Simulation.run(options, root, test_sys)
+Simulation.run(options, root, test_sys, FutureClass)