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-rw-r--r--configs/example/fs.py8
1 files changed, 5 insertions, 3 deletions
diff --git a/configs/example/fs.py b/configs/example/fs.py
index 6ee969a6e..a916ca49f 100644
--- a/configs/example/fs.py
+++ b/configs/example/fs.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2010-2013 ARM Limited
+# Copyright (c) 2010-2013, 2016 ARM Limited
# All rights reserved.
#
# The license below extends only to copyright in the software and shall
@@ -99,7 +99,8 @@ def build_test_system(np):
options.num_cpus, bm[0], options.dtb_filename,
bare_metal=options.bare_metal,
cmdline=cmdline,
- external_memory=options.external_memory_system)
+ external_memory=options.external_memory_system,
+ ruby=options.ruby)
if options.enable_context_switch_stats_dump:
test_sys.enable_context_switch_stats_dump = True
else:
@@ -172,10 +173,11 @@ def build_test_system(np):
cpu.icache_port = test_sys.ruby._cpu_ports[i].slave
cpu.dcache_port = test_sys.ruby._cpu_ports[i].slave
- if buildEnv['TARGET_ISA'] == "x86":
+ if buildEnv['TARGET_ISA'] in ("x86", "arm"):
cpu.itb.walker.port = test_sys.ruby._cpu_ports[i].slave
cpu.dtb.walker.port = test_sys.ruby._cpu_ports[i].slave
+ if buildEnv['TARGET_ISA'] in "x86":
cpu.interrupts[0].pio = test_sys.ruby._cpu_ports[i].master
cpu.interrupts[0].int_master = test_sys.ruby._cpu_ports[i].slave
cpu.interrupts[0].int_slave = test_sys.ruby._cpu_ports[i].master