diff options
Diffstat (limited to 'configs/example/ruby_fs.py')
| -rw-r--r-- | configs/example/ruby_fs.py | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/configs/example/ruby_fs.py b/configs/example/ruby_fs.py index 60c4be2b3..ee7a6b33a 100644 --- a/configs/example/ruby_fs.py +++ b/configs/example/ruby_fs.py @@ -90,7 +90,11 @@ elif buildEnv['TARGET_ISA'] == "x86": else: fatal("incapable of building non-alpha or non-x86 full system!") -system.clk_domain = SrcClockDomain(clock = options.sys_clock) +# Create a top-level voltage domain and clock domain +system.voltage_domain = VoltageDomain(voltage = options.sys_voltage) + +system.clk_domain = SrcClockDomain(clock = options.sys_clock, + voltage_domain = system.voltage_domain) if options.kernel is not None: system.kernel = binary(options.kernel) @@ -101,12 +105,14 @@ if options.script is not None: system.cpu = [CPUClass(cpu_id=i) for i in xrange(options.num_cpus)] # Create a source clock for the CPUs and set the clock period -system.cpu_clk_domain = SrcClockDomain(clock = options.cpu_clock) +system.cpu_clk_domain = SrcClockDomain(clock = options.cpu_clock, + voltage_domain = system.voltage_domain) Ruby.create_system(options, system, system.piobus, system._dma_ports) # Create a seperate clock domain for Ruby -system.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock) +system.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock, + voltage_domain = system.voltage_domain) for (i, cpu) in enumerate(system.cpu): # @@ -129,7 +135,7 @@ for (i, cpu) in enumerate(system.cpu): # Create the appropriate memory controllers and connect them to the # PIO bus system.mem_ctrls = [TestMemClass(range = r) for r in system.mem_ranges] -for i in xrange(len(system.physmem)): +for i in xrange(len(system.mem_ctrls)): system.mem_ctrls[i].port = system.piobus.master root = Root(full_system = True, system = system) |