8 files changed, 9 insertions, 9 deletions
diff --git a/configs/example/fs.py b/configs/example/fs.py
index 08484559a..9f41e24b9 100644
--- a/configs/example/fs.py
+++ b/configs/example/fs.py
@@ -198,9 +198,9 @@ if len(bm) == 2:
         drive_sys.kernel = binary(options.kernel)
 
     drive_sys.init_param = options.init_param
-    root = makeDualRoot(test_sys, drive_sys, options.etherdump)
+    root = makeDualRoot(True, test_sys, drive_sys, options.etherdump)
 elif len(bm) == 1:
-    root = Root(system=test_sys)
+    root = Root(full_system=True, system=test_sys)
 else:
     print "Error I don't know how to create more than 2 systems."
     sys.exit(1)
diff --git a/configs/example/memtest.py b/configs/example/memtest.py
index 24a49a9b3..b2cedc8f5 100644
--- a/configs/example/memtest.py
+++ b/configs/example/memtest.py
@@ -172,7 +172,7 @@ make_level(treespec, prototypes, system.physmem, "port")
 # run simulation
 # -----------------------
 
-root = Root( system = system )
+root = Root( full_system = False, system = system )
 if options.atomic:
     root.system.mem_mode = 'atomic'
 else:
diff --git a/configs/example/ruby_direct_test.py b/configs/example/ruby_direct_test.py
index 55b1c85e6..d4843e866 100644
--- a/configs/example/ruby_direct_test.py
+++ b/configs/example/ruby_direct_test.py
@@ -111,7 +111,7 @@ for ruby_port in system.ruby._cpu_ruby_ports:
 # run simulation
 # -----------------------
 
-root = Root( system = system )
+root = Root( full_system = False, system = system )
 root.system.mem_mode = 'timing'
 
 # Not much point in this being higher than the L1 latency
diff --git a/configs/example/ruby_fs.py b/configs/example/ruby_fs.py
index e6ac5f8c8..e18ed95af 100644
--- a/configs/example/ruby_fs.py
+++ b/configs/example/ruby_fs.py
@@ -141,6 +141,6 @@ for (i, cpu) in enumerate(system.cpu):
         cpu.interrupts.pio = system.piobus.port
         cpu.interrupts.int_port = system.piobus.port
 
-root = Root(system = system)
+root = Root(full_system = True, system = system)
 
 Simulation.run(options, root, system, FutureClass)
diff --git a/configs/example/ruby_mem_test.py b/configs/example/ruby_mem_test.py
index 6b1a46776..a418c47eb 100644
--- a/configs/example/ruby_mem_test.py
+++ b/configs/example/ruby_mem_test.py
@@ -162,7 +162,7 @@ for (i, dma) in enumerate(dmas):
 # run simulation
 # -----------------------
 
-root = Root( system = system )
+root = Root( full_system = False, system = system )
 root.system.mem_mode = 'timing'
 
 # Not much point in this being higher than the L1 latency
diff --git a/configs/example/ruby_network_test.py b/configs/example/ruby_network_test.py
index cd221ec7e..b5d788bf5 100644
--- a/configs/example/ruby_network_test.py
+++ b/configs/example/ruby_network_test.py
@@ -121,7 +121,7 @@ for ruby_port in system.ruby._cpu_ruby_ports:
 # run simulation
 # -----------------------
 
-root = Root( system = system )
+root = Root( full_system = False, system = system )
 root.system.mem_mode = 'timing'
 
 # Not much point in this being higher than the L1 latency
diff --git a/configs/example/ruby_random_test.py b/configs/example/ruby_random_test.py
index 7655e32fd..4bf17d70b 100644
--- a/configs/example/ruby_random_test.py
+++ b/configs/example/ruby_random_test.py
@@ -131,7 +131,7 @@ for ruby_port in system.ruby._cpu_ruby_ports:
 # run simulation
 # -----------------------
 
-root = Root( system = system )
+root = Root( full_system = False, system = system )
 root.system.mem_mode = 'timing'
 
 # Not much point in this being higher than the L1 latency
diff --git a/configs/example/se.py b/configs/example/se.py
index 572364482..f1dae9482 100644
--- a/configs/example/se.py
+++ b/configs/example/se.py
@@ -200,6 +200,6 @@ for i in xrange(np):
     if options.fastmem:
         system.cpu[0].physmem_port = system.physmem.port
 
-root = Root(system = system)
+root = Root(full_system = False, system = system)
 
 Simulation.run(options, root, system, FutureClass)