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-rw-r--r--configs/example/fs.py37
-rw-r--r--configs/example/memtest-ruby.py122
-rw-r--r--configs/example/memtest.py5
-rw-r--r--configs/example/ruby_fs.py201
-rw-r--r--configs/example/ruby_se.py22
-rw-r--r--configs/example/se.py28
6 files changed, 378 insertions, 37 deletions
diff --git a/configs/example/fs.py b/configs/example/fs.py
index b5be79a08..23285e101 100644
--- a/configs/example/fs.py
+++ b/configs/example/fs.py
@@ -26,15 +26,20 @@
#
# Authors: Ali Saidi
-import optparse, os, sys
+import optparse
+import os
+import sys
import m5
+from m5.defines import buildEnv
+from m5.objects import *
+from m5.util import addToPath, fatal
-if not m5.build_env['FULL_SYSTEM']:
- m5.fatal("This script requires full-system mode (*_FS).")
+if not buildEnv['FULL_SYSTEM']:
+ fatal("This script requires full-system mode (*_FS).")
+
+addToPath('../common')
-from m5.objects import *
-m5.AddToPath('../common')
from FSConfig import *
from SysPaths import *
from Benchmarks import *
@@ -98,16 +103,16 @@ else:
np = options.num_cpus
-if m5.build_env['TARGET_ISA'] == "alpha":
+if buildEnv['TARGET_ISA'] == "alpha":
test_sys = makeLinuxAlphaSystem(test_mem_mode, bm[0])
-elif m5.build_env['TARGET_ISA'] == "mips":
+elif buildEnv['TARGET_ISA'] == "mips":
test_sys = makeLinuxMipsSystem(test_mem_mode, bm[0])
-elif m5.build_env['TARGET_ISA'] == "sparc":
+elif buildEnv['TARGET_ISA'] == "sparc":
test_sys = makeSparcSystem(test_mem_mode, bm[0])
-elif m5.build_env['TARGET_ISA'] == "x86":
+elif buildEnv['TARGET_ISA'] == "x86":
test_sys = makeLinuxX86System(test_mem_mode, np, bm[0])
else:
- m5.fatal("incapable of building non-alpha or non-sparc full system!")
+ fatal("incapable of building non-alpha or non-sparc full system!")
if options.kernel is not None:
test_sys.kernel = binary(options.kernel)
@@ -123,7 +128,7 @@ if options.l2cache:
test_sys.cpu = [TestCPUClass(cpu_id=i) for i in xrange(np)]
-if options.caches:
+if options.caches or options.l2cache:
test_sys.bridge.filter_ranges_a=[AddrRange(0, Addr.max)]
test_sys.bridge.filter_ranges_b=[AddrRange(0, size='8GB')]
test_sys.iocache = IOCache(addr_range=AddrRange(0, size='8GB'))
@@ -142,17 +147,17 @@ for i in xrange(np):
if options.fastmem:
test_sys.cpu[i].physmem_port = test_sys.physmem.port
-if m5.build_env['TARGET_ISA'] == 'mips':
+if buildEnv['TARGET_ISA'] == 'mips':
setMipsOptions(TestCPUClass)
if len(bm) == 2:
- if m5.build_env['TARGET_ISA'] == 'alpha':
+ if buildEnv['TARGET_ISA'] == 'alpha':
drive_sys = makeLinuxAlphaSystem(drive_mem_mode, bm[1])
- elif m5.build_env['TARGET_ISA'] == 'mips':
+ elif buildEnv['TARGET_ISA'] == 'mips':
drive_sys = makeLinuxMipsSystem(drive_mem_mode, bm[1])
- elif m5.build_env['TARGET_ISA'] == 'sparc':
+ elif buildEnv['TARGET_ISA'] == 'sparc':
drive_sys = makeSparcSystem(drive_mem_mode, bm[1])
- elif m5.build.env['TARGET_ISA'] == 'x86':
+ elif buildEnv['TARGET_ISA'] == 'x86':
drive_sys = makeX86System(drive_mem_mode, np, bm[1])
drive_sys.cpu = DriveCPUClass(cpu_id=0)
drive_sys.cpu.connectMemPorts(drive_sys.membus)
diff --git a/configs/example/memtest-ruby.py b/configs/example/memtest-ruby.py
new file mode 100644
index 000000000..e47b8e0a3
--- /dev/null
+++ b/configs/example/memtest-ruby.py
@@ -0,0 +1,122 @@
+# Copyright (c) 2006-2007 The Regents of The University of Michigan
+# Copyright (c) 2009 Advanced Micro Devices, Inc.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Ron Dreslinski
+# Brad Beckmann
+
+import m5
+from m5.objects import *
+from m5.defines import buildEnv
+from m5.util import addToPath
+import os, optparse, sys
+addToPath('../common')
+addToPath('../../tests/configs/')
+import ruby_config
+
+parser = optparse.OptionParser()
+
+parser.add_option("-a", "--atomic", action="store_true",
+ help="Use atomic (non-timing) mode")
+parser.add_option("-b", "--blocking", action="store_true",
+ help="Use blocking caches")
+parser.add_option("-l", "--maxloads", metavar="N", default=0,
+ help="Stop after N loads")
+parser.add_option("-m", "--maxtick", type="int", default=m5.MaxTick,
+ metavar="T",
+ help="Stop after T ticks")
+
+parser.add_option("-t", "--testers", type="int", metavar="N", default=1,
+ help="number of testers/cores")
+
+parser.add_option("-f", "--functional", type="int", default=0,
+ metavar="PCT",
+ help="Target percentage of functional accesses "
+ "[default: %default]")
+parser.add_option("-u", "--uncacheable", type="int", default=0,
+ metavar="PCT",
+ help="Target percentage of uncacheable accesses "
+ "[default: %default]")
+
+parser.add_option("--progress", type="int", default=1000,
+ metavar="NLOADS",
+ help="Progress message interval "
+ "[default: %default]")
+
+(options, args) = parser.parse_args()
+
+if args:
+ print "Error: script doesn't take any positional arguments"
+ sys.exit(1)
+
+block_size = 64
+
+if options.testers > block_size:
+ print "Error: Number of testers %d limited to %d because of false sharing" \
+ % (options.testers, block_size)
+ sys.exit(1)
+
+cpus = [ MemTest(atomic=options.atomic, max_loads=options.maxloads, \
+ percent_functional=options.functional, \
+ percent_uncacheable=options.uncacheable, \
+ progress_interval=options.progress) \
+ for i in xrange(options.testers) ]
+
+# create the desired simulated system
+# ruby memory must be at least 16 MB to work with the mem tester
+ruby_memory = ruby_config.generate("MI_example-homogeneous.rb",
+ cores = options.testers,
+ memory_size = 16,
+ ports_per_cpu = 1)
+
+system = System(cpu = cpus, funcmem = PhysicalMemory(),
+ physmem = ruby_memory)
+
+for cpu in cpus:
+ cpu.test = system.physmem.port
+ cpu.functional = system.funcmem.port
+
+
+# -----------------------
+# run simulation
+# -----------------------
+
+root = Root( system = system )
+if options.atomic:
+ root.system.mem_mode = 'atomic'
+else:
+ root.system.mem_mode = 'timing'
+
+# Not much point in this being higher than the L1 latency
+m5.ticks.setGlobalFrequency('1ns')
+
+# instantiate configuration
+m5.instantiate(root)
+
+# simulate until program terminates
+exit_event = m5.simulate(options.maxtick)
+
+print 'Exiting @ tick', m5.curTick(), 'because', exit_event.getCause()
diff --git a/configs/example/memtest.py b/configs/example/memtest.py
index 5bb874e85..d4497092b 100644
--- a/configs/example/memtest.py
+++ b/configs/example/memtest.py
@@ -26,10 +26,11 @@
#
# Authors: Ron Dreslinski
+import optparse
+import sys
+
import m5
from m5.objects import *
-import os, optparse, sys
-m5.AddToPath('../common')
parser = optparse.OptionParser()
diff --git a/configs/example/ruby_fs.py b/configs/example/ruby_fs.py
new file mode 100644
index 000000000..a4831f3bb
--- /dev/null
+++ b/configs/example/ruby_fs.py
@@ -0,0 +1,201 @@
+# Copyright (c) 2009 Advanced Micro Devices, Inc.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Brad Beckmann
+
+#
+# Full system configuraiton for ruby
+#
+
+import os
+import optparse
+import sys
+from os.path import join as joinpath
+
+import m5
+from m5.defines import buildEnv
+from m5.objects import *
+from m5.util import addToPath, panic
+
+if not buildEnv['FULL_SYSTEM']:
+ panic("This script requires full-system mode (*_FS).")
+
+addToPath('../../tests/configs/')
+addToPath('../common')
+
+import ruby_config
+
+from FSConfig import *
+from SysPaths import *
+from Benchmarks import *
+import Simulation
+from Caches import *
+
+# Get paths we might need. It's expected this file is in m5/configs/example.
+config_path = os.path.dirname(os.path.abspath(__file__))
+config_root = os.path.dirname(config_path)
+m5_root = os.path.dirname(config_root)
+
+parser = optparse.OptionParser()
+
+# Benchmark options
+parser.add_option("-b", "--benchmark", action="store", type="string",
+ dest="benchmark",
+ help="Specify the benchmark to run. Available benchmarks: %s"\
+ % DefinedBenchmarks)
+parser.add_option("-o", "--options", default="",
+ help='The options to pass to the binary, use " " around the entire string')
+parser.add_option("-i", "--input", default="", help="Read stdin from a file.")
+parser.add_option("--output", default="", help="Redirect stdout to a file.")
+parser.add_option("--errout", default="", help="Redirect stderr to a file.")
+
+# ruby options
+parser.add_option("--ruby-debug", action="store_true")
+parser.add_option("--ruby-debug-file", default="", help="Ruby debug out file (stdout if blank)")
+parser.add_option("--protocol", default="", help="Ruby protocol compiled into binary")
+
+
+# ruby host memory experimentation
+parser.add_option("--cache_size", type="int")
+parser.add_option("--cache_assoc", type="int")
+parser.add_option("--map_levels", type="int")
+
+execfile(os.path.join(config_root, "common", "Options.py"))
+
+(options, args) = parser.parse_args()
+
+if args:
+ print "Error: script doesn't take any positional arguments"
+ sys.exit(1)
+
+if options.benchmark:
+ try:
+ bm = Benchmarks[options.benchmark]
+ except KeyError:
+ print "Error benchmark %s has not been defined." % options.benchmark
+ print "Valid benchmarks are: %s" % DefinedBenchmarks
+ sys.exit(1)
+else:
+ bm = [SysConfig()]
+
+#
+# currently ruby fs only works in simple timing mode because ruby does not
+# support atomic accesses by devices. Also ruby_fs currently assumes
+# that is running a checkpoints that were created by ALPHA_FS under atomic
+# mode. Since switch cpus are not defined in these checkpoints, we don't
+# fast forward with the atomic cpu and instead set the FutureClass to None.
+# Therefore the cpus resolve to the correct names and unserialize correctly.
+#
+assert(options.timing)
+class CPUClass(TimingSimpleCPU): pass
+test_mem_mode = 'timing'
+FutureClass = None
+
+CPUClass.clock = '1GHz'
+
+#
+# Since we are running in timing mode, set the number of M5 ticks to ruby ticks
+# to the cpu clock frequency
+#
+M5_to_ruby_tick = '1000t'
+
+np = options.num_cpus
+
+# check for max instruction count
+if options.max_inst:
+ max_inst = options.max_inst
+else:
+ max_inst = 0
+
+# set cache size
+if options.cache_size:
+ cache_size = options.cache_size
+else:
+ cache_size = 32768 # 32 kB is default
+
+# set cache assoc
+if options.cache_assoc:
+ cache_assoc = options.cache_assoc
+else:
+ cache_assoc = 8 # 8 is default
+
+# set map levels
+if options.map_levels:
+ map_levels = options.map_levels
+else:
+ map_levels = 4 # 4 levels is the default
+
+if options.protocol == "MOESI_hammer":
+ ruby_config_file = "MOESI_hammer-homogeneous.rb"
+elif options.protocol == "MOESI_CMP_token":
+ ruby_config_file = "TwoLevel_SplitL1UnifiedL2.rb"
+elif options.protocol == "MI_example":
+ ruby_config_file = "MI_example-homogeneous.rb"
+else:
+ print "Error: unsupported ruby protocol"
+ sys.exit(1)
+
+#
+# Currently, since ruby configuraiton is separate from m5, we need to manually
+# tell ruby that two dma ports are created by makeLinuxAlphaRubySystem().
+# Eventually, this will be fix with a unified configuration system.
+#
+rubymem = ruby_config.generate(ruby_config_file,
+ np,
+ np,
+ 128,
+ False,
+ cache_size,
+ cache_assoc,
+ map_levels,
+ 2,
+ M5_to_ruby_tick)
+
+if options.ruby_debug == True:
+ rubymem.debug = True
+ rubymem.debug_file = options.ruby_debug_file
+
+system = makeLinuxAlphaRubySystem(test_mem_mode, rubymem, bm[0])
+
+system.cpu = [CPUClass(cpu_id=i) for i in xrange(np)]
+
+if options.l2cache:
+ print "Error: -l2cache incompatible with ruby, must configure it ruby-style"
+ sys.exit(1)
+
+if options.caches:
+ print "Error: -caches incompatible with ruby, must configure it ruby-style"
+ sys.exit(1)
+
+for i in xrange(np):
+ system.cpu[i].connectMemPorts(system.physmem)
+
+ if options.fastmem:
+ system.cpu[i].physmem_port = system.physmem.port
+
+root = Root(system = system)
+
+Simulation.run(options, root, system, FutureClass)
diff --git a/configs/example/ruby_se.py b/configs/example/ruby_se.py
index 488ccb64a..e7e930077 100644
--- a/configs/example/ruby_se.py
+++ b/configs/example/ruby_se.py
@@ -30,17 +30,22 @@
#
# "m5 test.py"
+import os
+import optparse
+import sys
+from os.path import join as joinpath
+
import m5
+from m5.defines import buildEnv
+from m5.objects import *
+from m5.util import addToPath, panic
-if m5.build_env['FULL_SYSTEM']:
- m5.panic("This script requires syscall emulation mode (*_SE).")
+if buildEnv['FULL_SYSTEM']:
+ panic("This script requires syscall emulation mode (*_SE).")
+
+addToPath('../common')
-from m5.objects import *
-import os, optparse, sys
-from os.path import join as joinpath
-m5.AddToPath('../common')
import Simulation
-#from Caches import *
from cpu2000 import *
# Get paths we might need. It's expected this file is in m5/configs/example.
@@ -72,7 +77,7 @@ if args:
if options.bench:
try:
- if m5.build_env['TARGET_ISA'] != 'alpha':
+ if buildEnv['TARGET_ISA'] != 'alpha':
print >>sys.stderr, "Simpoints code only works for Alpha ISA at this time"
sys.exit(1)
exec("workload = %s('alpha', 'tru64', 'ref')" % options.bench)
@@ -133,7 +138,6 @@ rubymem = RubyMemory(
range = AddrRange("512MB"),
clock = "1GHz",
num_cpus = np,
- libruby_file = "src/mem/ruby/amd64-linux/generated/MOESI_CMP_directory/bin/libruby.so",
config_file = "ruby.config",
stats_file = "m5out/ruby.stats"
)
diff --git a/configs/example/se.py b/configs/example/se.py
index 67a2340ce..c490ed6b6 100644
--- a/configs/example/se.py
+++ b/configs/example/se.py
@@ -30,15 +30,21 @@
#
# "m5 test.py"
+import os
+import optparse
+import sys
+from os.path import join as joinpath
+
import m5
+from m5.defines import buildEnv
+from m5.objects import *
+from m5.util import addToPath, fatal
-if m5.build_env['FULL_SYSTEM']:
- m5.fatal("This script requires syscall emulation mode (*_SE).")
+if buildEnv['FULL_SYSTEM']:
+ fatal("This script requires syscall emulation mode (*_SE).")
+
+addToPath('../common')
-from m5.objects import *
-import os, optparse, sys
-from os.path import join as joinpath
-m5.AddToPath('../common')
import Simulation
from Caches import *
from cpu2000 import *
@@ -70,7 +76,7 @@ if args:
if options.bench:
try:
- if m5.build_env['TARGET_ISA'] != 'alpha':
+ if buildEnv['TARGET_ISA'] != 'alpha':
print >>sys.stderr, "Simpoints code only works for Alpha ISA at this time"
sys.exit(1)
exec("workload = %s('alpha', 'tru64', 'ref')" % options.bench)
@@ -94,8 +100,9 @@ if options.errout != "":
# By default, set workload to path of user-specified binary
workloads = options.cmd
+numThreads = 1
-if options.detailed:
+if options.detailed or options.inorder:
#check for SMT workload
workloads = options.cmd.split(';')
if len(workloads) > 1:
@@ -124,11 +131,12 @@ if options.detailed:
smt_process.errout = errouts[smt_idx]
process += [smt_process, ]
smt_idx += 1
-
+ numThreads = len(workloads)
+
(CPUClass, test_mem_mode, FutureClass) = Simulation.setCPUClass(options)
CPUClass.clock = '2GHz'
-CPUClass.numThreads = len(workloads)
+CPUClass.numThreads = numThreads;
np = options.num_cpus
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-30 01:38:16 +0000