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-rw-r--r--configs/ruby/MI_example.py3
1 files changed, 2 insertions, 1 deletions
diff --git a/configs/ruby/MI_example.py b/configs/ruby/MI_example.py
index 971a52dc8..96515971e 100644
--- a/configs/ruby/MI_example.py
+++ b/configs/ruby/MI_example.py
@@ -71,7 +71,8 @@ def create_system(options, phys_mem, piobus, dma_devices):
#
# Only one unified L1 cache exists. Can cache instructions and data.
#
- cpu_seq = RubySequencer(icache = cache,
+ cpu_seq = RubySequencer(version = i,
+ icache = cache,
dcache = cache,
physMemPort = phys_mem.port,
physmem = phys_mem)