diff options
Diffstat (limited to 'configs/test/fs.py')
| -rw-r--r-- | configs/test/fs.py | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/configs/test/fs.py b/configs/test/fs.py index d191f7055..41c3f8cc0 100644 --- a/configs/test/fs.py +++ b/configs/test/fs.py @@ -17,6 +17,8 @@ if args: # Base for tests is directory containing this file. test_base = os.path.dirname(__file__) +script.dir = '/z/saidi/work/m5.newmem/configs/boot' + linux_image = env.get('LINUX_IMAGE', disk('linux-latest.img')) class IdeControllerPciData(PciConfigData): @@ -187,6 +189,7 @@ class MyLinuxAlphaSystem(LinuxAlphaSystem): intrctrl = IntrControl() if options.timing: cpu = TimingSimpleCPU() + mem_mode = 'timing' else: cpu = AtomicSimpleCPU() cpu.mem = magicbus2 @@ -194,6 +197,7 @@ class MyLinuxAlphaSystem(LinuxAlphaSystem): cpu.dcache_port = magicbus2.port cpu.itb = AlphaITB() cpu.dtb = AlphaDTB() + cpu.clock = '2GHz' sim_console = SimConsole(listener=ConsoleListener(port=3456)) kernel = binary('vmlinux') pal = binary('ts_osfpal') @@ -216,7 +220,7 @@ def DualRoot(clientSystem, serverSystem): self.etherlink = EtherLink(int1 = Parent.client.tsunami.etherint[0], int2 = Parent.server.tsunami.etherint[0], dump = Parent.etherdump) - self.clock = '5GHz' + self.clock = '1THz' return self root = DualRoot( @@ -225,6 +229,14 @@ root = DualRoot( m5.instantiate(root) +#exit_event = m5.simulate(2600000000000) +#if exit_event.getCause() != "user interrupt received": +# m5.checkpoint(root, 'cpt') +# exit_event = m5.simulate(300000000000) +# if exit_event.getCause() != "user interrupt received": +# m5.checkpoint(root, 'cptA') + + exit_event = m5.simulate() print 'Exiting @ cycle', m5.curTick(), 'because', exit_event.getCause() |