diff options
Diffstat (limited to 'configs')
| -rw-r--r-- | configs/example/ruby_direct_test.py | 2 | ||||
| -rw-r--r-- | configs/example/ruby_random_test.py | 2 | ||||
| -rw-r--r-- | configs/example/se.py | 2 | ||||
| -rw-r--r-- | configs/ruby/MESI_Three_Level.py | 2 | ||||
| -rw-r--r-- | configs/ruby/MESI_Two_Level.py | 2 | ||||
| -rw-r--r-- | configs/ruby/MI_example.py | 2 | ||||
| -rw-r--r-- | configs/ruby/MOESI_CMP_directory.py | 2 | ||||
| -rw-r--r-- | configs/ruby/MOESI_CMP_token.py | 2 | ||||
| -rw-r--r-- | configs/ruby/MOESI_hammer.py | 2 |
9 files changed, 16 insertions, 2 deletions
diff --git a/configs/example/ruby_direct_test.py b/configs/example/ruby_direct_test.py index 36314fbfb..21c808459 100644 --- a/configs/example/ruby_direct_test.py +++ b/configs/example/ruby_direct_test.py @@ -105,7 +105,7 @@ system.clk_domain = SrcClockDomain(clock = options.sys_clock, # # Create the ruby random tester # -system.tester = RubyDirectedTester(requests_to_complete = \ +system.cpu = RubyDirectedTester(requests_to_complete = \ options.requests, generator = generator) diff --git a/configs/example/ruby_random_test.py b/configs/example/ruby_random_test.py index 32d5cf34d..63faeb97a 100644 --- a/configs/example/ruby_random_test.py +++ b/configs/example/ruby_random_test.py @@ -97,7 +97,7 @@ tester = RubyTester(check_flush = check_flush, # actually used by the rubytester, but is included to support the # M5 memory size == Ruby memory size checks # -system = System(tester = tester, physmem = SimpleMemory(), +system = System(cpu = tester, physmem = SimpleMemory(), mem_ranges = [AddrRange(options.mem_size)]) # Create a top-level voltage domain and clock domain diff --git a/configs/example/se.py b/configs/example/se.py index c6b98ec0e..ad15e14b5 100644 --- a/configs/example/se.py +++ b/configs/example/se.py @@ -235,6 +235,8 @@ if options.ruby: Ruby.create_system(options, system) assert(options.num_cpus == len(system.ruby._cpu_ports)) + system.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock, + voltage_domain = system.voltage_domain) for i in xrange(np): ruby_port = system.ruby._cpu_ports[i] diff --git a/configs/ruby/MESI_Three_Level.py b/configs/ruby/MESI_Three_Level.py index 966c80172..ee6ceccf9 100644 --- a/configs/ruby/MESI_Three_Level.py +++ b/configs/ruby/MESI_Three_Level.py @@ -102,9 +102,11 @@ def create_system(options, system, dma_ports, ruby_system): l0_cntrl = L0Cache_Controller(version = i*num_cpus_per_cluster + j, Icache = l0i_cache, Dcache = l0d_cache, send_evictions = (options.cpu_type == "detailed"), + clk_domain=system.cpu[i].clk_domain, ruby_system = ruby_system) cpu_seq = RubySequencer(version = i, icache = l0i_cache, + clk_domain=system.cpu[i].clk_domain, dcache = l0d_cache, ruby_system = ruby_system) l0_cntrl.sequencer = cpu_seq diff --git a/configs/ruby/MESI_Two_Level.py b/configs/ruby/MESI_Two_Level.py index 845d5cf22..c70c599c7 100644 --- a/configs/ruby/MESI_Two_Level.py +++ b/configs/ruby/MESI_Two_Level.py @@ -95,12 +95,14 @@ def create_system(options, system, dma_ports, ruby_system): options.cpu_type == "detailed"), prefetcher = prefetcher, ruby_system = ruby_system, + clk_domain=system.cpu[i].clk_domain, transitions_per_cycle=options.ports, enable_prefetch = False) cpu_seq = RubySequencer(version = i, icache = l1i_cache, dcache = l1d_cache, + clk_domain=system.cpu[i].clk_domain, ruby_system = ruby_system) l1_cntrl.sequencer = cpu_seq diff --git a/configs/ruby/MI_example.py b/configs/ruby/MI_example.py index 9fb6ca366..012479250 100644 --- a/configs/ruby/MI_example.py +++ b/configs/ruby/MI_example.py @@ -82,11 +82,13 @@ def create_system(options, system, dma_ports, ruby_system): send_evictions = ( options.cpu_type == "detailed"), transitions_per_cycle = options.ports, + clk_domain=system.cpu[i].clk_domain, ruby_system = ruby_system) cpu_seq = RubySequencer(version = i, icache = cache, dcache = cache, + clk_domain=system.cpu[i].clk_domain, ruby_system = ruby_system) l1_cntrl.sequencer = cpu_seq diff --git a/configs/ruby/MOESI_CMP_directory.py b/configs/ruby/MOESI_CMP_directory.py index a7de3bf8f..aa474209f 100644 --- a/configs/ruby/MOESI_CMP_directory.py +++ b/configs/ruby/MOESI_CMP_directory.py @@ -92,11 +92,13 @@ def create_system(options, system, dma_ports, ruby_system): send_evictions = ( options.cpu_type == "detailed"), transitions_per_cycle = options.ports, + clk_domain=system.cpu[i].clk_domain, ruby_system = ruby_system) cpu_seq = RubySequencer(version = i, icache = l1i_cache, dcache = l1d_cache, + clk_domain=system.cpu[i].clk_domain, ruby_system = ruby_system) l1_cntrl.sequencer = cpu_seq diff --git a/configs/ruby/MOESI_CMP_token.py b/configs/ruby/MOESI_CMP_token.py index 52c1b44f4..36a532574 100644 --- a/configs/ruby/MOESI_CMP_token.py +++ b/configs/ruby/MOESI_CMP_token.py @@ -112,11 +112,13 @@ def create_system(options, system, dma_ports, ruby_system): send_evictions = ( options.cpu_type == "detailed"), transitions_per_cycle = options.ports, + clk_domain=system.cpu[i].clk_domain, ruby_system = ruby_system) cpu_seq = RubySequencer(version = i, icache = l1i_cache, dcache = l1d_cache, + clk_domain=system.cpu[i].clk_domain, ruby_system = ruby_system) l1_cntrl.sequencer = cpu_seq diff --git a/configs/ruby/MOESI_hammer.py b/configs/ruby/MOESI_hammer.py index eaa3bc7a2..de98fd0c2 100644 --- a/configs/ruby/MOESI_hammer.py +++ b/configs/ruby/MOESI_hammer.py @@ -105,11 +105,13 @@ def create_system(options, system, dma_ports, ruby_system): send_evictions = ( options.cpu_type == "detailed"), transitions_per_cycle = options.ports, + clk_domain=system.cpu[i].clk_domain, ruby_system = ruby_system) cpu_seq = RubySequencer(version = i, icache = l1i_cache, dcache = l1d_cache, + clk_domain=system.cpu[i].clk_domain, ruby_system = ruby_system) l1_cntrl.sequencer = cpu_seq |